ADP161AUJZ-R7 [ADI]
Ultralow Quiescent Current, 150 mA, CMOS Linear Regulators; 超低静态电流150毫安， CMOS线性稳压器
| 型号： | ADP161AUJZ-R7 |
| 厂家： | 
ADI |
| 描述： | Ultralow Quiescent Current, 150 mA, CMOS Linear Regulators |
| 文件： | 总24页 (文件大小：528K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ultralow Quiescent Current,
150 mA, CMOS Linear Regulators
ADP160/ADP161/ADP162/ADP163
Data Sheet
FEATURES
TYPICAL APPLICATION CIRCUITS
ADP160/ADP162
Ultralow quiescent current
V
= 2.3V
1µF
V
= 1.8V
IN
OUT
I
I
Q = 560 nA with 0 μA load
Q = 860 nA with 1 μA load
5
1
2
3
VIN
GND
EN
VOUT
1µF
Stable with 1 μF ceramic input and output capacitors
Maximum output current: 150 mA
Input voltage range: 2.2 V to 5.5 V
Low shutdown current: <50 nA typical
Low dropout voltage: 195 mV @ 150 mA load
Initial accuracy: 1ꢀ
Accuracy over line, load, and temperature: 3.5ꢀ
15 fixed output voltage options: 1.2 V to 4.2 V
Adjustable output available
ON
4
NC
OFF
NC = NO CONNECT
Figure 1. 5-Lead TSOT ADP160/ADP162 with Fixed Output Voltage, 1.8 V
ADP161/ADP163
V
= 4.2V
1µF
V
= 3.2V
1µF
IN
OUT
5
1
2
3
VIN
GND
EN
VOUT
R1
R2
ON
4
ADJ
PSRR performance of 72 dB @ 100 Hz
Current limit and thermal overload protection
Logic-control enable
OFF
Figure 2. 5-Lead TSOT ADP161/ADP163 with Adjustable Output Voltage, 3.2 V
Integrated output discharge resistor
5-lead TSOT package
ADP160/ADP162
1
2
4-ball, 0.5 mm pitch WLCSP
V
= 2.8V
V
= 3.3V
1µF
OUT
IN
VIN
VOUT
A
B
1µF
TOP VIEW
(Not to Scale)
APPLICATIONS
ON
Mobile phones
EN
GND
OFF
Digital cameras and audio devices
Portable and battery-powered equipment
Post dc-to-dc regulation
Figure 3. 4-Ball WLCSP ADP160/ADP162 with Fixed Output Voltage, 2.8 V
Portable medical devices
GENERAL DESCRIPTION
The ADP160/ADP161/ADP162/ADP163 are ultralow quiescent
current, low dropout, linear regulators that operate from 2.2 V
to 5.5 V and provide up to 150 mA of output current. The low
195 mV dropout voltage at 150 mA load improves efficiency and
allows operation over a wide input voltage range.
the LDO is disabled. The ADP162 is identical to the ADP160
but does not include the output discharge function.
The ADP161and ADP163 are available as adjustable output voltage
regulators. They are only available in a 5-lead TSOT package.
The ADP163 is identical to the ADP161 but does not include
the output discharge function.
The ADP16x are specifically designed for stable operation with a
tiny 1 μF 30ꢀ ceramic input and output capacitors to meet
the requirements of high performance, space-constrained
applications.
Short-circuit and thermal overload protection circuits prevent
damage in adverse conditions. The ADP160 and ADP162 are
available in a tiny 5-lead TSOT and a 4-ball, 0.5 mm pitch
WLCSP package for the smallest footprint solution to meet a
variety of portable power applications.
The ADP160 is available in 15 fixed output voltage options,
ranging from 1.2 V to 4.2 V. The ADP160/ADP161 also include
a switched resistor to discharge the output automatically when
Rev. G
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ADP160/ADP161/ADP162/ADP163
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................8
Theory of Operation ...................................................................... 12
Applications Information .............................................................. 14
Capacitor Selection .................................................................... 14
Enable Feature ............................................................................ 15
Current Limit and Thermal Overload Protection ................. 15
Thermal Considerations............................................................ 16
PCB Layout Considerations...................................................... 18
Light Sensitivity of WLCSPs ..................................................... 18
Outline Dimensions....................................................................... 20
Ordering Guide .......................................................................... 21
Applications....................................................................................... 1
Typical Application Circuits............................................................ 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Input and Output Capacitor, Recommended Specifications.. 4
Absolute Maximum Ratings............................................................ 5
Thermal Data ................................................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
REVISION HISTORY
12/12—Rev. F to Rev. G
Changes to Table 3 ............................................................................ 5
Changes to Pin 4 Description ......................................................... 6
Changes to Figure 22...................................................................... 10
Changes to Figure 32 and Figure 33 Captions............................ 12
Added Light Sensitivity of WLCSPs Section............................... 18
9/12—Rev. E to Rev. F
Changes to Ordering Guide ...........................................................21
4/12—Rev. D to Rev. E
Updated Outline Dimensions........................................................20
Changes to Ordering Guide ...........................................................21
1/12—Rev. C to Rev. D
Changes to Ordering Guide .......................................................... 21
1/11—Rev. B to Rev. C
Changes to Figure 15 and Figure 16............................................... 9
11/10—Rev. A to Rev. B
Changes to Theory of Operation.................................................. 13
Changes to Ordering Guide .......................................................... 20
8/10—Rev. 0 to Rev. A
Added ADP162/ADP163.............................................. Throughout
Changes to Figure 17 and Figure 18............................................... 9
Changes to Figure 19, Figure 20, and Figure 23 ......................... 10
Added Figure 21 and Figure 22 (Renumbered Sequentially) ... 10
Added Figure 32 and Figure 33..................................................... 12
Changes to Ordering Guide .......................................................... 20
6/10—Revision 0: Initial Version
Rev. G | Page 2 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.2 V, whichever is greater; EN = VIN, IOUT = 10 mA, CIN = COUT = 1 µF, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
VIN
Conditions
Min Typ
2.2
Max Unit
5.5
1250 nA
2.3 µA
1800 nA
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
TJ = −40°C to +125°C
IOUT = 0 µA
IOUT = 0 µA, TJ = −40°C to +125°C
IOUT = 1 µA
IOUT = 1 µA, TJ = −40°C to +125°C
IOUT = 100 µA
IOUT = 100 µA, TJ = −40°C to +125°C
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
EN = GND
V
IGND
560
860
2.6
11
2.8
4.5
5.8
µA
µA
µA
µA
µA
µA
µA
nA
µA
19
65
1
42
SHUTDOWN CURRENT
IGND-SD
50
EN = GND, TJ = −40°C to +125°C
OUTPUT VOLTAGE ACCURACY
VOUT
IOUT = 10 mA
−1
+1
+2
+3.5
%
%
%
0 µA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V −2
0 µA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V, −3.5
TJ = −40°C to +125°C
ADJUSTABLE-OUTPUT VOLTAGE
ACCURACY (ADP161/ADP163)1
VADJ
IOUT = 10 mA
0.99 1.0
1.01
V
0 µA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V 0.98
0 µA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V, 0.97
TJ = −40°C to +125°C
1.02
1.03
V
V
REGULATION
Line Regulation
Load Regulation2
∆VOUT/∆VIN VIN = (VOUT + 0.5 V) to 5.5 V, TJ = −40°C to +125°C
∆VOUT/∆IOUT IOUT = 100 μA to 150 mA
IOUT = 100 μA to 150 mA, TJ = −40°C to +125°C
VOUT = 3.3 V
−0.1
+0.1 %/V
%/mA
0.004
0.01
%/mA
DROPOUT VOLTAGE3
4-Ball WLCSP
VDROPOUT
IOUT = 10 mA
7
mV
mV
mV
mV
mV
mV
mV
mV
nA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = −40°C to +125°C
IOUT = 10 mA
IOUT = 10 mA, TJ = −40°C to +125°C
IOUT = 150 mA
13
105
8
195
15
5-Lead TSOT
120
IOUT = 150 mA, TJ = −40°C to +125°C
2.2 V ≤ VIN ≤ 5.5 V, ADJ connected to VOUT
VOUT = 2.8 V, RLOAD = ∞
225
600
ADJ INPUT BIAS CURRENT (ADP161/ADP163) ADJI-BIAS
10
ACTIVE PULL-DOWN RESISTANCE
(ADP160/ADP161)
START-UP TIME4
CURRENT LIMIT THRESHOLD5
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
EN INPUT
TSHUTDOWN
300
Ω
TSTART-UP
ILIMIT
VOUT = 3.3 V
1100
µs
220 320
500
mA
TSSD
TJ rising
150
15
°C
°C
TSSD-HYS
En Input Logic High
VIH
2.2 V ≤ VIN ≤ 5.5 V
1.2
V
EN Input Logic Low
EN Input Leakage Current
VIL
VI-LEAKAGE
2.2 V ≤ VIN ≤ 5.5 V
EN = VIN or GND
EN = VIN or GND, TJ = −40°C to +125°C
0.4
1
V
µA
µA
0.1
Rev. G | Page 3 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
Parameter
Symbol
UVLO
UVLORISE
UVLOFALL
UVLOHYS
OUTNOISE
Conditions
Min Typ
Max Unit
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
2.19
V
1.60
100
105
V
mV
OUTPUT NOISE
10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V
10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.5 V
10 Hz to 100 kHz, VIN = 5 V, VOUT = 1.2 V
µV
rms
µV
rms
100
80
µV
rms
POWER SUPPLY REJECTION RATIO
PSRR
100 Hz, VIN = 5 V, VOUT = 3.3 V
100 Hz, VIN = 5 V, VOUT = 2.5 V
100 Hz, VIN = 5 V, VOUT = 1.2 V
1 kHz, VIN = 5 V, VOUT = 3.3 V
1 kHz, VIN = 5 V, VOUT = 2.5 V
1 kHz, VIN = 5 V, VOUT = 1.2 V
60
65
72
50
50
62
dB
dB
dB
dB
dB
dB
1 Accuracy when VOUT is connected directly to ADJ. When the VOUT voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the
tolerances of resistors used.
2 Based on an end-point calculation using 0 μA and 150 mA loads.
3 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.2 V.
4 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
5 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
Symbol
CMIN
Conditions
Min
0.7
Typ
Max
Unit
µF
MINIMUM INPUT AND OUTPUT CAPACITANCE1
TA = −40°C to +125°C
TA = −40°C to +125°C
CAPACITOR ESR
RESR
0.001
0.2
Ω
1 The minimum input and output capacitance should be greater than 0.7 µF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
however, Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. G | Page 4 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
ABSOLUTE MAXIMUM RATINGS
Table 3.
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on the
application and board layout. In applications where high maximum
power dissipation exists, close attention to thermal board design
is required. The value of θJA may vary, depending on PCB material,
layout, and environmental conditions. The specified values of
θJA are based on a 4-layer, 4 inches × 3 inches, circuit board. Refer
to JESD 51-7 and JESD 51-9 for detailed information on the
board construction. For additional information, see the AN-617
Application Note, MicroCSP™ Wafer Level Chip Scale Package.
Parameter
Rating
VIN to GND
VOUT to GND
−0.3 V to +6.5 V
−0.3 V to VIN
EN to GND
−0.3 V to VIN
ADJ to GND
−0.3 V to VIN
NC to GND
−0.3 V to VIN
Storage Temperature Range
Operating Junction Temperature Range
Operating Ambient Temperature Range
Soldering Conditions
−65°C to +150°C
−40°C to +125°C
−40°C to +125°C
JEDEC J-STD-020
ΨJB is the junction to board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θJB. Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation from
the package, factors that make ΨJB more useful in real-world
applications. Maximum junction temperature (TJ) is calculated
from the board temperature (TB) and power dissipation (PD)
using the formula
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings only apply individually; they do not
apply in combination. The ADP16x can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that TJ is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient temperature
may have to be derated.
TJ = TB + (PD × ΨJB)
Refer to JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (TJ) of
the device is dependent on the ambient temperature (TA), the
power dissipation of the device (PD), and the junction-to-ambient
thermal resistance of the package (θJA).
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
θJA
ΨJB
43
58
Unit
°C/W
°C/W
5-Lead TSOT
4-Ball, 0.4 mm Pitch WLCSP
170
260
Maximum junction temperature (TJ) is calculated from the ambient
temperature (TA) and power dissipation (PD) using the formula
TJ = TA + (PD × θJA)
ESD CAUTION
Rev. G | Page 5 of 24
ADP160/ADP161/ADP162/ADP163
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADP160/
Data Sheet
5
VIN
GND
EN
1
2
3
VOUT
ADP162
TOP VIEW
(Not to Scale)
4
NC
NC = NO CONNECT
Figure 4. 5-Lead TSOT, Fixed Output Pin Configuration, ADP160/ADP162
Table 5. 5-Lead TSOT Pin Function Descriptions, ADP160/ADP162
Pin No.
Mnemonic
Description
1
2
3
VIN
GND
EN
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup,
connect EN to VIN.
4
5
NC
VOUT
No Connect. This pin is not connected internally. Connect this pin to GND or leave open.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
ADP161/
5
VIN
GND
EN
1
2
3
VOUT
ADP163
TOP VIEW
(Not to Scale)
4
ADJ
Figure 5. 5-Lead TSOT, Adjustable Output Pin Configuration, ADP161/ADP163
Table 6. 5-Lead TSOT Pin Function Descriptions, ADP161/ADP163
Pin No.
Mnemonic
Description
1
2
3
VIN
GND
EN
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic startup,
connect EN to VIN.
4
5
ADJ
Output Voltage Adjust Pin. Connect the midpoint of the voltage divider between VOUT and GND to this pin to set
the output voltage.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
VOUT
Rev. G | Page 6 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
1
2
A
B
VIN
VOUT
ADP160/
ADP162
EN
GND
TOP VIEW
(Not to Scale)
Figure 6. 4-Ball WLCSP Pin Configuration, ADP160/ADP162
Table 7. 4-Ball WLCSP Pin Function Descriptions, ADP160/ADP162
Pin No.
Mnemonic
Description
A1
B1
VIN
EN
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. For automatic
startup, connect EN to VIN.
A2
B2
VOUT
GND
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Ground.
Rev. G | Page 7 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.8 V, VOUT = 3.3 V, IOUT = 1 mA, CIN = COUT = 1 µF, TA = 25°C, unless otherwise noted.
3.35
3.34
3.33
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
100
10
1
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
NO LOAD
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
0.1
–40
–5
25
85
125
–40
–5
25
85
125
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
Figure 7. Output Voltage (VOUT) vs. Junction Temperature
Figure 10. Ground Current vs. Junction Temperature
100
10
1
3.35
3.34
3.33
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
0.1
0.001
0.01
0.1
1
10
100
1000
0.001
0.01
0.1
1
10
100
1000
I
(mA)
I
(mA)
LOAD
LOAD
Figure 11. Ground Current vs. Load Current (ILOAD
)
Figure 8. Output Voltage (VOUT) vs. Load Current (ILOAD
)
3.35
3.34
3.33
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
100
10
1
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
LOAD = 10mA
LOAD = 100mA
LOAD = 150mA
NO LOAD
LOAD = 1µA
LOAD = 100µA
LOAD = 1mA
0.1
3.7
3.7
3.9
4.1
4.3
4.5
V
4.7
(V)
4.9
5.1
5.3
5.5
3.9
4.1
4.3
4.5
V
4.7
(V)
4.9
5.1
5.3
5.5
IN
IN
Figure 9. Output Voltage (VOUT) vs. Input Voltage (VIN)
Figure 12. Ground Current vs. Input Voltage (VIN)
Rev. G | Page 8 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
0.18
140
120
100
80
V
V
V
V
V
V
= 2.9V
= 3.2V
= 3.8V
= 4.1V
= 4.7V
= 5.5V
IN
IN
IN
IN
IN
IN
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
60
40
LOAD = 1mA
LOAD = 5mA
LOAD = 10mA
LOAD = 50mA
LOAD = 100mA
LOAD = 150mA
20
0
–40
–5
25
85
125
3.1
3.2
3.3
3.4
3.5
3.6
TEMPERATURE (°C)
V
(V)
IN
Figure 13. Shutdown Current vs. Temperature at Various Input Voltages
Figure 16. Ground Current vs. Input Voltage (VIN) in Dropout
0
250
LOAD = 150mA
LOAD = 100mA
V
= 2V
OUT
–10
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
–20
–30
–40
–50
–60
–70
–80
–90
–100
200
150
100
50
V
= 3.3V
OUT
0
10
100
1k
10k
100k
1M
10M
1
10
100
1000
I
(mA)
FREQUENCY (Hz)
LOAD
Figure 14. Dropout Voltage vs. Load Current (ILOAD
)
Figure 17. Power Supply Rejection Ratio vs. Frequency, VOUT = 1.2 V, VIN = 2.2 V
0
3.35
3.30
3.25
3.20
3.15
3.10
3.05
3.00
LOAD = 150mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
–10
–20
LOAD = 100µA
–30
–40
–50
–60
–70
–80
–90
–100
LOAD = 1mA
LOAD = 5mA
LOAD = 10mA
LOAD = 50mA
LOAD = 100mA
LOAD = 250mA
10
100
1k
10k
100k
1M
10M
3.1
3.2
3.3
3.4
3.5
3.6
FREQUENCY (Hz)
V
(V)
IN
Figure 15. Output Voltage (VOUT) vs. Input Voltage (VIN) in Dropout
Figure 18. Power Supply Rejection Ratio vs. Frequency, VOUT = 2.5 V, VIN = 3.5 V
Rev. G | Page 9 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
LOAD = 150mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
–10
–20
LOAD = 100µA
–30
–40
–50
–60
–70
–80
–90
–100
LOAD = 150mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 19. Power Supply Rejection Ratio vs. Frequency, VOUT = 3.3 V, VIN = 4.3 V
Figure 22. Power Supply Rejection Ratio vs. Frequency
Various Output Voltages and Load Currents, VOUT = 3.3 V, VIN = 3.8 V
0
0
LOAD = 3.3V/150mA
LOAD = 150mA
LOAD = 2.5V/150mA
LOAD = 1.2V/150mA
LOAD = 3.3V/1mA
LOAD = 2.5V/1mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
–10
–10
–20
–20
LOAD = 100µA
–30
LOAD = 1.2V/1mA
–30
–40
–50
–60
–70
–80
–90
–100
–40
–50
–60
–70
–80
–90
–100
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20. Power Supply Rejection Ratio vs. Frequency
Various Output Voltages and Load Currents, VIN − VOUT = 1 V
Figure 23. Adjustable ADP161 Power Supply Rejection Ratio vs. Frequency,
VOUT = 3.3 V, VIN = 4.3 V
0
1k
100
10
V
V
V
= 3.3V
= 2.5V
= 1.2V
OUT
OUT
OUT
–10
ADJ 3.3V
–20
–30
–40
–50
–60
–70
–80
–90
–100
LOAD = 150mA
LOAD = 100mA
LOAD = 10mA
LOAD = 1mA
LOAD = 100µA
1
10
100
1k
10k
100k
1M
10M
0.001
0.01
0.1
1
10
100
1000
FREQUENCY (Hz)
LOAD CURRENT (mA)
Figure 21. Power Supply Rejection Ratio vs. Frequency
Various Output Voltages and Load Currents, VOUT = 2.5 V, VIN = 3.0 V
Figure 24. Output Noise vs. Load Current and Output Voltage,
VIN = 5 V, COUT = 1 µF
Rev. G | Page 10 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
T
10
V
V
V
= 1.2V
= 3.3V
= 2.5V
OUT
OUT
OUT
V
IN
1
V
OUT
2
1
0.1
10
CH1 1V Ω
CH2 20mV
M200µs
A
CH1
4.34V
100
1k
10k
100k
T
10.20%
FREQUENCY (Hz)
Figure 25. Output Noise Spectral Density, VIN = 5 V, ILOAD = 10 mA, COUT = 1 µF
Figure 28. Line Transient Response, VIN = 4 V to 5 V, CIN = COUT = 1 μF,
LOAD = 150 mA, CH1 = VIN, CH2 = VOUT
I
T
T
LOAD CURRENT
V
IN
1
2
V
OUT
V
OUT
2
1
CH1 1V Ω
CH2 20mV
M200µs
A
CH1
4.56V
CH1 100mA Ω CH2 200mV
M200µs
A
CH1
62mA
T
10.20%
T
10.40%
Figure 29. Line Transient Response, VIN = 4 V to 5 V, CIN, = 1 μF, COUT = 10 μF,
LOAD = 150 mA, CH1 = VIN, CH2 = VOUT
Figure 26. Load Transient Response, CIN, COUT = 1 µF, ILOAD = 1 mA to 150 mA,
200 ns Rise Time, CH1 = Load Current, CH2 = VOUT
I
T
LOAD CURRENT
1
V
OUT
2
CH1 20mA Ω CH2 5mV
M200µs
A
CH1
24mA
T
10.40%
Figure 27. Load Transient Response, CIN, COUT = 1 μF, ILOAD = 1 mA to 50 mA,
200 ns Rise Time, CH1 = Load Current, CH2 = VOUT
Rev. G | Page 11 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
THEORY OF OPERATION
The ADP16x are ultralow quiescent current, low dropout linear
regulators that operate from 2.2 V to 5.5 V and can provide up to
150 mA of output current. Drawing only 560 nA (typical) at no
load and a low 42 µA of quiescent current (typical) at full load
makes the ADP16x ideal for battery-operated portable equip-
ment. Shutdown current consumption is typically 50 nA.
VIN
VOUT
SHORT CIRCUIT,
UVLO, AND
THERMAL
GND
PROTECT
ADJ
EN
SHUTDOWN
Using new innovative design techniques, the ADP16x provide
ultralow quiescent current and superior transient performance
for digital and RF applications. The ADP16x are also optimized
for use with small 1 µF ceramic capacitors.
REFERENCE
ADP163
Figure 33. Internal Block Diagram, Adjustable Output without Output
Discharge Function
VIN
VOUT
Internally, the ADP16x consists of a reference, an error amplifier, a
feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device, which is controlled
by the error amplifier. The error amplifier compares the reference
voltage with the feedback voltage from the output and amplifies
the difference. If the feedback voltage is lower than the reference
voltage, the gate of the PMOS device is pulled lower, allowing
more current to pass and increasing the output voltage. If the
feedback voltage is higher than the reference voltage, the gate
of the PMOS device is pulled higher, allowing less current to pass
and decreasing the output voltage.
SHORT CIRCUIT,
UVLO, AND
THERMAL
GND
R1
R2
R3
PROTECT
EN
SHUTDOWN
REFERENCE
ADP160
Figure 30. Internal Block Diagram, Fixed Output with Output Discharge Function
VIN
VOUT
The adjustable ADP161/ADP163 have an output voltage range
of 1.0 V to 4.2 V. The output voltage is set by the ratio of two
external resistors, as shown in Figure 2. The device servos the
output to maintain the voltage at the ADJ pin at 1.0 V refe-
renced to ground. The current in R1 is then equal to 1.0 V/R2,
and the current in R1 is the current in R2 plus the ADJ pin bias
current. The ADJ pin bias current, 10 nA at 25°C, flows through
R1 into the ADJ pin.
SHORT CIRCUIT,
UVLO, AND
THERMAL
GND
R1
PROTECT
ADJ
EN
SHUTDOWN
REFERENCE
ADP161
Figure 31. Internal Block Diagram, Adjustable Output with Output Discharge
Function
The output voltage can be calculated using the equation:
V
OUT = 1.0 V(1 + R1/R2) + (ADJI-BIAS)(R1)
VIN
VOUT
The value of R1 should be less than 200 kΩ to minimize errors in
the output voltage caused by the ADJ pin bias current. For example,
when R1 and R2 each equal 200 kΩ, the output voltage is 2.0 V.
The output voltage error introduced by the ADJ pin bias current
is 2 mV or 0.05%, assuming a typical ADJ pin bias current of
10 nA at 25°C.
SHORT CIRCUIT,
UVLO, AND
THERMAL
GND
R1
R2
PROTECT
EN
SHUTDOWN
REFERENCE
ADP162
Figure 32. Internal Block Diagram, Fixed Output without Output Discharge
Function
Rev. G | Page 12 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
To minimize quiescent current in the ADP161 and ADP163
Analog Devices, Inc., recommends using high values of
resistance for R1 and R2. Using a value of 1 MΩ for R2 keeps
the total, no load quiescent current below 2 µA. Note however,
that high value of resistance introduces a small output voltage
error. For example, assuming R1 and R2 are 1 MΩ, the output
voltage is 2 V. Taking into account the nominal ADJ pin bias
current of 10 nA, the output voltage error is 0.25%.
The ADP160/ADP161 also include an output discharge resistor to
force the output voltage to zero when the LDO is disabled. This
ensures that the output of the LDO is always in a well-defined state,
whether it is enabled or not. The ADP162/ADP163 do not
include the output discharge function.
The ADP160/ADP162 are available in 15 output voltage options,
ranging from 1.2 V to 4.2 V. The ADP16x use the EN pin to enable
and disable the VOUT pin under normal operating conditions.
When EN is high, VOUT turns on, and when EN is low, VOUT
turns off. For automatic startup, EN can be tied to VIN.
Note that in shutdown, the output is turned off and the divider
current is zero.
Rev. G | Page 13 of 24
ADP160/ADP161/ADP162/ADP163
APPLICATIONS INFORMATION
Data Sheet
Input and Output Capacitor Properties
CAPACITOR SELECTION
Any good quality ceramic capacitors can be used with the
ADP16x, as long as they meet the minimum capacitance and
maximum ESR requirements. Ceramic capacitors are manufactured
with a variety of dielectrics, each with different behavior over
temperature and applied voltage. Capacitors must have a dielectric
adequate to ensure the minimum capacitance over the necessary
temperature range and dc bias conditions. X5R or X7R dielectrics
with a voltage rating of 6.3 V or 10 V are recommended. Y5V
and Z5U dielectrics are not recommended due to their poor
temperature and dc bias characteristics.
Output Capacitor
The ADP16x are designed for operation with small, space-
saving ceramic capacitors, but function with most commonly
used capacitors as long as care is taken with regard to the
effective series resistance (ESR) value. The ESR of the output
capacitor affects stability of the LDO control loop. A minimum
of 1 µF capacitance with an ESR of 1 Ω or less is recommended
to ensure stability of the ADP16x. Transient response to
changes in load current is also affected by output capacitance.
Using a larger value of output capacitance improves the transient
response of the ADP16x to large changes in load current. Figure 34
and Figure 35 show the transient responses for output
capacitance values of 1 µF and 10 µF, respectively.
Figure 36 depicts the capacitance vs. voltage bias characteristic
of a 0402, 1 µF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the X5R
dielectric is about 15% over the −40°C to +85°C temperature
range and is not a function of package or voltage rating.
1.2
T
LOAD CURRENT
1
1.0
0.8
0.6
0.4
0.2
0
2
V
OUT
CH1 100mA Ω CH2 200mV
M200µs
T
A
CH1
62mA
10.40%
Figure 34. Output Transient Response, COUT = 1 µF,
CH1 = Load Current, CH2 = VOUT
T
0
2
4
6
8
10
LOAD CURRENT
VOLTAGE
Figure 36. Capacitance vs. Voltage Characteristic
1
Use Equation 1 to determine the worst-case capacitance accounting
for capacitor variation over temperature, component tolerance,
and voltage.
C
EFF = CBIAS × (1 − TEMPCO) × (1 − TOL)
where:
(1)
2
V
OUT
C
BIAS is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, the worst-case temperature coefficient (TEMPCO)
over −40°C to +85°C is assumed to be 15% for an X5R dielectric.
The tolerance of the capacitor (TOL) is assumed to be 10%, and
CH1 100mA Ω CH2 200mV
M200µs
A
CH1
74mA
T
10.00%
Figure 35. Output Transient Response, COUT = 10 µF,
CH1 = Load Current, CH2 = VOUT
C
BIAS is 0.94 µF at 1.8 V, as shown in Figure 36.
Substituting these values in Equation 1 yields
EFF = 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 µF
Input Bypass Capacitor
Connecting a 1 µF capacitor from VIN to GND reduces the circuit
sensitivity to the printed circuit board (PCB) layout, especially
when long input traces or high source impedance are encountered.
If greater than 1 µF of output capacitance is required, the input
capacitor should be increased to match it.
C
Therefore, the capacitor chosen in this example meets
the minimum capacitance requirement of the LDO over
temperature and tolerance at the chosen output voltage.
Rev. G | Page 14 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
To guarantee the performance of the ADP16x, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors are evaluated for each.
The start-up behavior of the ADP16x is shown in Figure 39.
The shutdown behavior of the ADP160/ADP161 is shown in
Figure 40.
3.5
ENABLE FEATURE
3.3V
The ADP16x use the EN pin to enable and disable the VOUT
pin under normal operating conditions. As shown in Figure 37,
when a rising voltage on EN crosses the active threshold, VOUT
turns on. When a falling voltage on EN crosses the inactive
threshold, VOUT turns off.
3.0
2.5
2.5V
2.0
EN
4.5
1.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1.2V
1.0
0.5
0
0
500 1000 1500 2000 2500 3000 3500 4000 4500
TIME (µs)
Figure 39. Typical Start-Up Behavior (ADP16x)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
C
= 1µF
OUT
0.5
0.7
0.9
1.1
1.3
1.5
EN VOLTAGE (V)
Figure 37. Typical EN Pin Operation
4.2V
EN
As shown in Figure 37, the EN pin has hysteresis built in. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
1.2V
The EN pin active/inactive thresholds are derived from the VIN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 38 shows typical EN active/inactive thresholds
when the input voltage varies from 2.2 V to 5.5 V.
1.1
0
200
400
600
TIME (µs)
800
1000
Figure 40. Typical Shutdown Behavior, No Load (ADP160/ADP161)
CURRENT LIMIT AND THERMAL OVERLOAD
PROTECTION
1.0
0.9
The ADP16x are protected against damage due to excessive
power dissipation by current and thermal overload protection
circuits. The ADP16x are designed to current limit when the
output load reaches 320 mA (typical). When the output load
exceeds 320 mA, the output voltage is reduced to maintain a
constant current limit.
EN RISE
0.8
EN FALL
0.7
0.6
Thermal overload protection is included, which limits the junction
temperature to a maximum of 150°C (typical). Under extreme
conditions (that is, high ambient temperature and power dissipation),
when the junction temperature starts to rise above 150°C, the
output is turned off, reducing the output current to zero. When
the junction temperature drops below 135°C, the output is turned
on again and the output current is restored to its nominal value.
0.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
INPUT VOLTAGE (V)
Figure 38. Typical EN Pin Thresholds vs. Input Voltage
Rev. G | Page 15 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
Consider the case where a hard short from OUT to ground
occurs. At first, the ADP16x current limit so that only 320 mA
is conducted into the short. If self-heating of the junction is
great enough to cause its temperature to rise above 150°C,
thermal shutdown activates, turning off the output and
reducing the output current to zero. As the junction tempera-
ture cools and drops below 135°C, the output turns on and
conducts 320 mA into the short, again causing the junction
temperature to rise above 150°C. This thermal oscillation
between 135°C and 150°C causes a current oscillation between
320 mA and 0 mA that continues as long as the short remains
at the output.
Table 9. Typical ΨJB Values
ΨJB (°C/W)
TSOT
WLCSP
42.8
58.4
The junction temperature of the ADP16x can be calculated
from the following equation:
TJ = TA + (PD × θJA)
(2)
(3)
where:
TA is the ambient temperature.
PD is the power dissipation in the die, given by
PD = [(VIN − VOUT) × ILOAD] + (VIN × IGND
where:
)
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For reliable
operation, device power dissipation must be externally limited
so junction temperatures do not exceed 125°C.
I
LOAD is the load current.
IGND is the ground current.
VIN and VOUT are input and output voltages, respectively.
THERMAL CONSIDERATIONS
Power dissipation due to ground current is quite small and can be
ignored. Therefore, the junction temperature equation simplifies to
the following:
In most applications, the ADP16x do not dissipate much heat due
to their high efficiency. However, in applications with high ambient
temperature and high supply voltage to output voltage differential,
the heat dissipated in the package is large enough that it can cause
the junction temperature of the die to exceed the maximum
junction temperature of 125°C.
TJ = TA + {[(VIN − VOUT) × ILOAD] × θJA}
(4)
As shown in Equation 4, for a given ambient temperature, input-
to-output voltage differential, and continuous load current, there
exists a minimum copper size requirement for the PCB to ensure
the junction temperature does not rise above 125°C. Figure 41 to
Figure 48 show the junction temperature calculations for the
different ambient temperatures, load currents, VIN-to-VOUT
differentials, and areas of PCB copper.
When the junction temperature exceeds 150°C, the converter enters
thermal shutdown. It recovers only after the junction temperature
has decreased below 135°C to prevent any permanent damage.
Therefore, thermal analysis for the chosen application is very
important to guarantee reliable performance over all conditions.
The junction temperature of the die is the sum of the ambient
temperature of the environment and the temperature rise of the
package due to the power dissipation, as shown in Equation 2.
In the case where the board temperature is known, use the
thermal characterization parameter, ΨJB, to estimate the junction
temperature rise (see Figure 49 and Figure 50). Maximum
junction temperature (TJ) is calculated from the board
temperature (TB) and power dissipation (PD) using the
following formula:
To guarantee reliable operation, the junction temperature of
the ADP16x must not exceed 125°C. To ensure the junction
temperature stays below this maximum value, the user needs to
be aware of the parameters that contribute to junction temperature
changes. These parameters include ambient temperature, power
dissipation in the power device, and thermal resistances between
the junction and ambient air (θJA). The θJA number is dependent
on the package assembly compounds that are used and the amount
of copper used to solder the package GND pins to the PCB.
Table 8 shows the typical θJA values of the 5-lead TSOT and the
4-ball WLCSP for various PCB copper sizes. Table 9 shows the
typical ΨJB value of the 5-lead TSOT and 4-ball WLCSP.
TJ = TB + (PD × ΨJB)
(5)
The typical value of ΨJB is 58°C/W for the 4-ball WLCSP package
and 43°C/W for the 5-lead TSOT package.
140
MAXIMUM JUNCTION TEMPERATURE
120
100
80
Table 8. Typical θJA Values
60
θJA (°C/W)
Copper Size (mm2)
TSOT
170
152
146
134
131
WLCSP
260
159
157
153
40
01
20
I
I
I
= 1mA
= 10mA
= 50mA
I
I
I
= 100mA
= 150mA
= 200mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
50
100
300
500
0
0.3
0.8
1.3
1.8
2.3
– V
2.8
(V)
3.3
3.8
4.3
4.8
V
IN
OUT
151
Figure 41. 500 mm2 of PCB Copper, WLCSP, TA = 25°C
1 Device soldered to minimum size pin traces.
Rev. G | Page 16 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
140
120
100
80
140
120
100
80
MAXIMUM JUNCTION TEMPERATURE
MAXIMUM JUNCTION TEMPERATURE
60
60
40
40
20
20
I
I
I
= 1mA
= 10mA
= 50mA
I
I
I
= 100mA
= 150mA
= 200mA
I
I
I
= 1mA
= 10mA
= 50mA
I
I
I
= 100mA
= 150mA
= 200mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
0
0.3
0
0.3
0.8
1.3
1.8
2.3
– V
2.8
(V)
3.3
3.8
4.3
4.8
4.8
4.8
0.8
1.3
1.8
2.3
– V
2.8
(V)
3.3
3.8
4.3
4.8
4.8
4.8
V
V
IN
OUT
IN
OUT
Figure 42. 100 mm2 of PCB Copper, WLCSP, TA = 50°C
Figure 45. 500 mm2 of PCB Copper, TSOT, TA = 25°C
140
120
100
80
140
120
100
80
MAXIMUM JUNCTION TEMPERATURE
MAXIMUM JUNCTION TEMPERATURE
60
60
40
40
20
20
I
I
I
= 1mA
= 10mA
= 50mA
I
I
I
= 100mA
= 150mA
= 200mA
I
I
I
= 1mA
= 10mA
= 50mA
I
I
I
= 100mA
= 150mA
= 200mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
0
0
0.3
0.3
0.8
1.3
1.8
2.3
– V
2.8
(V)
3.3
3.8
4.3
0.8
1.3
1.8
2.3
– V
2.8
(V)
3.3
3.8
4.3
V
V
IN
OUT
IN
OUT
Figure 43. 500 mm2 of PCB Copper, WLCSP, TA = 85°C
Figure 46. 100 mm2 of PCB Copper, TSOT, TA = 25°C
140
120
100
80
140
120
100
80
MAXIMUM JUNCTION TEMPERATURE
MAXIMUM JUNCTION TEMPERATURE
60
60
40
40
20
20
I
I
I
= 1mA
= 10mA
= 50mA
I
I
I
= 100mA
= 150mA
= 200mA
I
I
I
= 1mA
= 10mA
= 50mA
I
I
I
= 100mA
= 150mA
= 200mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
0
0
0.3
0.3
0.8
1.3
1.8
2.3
– V
2.8
(V)
3.3
3.8
4.3
0.8
1.3
1.8
2.3
– V
2.8
(V)
3.3
3.8
4.3
V
V
IN
OUT
IN
OUT
Figure 44. 100 mm2 of PCB Copper, WLCSP, TA = 50°C
Figure 47. 500 mm2 of PCB Copper, TSOT, TA = 50°C
Rev. G | Page 17 of 24
ADP160/ADP161/ADP162/ADP163
Data Sheet
140
Place the input capacitor as close as possible to the VIN and
MAXIMUM JUNCTION TEMPERATURE
GND pins. Place the output capacitor as close as possible to the
VOUT and GND pins. Use of 0402 or 0603 size capacitors and
resistors achieves the smallest possible footprint solution on
boards where area is limited.
120
100
80
LIGHT SENSITIVITY OF WLCSPs
60
The WLCSP package option is essentially a silicon die with
additional post fabrication dielectric and metal processing
designed to contact solder bumps on the active side of the chip.
With this package type, the die is exposed to ambient light and
is subject to photoelectric effects. Light sensitivity analysis of
a WLCSP mounted on standard PCB material reveals that
performance may be impacted when the package is illuminated
directly by high intensity light. No degradation in electrical
performance is observed due to illumination by low intensity
(0.1 mW/cm2) ambient light. Direct sunlight can have inten-
sities of 50 mW/cm2, office ambient light can be as low as
0.1 mW/cm2.
40
20
I
I
I
= 1mA
= 10mA
= 50mA
I
I
I
= 100mA
= 150mA
= 200mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
0
0.3
0.8
1.3
1.8
2.3
– V
2.8
(V)
3.3
3.8
4.3
4.8
4.8
4.8
V
IN
OUT
Figure 48. 100 mm2 of PCB Copper, TSOT, TA = 50°C
140
120
100
80
MAXIMUM JUNCTION TEMPERATURE
When the WLCSP is assembled on the board with the bump
side of the die facing the PCB, reflected light from the PCB
surface is incident on active silicon circuit areas and results
in the increased leakage currents. No performance degrada-
tion occurs due to illumination of the backside (substrate) of
t h e W L C SP.
60
40
20
I
I
I
= 1mA
= 10mA
= 50mA
I
I
I
= 100mA
= 150mA
= 200mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
All WLCSPs are particularly sensitive to incident light with
wavelengths in the near infrared range (NIR, 700 nm to 1000 nm).
Photons in this waveband have a longer wavelength and lower
energy than photons in the visible (400 nm to 700 nm) and near
ultraviolet (NUV, 200 nm to 400 nm) bands; therefore, they can
penetrate more deeply into the active silicon.
0
0.3
0.8
1.3
1.8
2.3
– V
2.8
(V)
3.3
3.8
4.3
V
IN
OUT
Figure 49. WLCSP, TA = 85°C
140
120
100
80
MAXIMUM JUNCTION TEMPERATURE
Incident light with wavelengths greater than 1100 nm has
no photoelectric effect on silicon devices because silicon is
transparent to wavelengths in this range.
The spectral content of conventional light sources varies
considerably. Sunlight has a broad spectral range, with peak
intensity in the visible band that falls off in the NUV and NIR
bands; fluorescent lamps have significant peaks in the visible
but not the NUV or NIR bands. Tungsten lighting has a broad
peak in the longer visible wavelengths with a significant tail in
the NIR.
60
40
20
I
I
I
= 1mA
= 10mA
= 50mA
I
I
I
= 100mA
= 150mA
= 200mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
0
0.3
0.8
1.3
1.8
2.3
– V
2.8
(V)
3.3
3.8
4.3
Efforts have been made at a product level to reduce the effect of
ambient light; the under bump metal (UBM) has been designed
to shield the sensitive circuit areas on the active side (bump
side) of the die. However, if an application encounters any light
sensitivity with the WLCSP, shielding the bump side of the
WLCSP package with opaque material should eliminate this
effect. Shielding can be accomplished using materials such as
silica-filled liquid epoxies like those used in flip-chip underfill
techniques.
V
IN
OUT
Figure 50. TSOT, TA = 85°C
PCB LAYOUT CONSIDERATIONS
Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP16x. However,
as listed in Table 8, a point of diminishing returns is reached
eventually, beyond which an increase in the copper size does
not yield significant heat dissipation benefits.
Rev. G | Page 18 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
Figure 51. Example of 5-Lead TSOT PCB Layout
Figure 52. Example of 4-Ball WLCSP PCB Layout
Rev. G | Page 19 of 24
ADP160/ADP161/ADP162/ADP163
OUTLINE DIMENSIONS
Data Sheet
2.90 BSC
5
1
4
3
2.80 BSC
1.60 BSC
2
0.95 BSC
1.90
BSC
*
0.90 MAX
0.70 MIN
*
1.00 MAX
0.20
0.08
8°
4°
0°
0.10 MAX
0.50
0.30
0.60
0.45
0.30
SEATING
PLANE
*
COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 53. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions shown in millimeters
1.000
0.965 SQ
0.925
2
1
A
B
BALL A1
IDENTIFIER
0.50
REF
TOP VIEW
(BALL SIDE DOWN)
BOTTOM VIEW
(BALL SIDE UP)
0.370
0.355
0.340
0.640
0.595
0.550
END VIEW
COPLANARITY
0.03
SEATING
PLANE
0.270
0.240
0.210
0.340
0.320
0.300
Figure 54. 4-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-4-1)
Dimensions shown in millimeters
Rev. G | Page 20 of 24
Data Sheet
ADP160/ADP161/ADP162/ADP163
ORDERING GUIDE
Model1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Output Voltage (V)
Package Description
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
4-Ball WLCSP
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
Evaluation Board Kit
Evaluation Board Kit
Evaluation Board
Evaluation Board
Package Option
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
Branding
5K
5L
5N
5P
AH
5Q
AM
5R
5S
ADP160ACBZ-1.2-R7
ADP160ACBZ-1.5-R7
ADP160ACBZ-1.8-R7
ADP160ACBZ-2.1-R7
ADP160ACBZ-2.3-R7
ADP160ACBZ-2.5-R7
ADP160ACBZ-2.7-R7
ADP160ACBZ-2.75-R7
ADP160ACBZ-2.8-R7
ADP160ACBZ-2.85-R7
ADP160ACBZ-3.0-R7
ADP160ACBZ-3.3-R7
ADP160ACBZ-4.2-R7
ADP160AUJZ-1.2-R7
ADP160AUJZ-1.5-R7
ADP160AUJZ-1.8-R7
ADP160AUJZ-2.3-R7
ADP160AUJZ-2.5-R7
ADP160AUJZ-2.7-R7
ADP160AUJZ-2.8-R7
ADP160AUJZ-3.0-R7
ADP160AUJZ-3.3-R7
ADP160AUJZ-4.2-R7
ADP161AUJZ-R7
1.2
1.5
1.8
2.1
2.3
2.5
2.7
2.75
2.8
2.85
3.0
3.3
4.2
1.2
1.5
1.8
2.3
2.5
5T
5U
5V
6U
LDQ
LDR
LE0
LLP
LFZ
LJF
LG0
Y2U
LG1
LGY
LHW
70
71
72
BC
73
74
75
LH9
LLN
LLQ
LHB
LJK
LHC
LHD
LHE
LHF
LHG
2.7
2.8
3.0
3.3
4.2
UJ-5
Adjustable
1.2
1.8
2.1
2.3
2.8
3.0
4.2
1.5
1.8
2.3
2.5
2.7
2.8
3.0
3.3
4.2
UJ-5
ADP162ACBZ-1.2-R7
ADP162ACBZ-1.8-R7
ADP162ACBZ-2.1-R7
ADP162ACBZ-2.3-R7
ADP162ACBZ-2.8-R7
ADP162ACBZ-3.0-R7
ADP162ACBZ-4.2-R7
ADP162AUJZ-1.5-R7
ADP162AUJZ-1.8-R7
ADP162AUJZ-2.3-R7
ADP162AUJZ-2.5-R7
ADP162AUJZ-2.7-R7
ADP162AUJZ-2.8-R7
ADP162AUJZ-3.0-R7
ADP162AUJZ-3.3-R7
ADP162AUJZ-4.2-R7
ADP163AUJZ-R7
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
CB-4-1
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
Adjustable
UJ-5
ADP160UJZ-REDYKIT
ADP162UJZ-REDYKIT
ADP161UJ-EVALZ
ADP163UJ-EVALZ
1 Z = RoHS Compliant Part.
Rev. G | Page 21 of 24
ADP160/ADP161/ADP162/ADP163
NOTES
Data Sheet
Rev. G | Page 22 of 24
Data Sheet
NOTES
ADP160/ADP161/ADP162/ADP163
Rev. G | Page 23 of 24
ADP160/ADP161/ADP162/ADP163
NOTES
Data Sheet
©2010–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08628-0-12/12(G)
Rev. G | Page 24 of 24
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