ADP3339AKCZ-5-R7 [ADI]
High Accuracy, Ultralow IQ, 1.5 A, anyCAP Low Dropout Regulator; 高精度，超低IQ ， 1.5 A ，公司的anyCAP低压差稳压器
| 型号： | ADP3339AKCZ-5-R7 |
| 厂家： | 
ADI |
| 描述： | High Accuracy, Ultralow IQ, 1.5 A, anyCAP Low Dropout Regulator |
| 文件： | 总12页 (文件大小：252K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Accuracy, Ultralow IQ, 1.5 A,
anyCAP Low Dropout Regulator
ADP3339
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
High accuracy over line and load: 0.9ꢀ at 25°C,
1.5ꢀ over temperature
Ultralow dropout voltage: 230 mV (typical) at 1.5 A
Requires only COUT = 1.0 μF for stability
anyCAP = stable with any type of capacitor (including MLCC)
Current and thermal limiting
Q1
OUT
IN
ADP3339
R1
THERMAL
PROTECTION
CC
g
DRIVER
m
R2
Low noise
2.8 V to 6 V input voltage range
BANDGAP
REF
−40°C to +85°C ambient temperature range
SOT-223 package
GND
Figure 1.
APPLICATIONS
Notebooks, palmtop computers
SCSI terminators
Battery-powered systems
PCMCIA regulators
ADP3339
V
IN
V
OUT
OUT
IN
1μF
1μF
GND
Bar code scanners
Camcorders, cameras
Figure 2. Typical Application Circuit
GENERAL DESCRIPTION
The ADP3339 is a member of the ADP33xx family of precision,
low dropout, anyCAP® voltage regulators. The ADP3339
operates with an input voltage range of 2.8 V to 6 V and delivers
a load current up to 1.5 A. The ADP3339 stands out from the
conventional LDOs with a novel architecture and an enhanced
process that enables it to offer performance advantages and
higher output current than its competition. Its patented design
requires only a 1.0 μF output capacitor for stability. This device
is insensitive to output capacitor equivalent series resistance
(ESR), and is stable with any good quality capacitor, including
ceramic (MLCC) types for space-restricted applications. The
ADP3339 achieves exceptional accuracy of 0.9% at room
temperature and 1.5% over temperature, line, and load
variations. The dropout voltage of the ADP3339 is only 230 mV
(typical) at 1.5 A. The device also includes a safety current limit
and thermal overload protection. The ADP3339 has ultralow
quiescent current: 130 μA (typical) in light load situations.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2001–2011 Analog Devices, Inc. All rights reserved.
ADP3339
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Theory of Operation .........................................................................9
Applications Information.............................................................. 10
Capacitor Selection .................................................................... 10
Output Current Limit ................................................................ 10
Thermal Overload Protection .................................................. 10
Calculating Power Dissipation ................................................. 10
Printed Circuit Board Layout Considerations ....................... 10
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 11
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
REVISION HISTORY
8/11—Rev. B to Rev. C
Changes to Ordering Guide .......................................................... 11
4/11—Rev. A to Rev. B
Change to Features Section ............................................................. 1
Changed IL to ILOAD Throughout..................................................... 3
Updated Outline Dimensions....................................................... 11
Changes to Ordering Guide .......................................................... 11
6/04—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Changes to Table 1............................................................................ 3
Changes to Thermal Overload Protection Section.................... 10
Updated Outline Dimensions....................................................... 12
Changes to Ordering Guide .......................................................... 12
10/01—Revision 0: Initial Version
Rev. C | Page 2 of 12
Data Sheet
ADP3339
SPECIFICATIONS
VIN = 6.0 V, CIN = COUT = 1 μF, TJ =–40°C to +125°C, unless otherwise noted.
Table 1.
Parameter1, 2
Symbol Conditions
Min Typ
Max Unit
OUTPUT
Voltage Accuracy3
VOUT
VIN = VOUTNOM + 0.5 V to 6 V, ILOAD = 0.1 mA to 1.5 A, TJ = 25°C
VIN = VOUTNOM + 0.5 V to 6 V, ILOAD = 0.1 mA to 1.5 A, TJ = –40°C to +125°C –1.5
VIN = VOUTNOM + 0.5 V to 6 V, ILOAD = 100 mA to 1.5 A, TJ = 150°C
VIN = VOUTNOM + 0.5 V to 6 V, TJ = 25°C
ILOAD = 0.1 mA to 1.5 A, TJ = 25°C
VOUT = 98% of VOUTNOM
–0.9
+0.9
+1.5
+1.9
%
%
%
mV/V
mV/mA
–1.9
Line Regulation3
Load Regulation
Dropout Voltage
0.04
0.004
VDROP
ILOAD = 1.5 A
ILOAD = 1 A
ILOAD = 500 mA
ILOAD = 100 mA
230
180
150
100
2.0
480
380
300
mV
mV
mV
mV
A
Peak Load Current
Output Noise
ILDPK
VNOISE
VIN = VOUTNOM + 1 V
f = 10 Hz to 100 kHz, CL = 10 μF, ILOAD = 1.5 A
95
μV rms
GROUND CURRENT
In Regulation
IGND
ILOAD = 1.5 A
ILOAD = 1 A
ILOAD = 500 mA
ILOAD = 100 mA
ILOAD = 0.1 mA
VIN = VOUTNOM − 100 mV, ILOAD = 0.1 mA
13
9
5
1
130
100
40
25
15
3
200
300
mA
mA
mA
mA
μA
In Dropout
IGND
μA
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
2 Application stable with no load.
3 VIN = 2.8 V for models with VOUTNOM ≤ 2.3 V.
Rev. C | Page 3 of 12
ADP3339
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
Unless otherwise specified, all voltages are referenced to GND.
Table 2.
Parameter
Rating
Input Supply Voltage
Power Dissipation
Operating Ambient Temperature Range
Operating Junction Temperature Range
θJA, 4-Layer Board
–0.3 V to +8.5 V
Internally limited
–40°C to +85°C
–40°C to +150°C
62.3°C/W
θJC
26.8°C/W
–65°C to +150°C
300°C
ESD CAUTION
Storage Temperature Range
Lead Temperature (Soldering 10 sec)
Vapor Phase (60 sec)
215°C
Infrared (15 sec)
220°C
Rev. C | Page 4 of 12
Data Sheet
ADP3339
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
3
2
1
IN
ADP3339
OUT
OUT
GND
TOP VIEW
(Not to Scale)
NOTES
1. PIN 2 AND OUT TAB ARE
INTERNALLY CONNECTED.
Figure 3. 3-Lead SOT-223 Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
3
GND
OUT
IN
Ground Pin.
Output of the Regulator. Bypass to ground with a 1 μF or larger capacitor.
Regulator Input. Bypass to ground with a 1 μF or larger capacitor.
Rev. C | Page 5 of 12
ADP3339
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
3.301
14
12
10
8
I
= 0A
LOAD
V
= 6V
IN
V
= 3.0V
OUT
3.300
3.299
3.298
3.297
3.296
3.295
3.294
3.293
V
= 3.3V
OUT
I
= 500mA
= 1A
LOAD
6
I
LOAD
4
I
= 1.5A
LOAD
2
0
0
0.5
1.0
1.5
6
3
4
5
LOAD CURRENT (A)
INPUT VOLTAGE (V)
Figure 4. Output Voltage vs. Input Voltage
Figure 7. Ground Current vs. Load Current
3.301
3.300
3.299
3.298
3.297
3.296
3.295
3.294
1.0
0.8
0.6
0.4
0.2
0
V
= 6V
= 3.3V
V
= 6V
IN
IN
V
OUT
I
= 1A
LOAD
I
= 10mA
LOAD
I
= 500mA
LOAD
I
= 1.5A
LOAD
–0.2
–40 –20
0
20
40
60
80
100 120 140
C)
0
0.5
1.0
1.5
JUNCTION TEMPERATURE (
°
LOAD CURRENT (A)
Figure 5. Output Voltage vs. Load Current
Figure 8. Output Voltage Variation Percentage vs. Junction Temperature
180
160
140
120
100
80
25
V
= 3.3V
V
I
= 3.3V
= 0A
OUT
OUT
LOAD
20
15
10
5
I
= 1.5A
LOAD
I
= 1A
LOAD
I
= 0.5A
LOAD
60
40
20
I
= 1mA
LOAD
0
0
0
–40
110
JUNCTION TEMPERATURE (°C)
160
2
4
6
10
60
INPUT VOLTAGE (V)
Figure 6. Ground Current vs. Supply Voltage
Figure 9. Ground Current vs. Junction Temperature
Rev. C | Page 6 of 12
Data Sheet
ADP3339
250
V
C
= 3.3V
= 10μF
= 1.5A
OUT
OUT
V
= 3.3V
OUT
3.31
3.30
3.29
I
LOAD
200
150
100
50
5
4
0
40
220
80
120
TIME (
140
180
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
μ
s)
LOAD CURRENT (mA)
Figure 13. Line Transient Response
Figure 10. Dropout Voltage vs. Load Current
V
C
= 6V
IN
V
= 3.3V
= 1.5A
OUT
= 10μF
OUT
I
LOAD
3.5
3.3
3.1
1.5
1.0
3
2
ꢀ
1
0
0.5
0
0
200
400
600
s)
800
1000
10
0
1
3
4
5
6
7
8
9
2
TIME (
μ
TIME (μs)
Figure 14. Load Transient Response
Figure 11. Power-Up/Power-Down
V
C
= 6V
IN
V
= 3.3V
OUT
= 1μF
OUT
C
= 1μF
= 1.5A
3.5
3.3
3.31
3.30
3.29
OUT
I
LOAD
3.1
1.5
1.0
0.5
0
5
4
0
200
400
600
s)
800
1000
40
80
120
TIME (μs)
140
180
220
TIME (
μ
Figure 15. Load Transient Response
Figure 12. Line Transient Response
Rev. C | Page 7 of 12
ADP3339
Data Sheet
600
500
400
300
200
100
0
V
= 6V
IN
3.3
0
3
2
I
= 1.5A
LOAD
1
0
I
= 0A
20
LOAD
0
200
400
600
s)
800
1000
0
10
30
40
50
TIME (
μ
C
(μF)
L
Figure 16. Short-Circuit Current
Figure 18. RMS Noise vs. CL (10 Hz to 100 kHz)
100
0
V
= 3.3V
OUT
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
10
1
C
= 1μF
= 1.5A
L
I
LOAD
C
= 10μF
= 1.5A
L
C
= 1μF
L
I
LOAD
0.1
C
= 10μF
L
0.01
C
= 10μF
= 0
L
I
LOAD
C
= 1μF
= 0
L
I
LOAD
0.001
10k
10
100
1k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 19. Output Noise Density
Figure 17. Power Supply Ripple Rejection
Rev. C | Page 8 of 12
Data Sheet
ADP3339
THEORY OF OPERATION
The ADP3339 anyCAP LDO uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider, consisting of R1 and R2, which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to
stabilize due to the uncertainty of load capacitance and resis-
tance. Moreover, the ESR value required to keep conventional
LDOs stable changes depending on load and temperature.
These ESR limitations make designing with LDOs more
difficult because of their unclear specifications and extreme
variations over temperature.
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that equilibrium produces a
large, temperature-proportional input offset voltage that is repeata-
ble and very well controlled. The temperature-proportional
offset voltage is combined with the complementary diode volt-
age to form a virtual band gap voltage that is implicit in the
network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control the
loop with only one amplifier. This technique also improves the
noise characteristics of the amplifier by providing more flexibil-
ity on the trade-off of noise sources that leads to a low noise design.
With the ADP3339 anyCAP LDO, this is no longer true. The
ADP3339 can be used with virtually any good quality capacitor,
with no constraint on the minimum ESR. This innovative
design allows the circuit to be stable with just a small 1 μF
capacitor on the output. Additional advantages of the pole-
splitting scheme include superior line noise rejection and very
high regulator gain, which lead to excellent line and load
regulation. An impressive 1.5% accuracy is guaranteed over
line, load, and temperature.
The R1/R2 divider is chosen in the same ratio as the band gap
voltage to the output voltage. Although the R1/R2 resistor
divider is loaded by Diode D1 and a second divider consisting
of R3 and R4, the values can be chosen to produce a temperature-
stable output. This unique arrangement specifically corrects for
the loading of the divider, thus avoiding the error resulting from
base current loading in conventional circuits.
Additional features of the circuit include current limit and
thermal shutdown.
V
V
IN
OUT
C1
C2
1μF
1μF
IN
OUT
GND
ADP3339
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole-splitting arrangement to
achieve reduced sensitivity to the value, type, and ESR of the
load capacitance.
Figure 20. Typical Application Circuit
INPUT
OUTPUT
COMPENSATION
CAPACITOR
Q1
ATTENUATION
R1
(a)
(V
/V
)
BANDGAP OUT
R3 D1
C
R
PTAT
LOAD
NONINVERTING
WIDEBAND
DRIVER
V
OS
g
m
PTAT
LOAD
CURRENT
R4
R2
ADP3339
GND
Figure 21. Functional Block Diagram
Rev. C | Page 9 of 12
ADP3339
Data Sheet
APPLICATIONS INFORMATION
Therefore, for a junction temperature of 125°C and a maximum
ambient temperature of 85°C, the required thermal resistance
from junction to ambient is
CAPACITOR SELECTION
Output Capacitor
The stability and transient response of the LDO is a function of
the output capacitor. The ADP3339 is stable with a wide range
of capacitor values, types, and ESR (anyCAP). A capacitor as low as
1 μF is all that is needed for stability. A higher capacitance may
be necessary if high output current surges are anticipated, or if
the output capacitor cannot be located near the output and
ground pins. The ADP3339 is stable with extremely low ESR
capacitors (ESR ≈ 0) such as multilayer ceramic capacitors
(MLCC) or OSCON. Note that the effective capacitance of
some capacitor types falls below the minimum over tempera-
ture or with dc voltage.
125°C − 85°C
θJA
=
= 32.1°C/W
1.246 W
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
The thermal resistance, θJA, of SOT-223 is determined by the
sum of the junction-to-case and the case-to-ambient thermal
resistances. The junction-to-case thermal resistance, θJC, is
determined by the package design and specified at 26.8°C/W.
However, the case-to-ambient thermal resistance is determined
by the printed circuit board design.
Input Capacitor
As shown in Figure 22, the amount of copper onto which the
ADP3339 is mounted affects thermal performance. When
mounted onto the minimal pads of 2 oz. copper (see Figure 22a),
An input bypass capacitor is not strictly required but is recom-
mended in any application involving long input wires or high
source impedance. Connecting a 1 μF capacitor from the input
to ground reduces the circuit’s sensitivity to PC board layout
and input transients. If a larger output capacitor is necessary, a
larger value input capacitor is also recommended.
θ
JA is 126.6°C/W. Adding a small copper pad under the
ADP3339 (see Figure 22b) reduces the θJA to 102.9°C/W.
Increasing the copper pad to 1 square inch (see Figure 22c)
reduces the θJA even further, to 52.8°C/W.
OUTPUT CURRENT LIMIT
The ADP3339 is short-circuit protected by limiting the pass
transistor’s base drive current. The maximum output current is
limited to about 3 A. See Figure 16.
THERMAL OVERLOAD PROTECTION
The ADP3339 is protected against damage due to excessive power
dissipation by its thermal overload protection circuit. Thermal
protection limits the die temperature to a maximum of 160°C.
Under extreme conditions (that is, high ambient temperature
and power dissipation) where the die temperature starts to rise
above 160°C, the output current is reduced until the die tempera-
ture has dropped to a safe level.
a
b
c
Figure 22. PCB Layouts
Use the following general guidelines when designing printed
circuit boards:
1. Keep the output capacitor as close to the output and
ground pins as possible.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, the device’s power dissipation should be externally
limited so that the junction temperature does not exceed 150°C.
2. Keep the input capacitor as close to the input and ground
pins as possible.
3. PC board traces with larger cross sectional areas remove
more heat from the ADP3339. For optimum heat transfer,
use thick copper and use wide traces.
4. The thermal resistance can be decreased by adding a
copper pad under the ADP3339, as shown in Figure 22b.
5. If possible, use the adjacent area to add more copper
around the ADP3339. Connecting the copper area to the
output of the ADP3339, as shown in Figure 22c, is best, but
thermal performance is improved even if it is connected to
other pins.
6. Use additional copper layers or planes to reduce the
thermal resistance. Again, connecting the other layers to
the output of the ADP3339 is best, but is not necessary.
When connecting the output pad to other layers, use
multiple vias.
CALCULATING POWER DISSIPATION
Device power dissipation is calculated as follows:
PD = (VIN – VOUT) × ILOAD + (VIN × IGND
)
where ILOAD and IGND are the load current and ground current,
and VIN and VOUT are the input and output voltages, respectively.
Assuming worst-case operating conditions are ILOAD = 1.5 A,
I
GND = 14 mA, VIN = 3.3 V, and VOUT = 2.5 V, the device power
dissipation is
PD = (3.3 V – 2.5 V) × 1500 mA + (3.3 V × 14 mA) = 1246 mW
Rev. C | Page 10 of 12
Data Sheet
ADP3339
OUTLINE DIMENSIONS
*
3.15
3.00
2.95
7.30
7.00
6.70
3.70
3.50
3.30
1
2
3
*
0.85
0.70
0.65
2.30
BSC
1.05
0.85
6.70
6.50
6.30
0.35
0.26
0.24
1.30
1.10
16°
10°
1.70
1.50
GAUGE
PLANE
10° MAX
0.75 MIN
0.10
0.02
16°
10°
0.25
4.60 BSC
SEATING
PLANE
*
COMPLIANT TO JEDEC STANDARDS TO-261-AA
WITH THE EXCEPTION TO LEAD WIDTH.
Figure 23. 3-Lead Small Outline Transistor Package [SOT-223]
(KC-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range Output Voltage (V)
Package Description
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
3-Lead SOT-223
Package Option2 Branding
ADP3339AKC-1.5-RL
ADP3339AKCZ-1.5-RL
ADP3339AKCZ-1.5-R7
ADP3339AKCZ-1.8-RL
ADP3339AKCZ-1.8-R7
ADP3339AKCZ-2.5-RL
ADP3339AKCZ-2.5-R7
ADP3339AKC-2.85-RL
ADP3339AKCZ-3-R7
ADP3339AKC-3.3-RL
ADP3339AKCZ-3.3-RL
ADP3339AKCZ-3.3-R7
ADP3339AKCZ-5-R7
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
1.5
1.5
1.5
1.8
1.8
2.5
2.5
2.85
3.0
3.3
3.3
3.3
5
KC-3
KC-3
KC-3
KC-3
KC-3
KC-3
KC-3
KC-3
KC-3
KC-3
KC-3
KC-3
KC-3
L1C
L1C
L19
L19
L1D
L1D
L3F
L1A
L1A
L1A
L3G
1 Z = RoHS Compliant Part.
2 This package option is halide free.
Rev. C | Page 11 of 12
ADP3339
NOTES
Data Sheet
©2001–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02191-0-8/11(C)
Rev. C | Page 12 of 12
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