ADuM5241ARZ [ADI]

Dual-Channel Isolators with isoPower Integrated DC-to-DC Converter, 50 mW; 双通道隔离器采用isoPower集成DC - DC转换器, 50毫瓦
ADuM5241ARZ
型号: ADuM5241ARZ
厂家: ADI    ADI
描述:

Dual-Channel Isolators with isoPower Integrated DC-to-DC Converter, 50 mW
双通道隔离器采用isoPower集成DC - DC转换器, 50毫瓦

转换器 驱动程序和接口 接口集成电路 光电二极管
文件: 总16页 (文件大小:304K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Dual-Channel Isolators with isoPower  
Integrated DC-to-DC Converter, 50 mW  
Data Sheet  
ADuM5240/ADuM5241/ADuM5242  
FEATURES  
FUNCTIONAL BLOCK DIAGRAMS  
Integrated isolated dc-to-dc converter  
Regulated 5 V/10 mA output  
Dual dc to 1 Mbps (NRZ) signal isolation channels  
Narrow-body, 8-lead SOIC package  
RoHS compliant  
1
2
8
7
6
V
OSC.  
RECT.  
REG.  
REG.  
REG.  
V
V
V
DD  
ISO  
OA  
OB  
ENCODE  
V
DECODE  
DECODE  
IA  
IB  
High temperature operation: 105°C  
Precise timing characteristics  
3
4
V
ENCODE  
3 ns maximum pulse width distortion  
3 ns maximum channel-to-channel matching  
70 ns maximum propagation delay  
High common-mode transient immunity: >25 kV/μs  
Safety and regulatory approvals  
UL recognition  
2500 V rms for 1 minute, per UL 1577  
CSA Component Acceptance Notice #5A  
VDE certificate of conformity  
5
GND  
GND  
ISO  
ISO  
ISO  
Figure 1. ADuM5240  
1
2
8
7
6
V
V
OSC.  
RECT.  
V
V
V
DD  
ISO  
IA  
DECODE  
ENCODE  
DECODE  
OA  
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12  
3
4
V
ENCODE  
IB  
OB  
V
IORM = 560 V peak  
5
GND  
GND  
Figure 2. ADuM5241  
GENERAL DESCRIPTION  
The ADuM524x1 are dual-channel digital isolators with isoPower®  
integrated, isolated power. Based on the Analog Devices, Inc.,  
iCoupler® technology, a chip scale dc-to-dc converter provides  
up to 50 mW of regulated, isolated power at 5 V, which eliminates  
the need for a separate isolated dc-to-dc converter in low power  
isolated designs. The Analog Devices chip scale transformer  
iCoupler technology is used both for the isolation of the logic  
signals as well as for the dc-to-dc converter. The result is a small  
form factor, total isolation solution.  
1
2
8
7
6
V
V
OSC.  
RECT.  
V
V
V
DD  
ISO  
IA  
DECODE  
DECODE  
ENCODE  
ENCODE  
OA  
3
4
V
OB  
IB  
5
GND  
GND  
The ADuM524x isolators provide two independent isolation  
channels in a variety of channel configurations, operating from  
a 5 V input supply. ADuM524x units can be used in combination  
with other iCoupler products to achieve greater channel counts.  
Figure 3. ADuM5242  
1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329.  
Rev. B  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 www.analog.com  
Fax: 781.461.3113 ©2007–2012 Analog Devices, Inc. All rights reserved.  
 
 
 
ADuM5240/ADuM5241/ADuM5242  
Data Sheet  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
ESD Caution...................................................................................7  
Pin Configurations and Function Descriptions............................8  
Typical Performance Characteristics ........................................... 10  
Applications Information .............................................................. 11  
DC-to-DC Converter................................................................. 11  
Propagation Delay-Related Parameters................................... 11  
DC Correctness and Magnetic Field Immunity..................... 11  
Thermal Analysis ....................................................................... 12  
PCB Layout ................................................................................. 12  
Increasing Available Power ....................................................... 13  
Insulation Lifetime..................................................................... 13  
Outline Dimensions....................................................................... 14  
Ordering Guide .......................................................................... 14  
General Description ......................................................................... 1  
Functional Block Diagrams............................................................. 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Electrical Characteristics............................................................. 3  
Package Characteristics ............................................................... 5  
Regulatory Information............................................................... 5  
Insulation and Safety-Related Specifications............................ 5  
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation  
Characteristics .............................................................................. 6  
Recommended Operating Conditions ...................................... 6  
Absolute Maximum Ratings............................................................ 7  
REVISION HISTORY  
5/12—Rev. A to Rev. B  
Created Hyperlink for Safety and Regulatory Approvals  
Entry in Features Section................................................................. 1  
Change to PCB Layout Section..................................................... 12  
7/07—Rev. 0 to Rev. A  
Updated VDE Certification Throughout ...................................... 1  
Changes to Features.......................................................................... 1  
Changes to Regulatory Information Section and Table 4 ........... 5  
Changes to Table 5 and Figure 4 Caption...................................... 6  
Changes to Table 7............................................................................ 7  
Added Table 8; Renumbered Sequentially .................................... 7  
Added Insulation Lifetime Section .............................................. 13  
3/07—Revision 0: Initial Version  
Rev. B | Page 2 of 16  
 
Data Sheet  
ADuM5240/ADuM5241/ADuM5242  
SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS  
All voltages are relative to their respective ground. All minimum/maximum specifications apply over the entire recommended operating  
range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD = 5.0 V, VISO = 5.0 V, unless otherwise noted.  
Table 1.  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
DC-TO-DC CONVERTER  
DC-to-DC Converter Enabled  
DC to 1 Mbps Data Rate  
Setpoint  
Logic signal frequency ≤ 1 MHz  
IISO = 0 mA  
VISO = 4.5 V  
VISO (SET)  
IISO (max)  
4.5  
10  
5.2  
5.5  
V
mA  
mV p-p  
Maximum VISO Output Current  
Noise1  
250  
Input Supply Current  
At Maximum IISO Current  
No Load IISO Current  
DC-to-DC Converter Disabled  
Primary Side Supply Input Current2  
ADuM5240  
ADuM5241  
ADuM5242  
Secondary Side Supply Input Current3  
ADuM5240  
IDD (max)  
IDD (Q)  
140  
104  
mA  
mA  
IISO = 10 mA  
IISO = 0 mA  
IDD (DISABLE)  
IDD (DISABLE)  
IDD (DISABLE)  
3.3  
2.7  
2.2  
mA  
mA  
mA  
VDD = 4.0 V  
VDD = 4.0 V  
VDD = 4.0 V  
IISO (DISABLE)  
IISO (DISABLE)  
IISO (DISABLE)  
VDD (ENABLE)  
VDD (DISABLE)  
2.6  
2.8  
3.0  
4.5  
mA  
mA  
mA  
V
ADuM5241  
ADuM5242  
DC-to-DC Converter Enable Threshold4  
DC-to-DC Converter Disable Threshold4  
LOGIC SPECIFICATIONS  
Logic Input Currents  
Logic High Input Threshold  
4.2  
3.7  
V
IIA, IIB  
VIH  
−10  
0.7 (VDD or  
+0.01  
+10  
µA  
V
VISO  
)
Logic Low Input Threshold  
Logic High Output Voltages  
VIL  
0.3 (VDD or  
V
V
V
VISO  
)
VOAH, VOBH (VDD or VISO  
)
(VDD or VISO  
)
IOx = −20 µA, VIx ≥ VIH  
IOx = −4 mA, VIx ≥ VIH  
− 0.1  
(VDD or VISO  
)
(VDD or VISO  
)
− 0.5  
− 0.2  
Logic Low Output Voltages  
VOAL, VOBL  
0.0  
0.0  
0.1  
0.4  
V
V
IOx = 20 µA, VIx ≤ VIL  
IOx = 4 mA, VIx ≤ VIL  
Rev. B | Page 3 of 16  
 
 
ADuM5240/ADuM5241/ADuM5242  
Data Sheet  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
AC SPECIFICATIONS  
Minimum Pulse Width5  
Maximum Data Rate6  
Propagation Delay7  
Pulse Width Distortion, |tPLH − tPHL  
Propagation Delay Skew8  
PW  
100  
ns  
Mbps  
ns  
ns  
ns  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
CL = 15 pF, CMOS signal levels  
1
25  
tPHL, tPLH  
PWD  
tPSK  
70  
3
45  
3
8
|
Channel-to-Channel Matching,  
Codirectional Channels9  
tPSKCD  
ns  
Channel-to-Channel Matching,  
tPSKCD  
15  
ns  
CL = 15 pF, CMOS signal levels  
Opposing-Directional Channels9  
Output Rise/Fall Time (10% to 90%)  
tR/tF  
|CMH|  
2.5  
35  
ns  
kV/µs  
CL = 15 pF, CMOS signal levels  
VIx = VDD, VISO, VCM = 1000 V,  
transient magnitude = 800 V  
Common-Mode Transient  
Immunity at Logic High Output  
Common-Mode Transient  
25  
25  
|CML|  
35  
kV/µs  
VIx = 0 V, VCM = 1000 V,  
Immunity at Logic Low Output  
transient magnitude = 800 V  
Refresh Frequency  
Switching Frequency  
fr  
fOSC  
1.0  
300  
MHz  
MHz  
1 Peak noise occurs at frequency corresponding to the refresh frequency (see the PCB Layout section).  
2 IDD (DISABLE) supply current values are specified with no load present on the digital outputs.  
3 IISO (DISABLE) supply current values are specified with no load present on the digital outputs and power sourced by an external supply.  
4 Enable/disable threshold is the VDD voltage at which the internal dc-to-dc converter is enabled/disabled.  
5 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.  
6 The maximum data rate is the fastest data rate at which the specified pulse width distortion and VISO supply voltage is guaranteed.  
7 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is  
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.  
8 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output  
load within the recommended operating conditions.  
9 Channel-to-channel matching is the absolute value of the difference in propagation delays between the two channels when operated with identical loads.  
Rev. B | Page 4 of 16  
 
Data Sheet  
ADuM5240/ADuM5241/ADuM5242  
PACKAGE CHARACTERISTICS  
Table 2.  
Parameter  
Symbol  
RI-O  
CI-O  
CI  
θJA  
Min  
Typ  
1012  
1.0  
4.0  
80  
Max  
Unit  
pF  
pF  
°C/W  
Test Conditions  
Resistance (Input-to-Output)  
Capacitance (Input-to-Output)  
Input Capacitance  
f = 1 MHz  
IC Junction-to-Air Thermal Resistance  
REGULATORY INFORMATION  
The ADuM524x are approved by the organizations listed in Table 3. Refer to Table 8 and the Insulation Lifetime section for details  
regarding recommended maximum working voltages for specific cross-isolation waveforms and insulation levels.  
Table 3.  
UL  
CSA  
VDE  
Recognized under 1577  
Approved under CSA Component  
Acceptance Notice #5A  
Certified according to DIN V VDE V 0884-10  
(VDE V 0884-10):2006-122  
Component Recognition Program1  
Single/basic insulation, 2500 V rms  
isolation rating  
Basic insulation per CSA 60950-1-03  
and IEC 60950-1, 400 V rms (566 V peak)  
maximum working voltage  
Reinforced insulation, 560 V peak  
File E214100  
File 205078  
File 2471900-4880-0001  
1 In accordance with UL 1577, each ADuM524x is proof-tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 5 µA).  
2 In accordance with DIN V VDE V 0884-10, each ADuM524x is proof-tested by applying an insulation test voltage ≥ 1050 V peak for 1 sec (partial discharge detection  
limit = 5 pC). The asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval.  
INSULATION AND SAFETY-RELATED SPECIFICATIONS  
Table 4.  
Parameter  
Symbol  
Value  
2500  
4.90 min  
Unit  
V rms  
mm  
Conditions  
Rated Dielectric Insulation Voltage  
Minimum External Air Gap (Clearance)  
1-minute duration  
Measured from input terminals to output  
terminals, shortest distance through air  
Measured from input terminals to output  
terminals, shortest distance path along body  
L(I01)  
L(I02)  
Minimum External Tracking (Creepage)  
4.01 min  
mm  
Minimum Internal Gap (Internal Clearance)  
Tracking Resistance (Comparative Tracking Index)  
Isolation Group  
0.017 min  
>175  
IIIa  
mm  
V
Insulation distance through insulation  
DIN IEC 112/VDE 0303 Part 1  
Material Group (DIN VDE 0110, 1/89, Table 1)  
CTI  
Maximum Working Voltage Compatible with  
50-Year Service Life  
VIORM  
425  
V peak Continuous peak voltage across the  
isolation barrier  
Rev. B | Page 5 of 16  
 
 
 
 
 
ADuM5240/ADuM5241/ADuM5242  
Data Sheet  
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS  
This isolator is suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by protective  
circuits.  
Table 5.  
Description  
Conditions  
Symbol Characteristic Unit  
Installation Classification per DIN VDE 0110  
For Rated Mains Voltage ≤ 150 V rms  
For Rated Mains Voltage ≤ 300 V rms  
Climatic Classification  
Pollution Degree (DIN VDE 0110, Table 1)  
Maximum Working Insulation Voltage  
Input-to-Output Test Voltage, Method b1  
I to IV  
I to III  
40/105/21  
2
424  
795  
VIORM  
VPR  
V peak  
V peak  
VIORM × 1.875 = VPR, 100% production  
test, tm = 1 sec, partial discharge < 5 pC  
Input-to-Output Test Voltage, Method a  
After Environmental Tests Subgroup 1  
VPR  
VIORM × 1.6 = VPR, tm = 60 sec, partial  
discharge < 5 pC  
VIORM × 1.2 = VPR, tm = 60 sec, partial  
discharge < 5 pC  
Transient overvoltage, tTR = 10 seconds  
Maximum value allowed in the event of  
a failure; see Figure 4  
680  
V peak  
V peak  
V peak  
After Input and/or Safety Test Subgroup 2 and Subgroup 3  
510  
Highest Allowable Overvoltage  
Safety-Limiting Values  
VTR  
4000  
Case Temperature  
Supply Current  
Insulation Resistance at TS  
TS  
IS1  
RS  
150  
312  
>109  
°C  
mA  
Ω
VIO = 500 V  
350  
300  
250  
200  
150  
100  
50  
RECOMMENDED OPERATING CONDITIONS  
Table 6.  
Parameter  
Value  
Operating Temperature Range (TA)  
Supply Voltages1  
−40°C to +105°C  
VDD, DC-to-DC Converter Enabled  
VDD, DC-to-DC Converter Disabled (VDD)  
4.5 V to 5.5 V  
2.7 V to 4.0 V  
2.7 V to 5.5 V  
1.0 ms  
VISO, DC-to-DC Converter Disabled (VISO  
)
Input Signal Rise/Fall Time  
Input Supply Slew Rate  
10 V/ms  
1 All voltages are relative to their respective ground.  
0
0
200  
50  
100  
150  
AMBIENT TEMPERATURE (°C)  
Figure 4. Thermal Derating Curve, Dependence of Safety-Limiting  
Values on Case Temperature, per DIN V VDE V 0884-10  
Rev. B | Page 6 of 16  
 
 
 
Data Sheet  
ADuM5240/ADuM5241/ADuM5242  
ABSOLUTE MAXIMUM RATINGS  
Table 7.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Parameter  
Rating  
−55°C to +150°C  
Storage Temperature Range (TST)  
Ambient Operating Temperature Range (TA) −40°C to +105°C  
1
Supply Voltages (VDD, VISO  
Input Voltage (VIA, VIB)1  
)
−0.5 V to +7.0 V  
−0.5 V to  
(VDD or VISO) + 0.5 V  
−0.5 V to  
1
Output Voltage (VOA, VOB  
)
(VDD or VISO) + 0.5 V  
−18 mA to +18 mA  
−100 kV/µs to  
+100 kV/µs  
Average Output Current per Pin (IO)2  
Common-Mode Transients (|CM|)3  
ESD CAUTION  
1 All voltages are relative to their respective ground.  
2 See Figure 4 for maximum rated current values for various temperatures.  
3 Refers to common-mode transients across the insulation barrier. Common-  
mode transients exceeding the Absolute Maximum Ratings may cause  
latch-up or permanent damage.  
Table 8. Maximum Continuous Working Voltage1  
Parameter  
Max  
Unit  
Constraint  
AC Voltage, Bipolar Waveform  
AC Voltage, Unipolar Waveform  
Basic Insulation  
Reinforced Insulation  
DC Voltage  
425  
V peak 50-year minimum lifetime  
566  
560  
V peak Maximum approved working voltage per IEC 60950-1  
V peak Maximum approved working voltage per VDE V 0884-10  
Basic Insulation  
Reinforced Insulation  
566  
560  
V peak Maximum approved working voltage per IEC 60950-1  
V peak Maximum approved working voltage per VDE V 0884-10  
1 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more details.  
Rev. B | Page 7 of 16  
 
 
 
 
ADuM5240/ADuM5241/ADuM5242  
Data Sheet  
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS  
V
1
2
3
4
8
7
6
5
V
V
V
DD  
ISO  
OA  
OB  
V
1
2
3
4
8
7
6
5
V
V
V
DD  
OA  
OB  
ISO  
ADuM5240  
V
IA  
IB  
ADuM5242  
V
V
IA  
V
TOP VIEW  
(Not to Scale)  
TOP VIEW  
(Not to Scale)  
IB  
GND  
GND  
ISO  
GND  
GND  
ISO  
Figure 5. ADuM5240 Pin Configuration  
Figure 7. ADuM5242 Pin Configuration  
Table 9. ADuM5240 Pin Function Descriptions  
Table 11. ADuM5242 Pin Function Descriptions  
Pin  
No.  
Pin  
No.  
Mnemonic Description  
Mnemonic Description  
1
VDD  
Supply Voltage for Isolator Primary Side,  
4.5 V to 5.5 V (DC-to-DC Enabled) and  
2.7 V to 4.0 V (DC-to-DC Disabled).  
1
VDD  
Supply Voltage for Isolator Primary Side,  
4.5 V to 5.5 V (DC-to-DC Enabled) and  
2.7 V to 4.0 V (DC-to-DC Disabled).  
2
3
4
VIA  
VIB  
GND  
Logic Input A.  
Logic Input B.  
Ground. Ground reference for isolator  
primary side.  
2
3
4
VOA  
VOB  
GND  
Logic Output A.  
Logic Output B.  
Ground. Ground reference for isolator  
primary side.  
5
GNDISO  
Isolated Ground. Ground reference for  
isolator secondary side.  
5
GNDISO  
Isolated Ground. Ground reference for  
isolator secondary side.  
6
7
8
VOB  
VOA  
VISO  
Logic Output B.  
Logic Output A.  
Isolated Supply Voltage for Isolator  
Secondary Side, 4.5 V to 5.5 V Output  
(DC-to-DC Enabled), and 2.7 V to 5.5 V  
Input (DC-to-DC Disabled).  
6
7
8
VIB  
VIA  
VISO  
Logic Input B.  
Logic Input A.  
Isolated Supply Voltage for Isolator  
Secondary Side, 4.5 V to 5.5 V Output  
(DC-to-DC Enabled), and 2.7 V to 5.5 V  
Input (DC-to-DC Disabled).  
V
1
2
3
4
8
7
6
5
V
V
V
DD  
ISO  
ADuM5241  
V
OA  
IA  
V
TOP VIEW  
(Not to Scale)  
IB  
OB  
GND  
GND  
ISO  
Figure 6. ADuM5241 Pin Configuration  
Table 10. ADuM5241 Pin Function Descriptions  
Pin  
No.  
Mnemonic Description  
1
VDD  
Supply Voltage for Isolator Primary Side,  
4.5 V to 5.5 V (DC-to-DC Enabled) and  
2.7 V to 4.0 V (DC-to-DC Disabled).  
2
3
4
VOA  
VIB  
GND  
Logic Output A.  
Logic Input B.  
Ground. Ground reference for isolator  
primary side.  
5
GNDISO  
Isolated Ground. Ground reference  
for isolator secondary side.  
6
7
8
VOB  
VIA  
VISO  
Logic Output B.  
Logic Input A.  
Isolated Supply Voltage for Isolator  
Secondary Side, 4.5 V to 5.5 V Output  
(DC-to-DC Enabled), and 2.7 V to 5.5 V  
Input (DC-to-DC Disabled).  
Rev. B | Page 8 of 16  
 
Data Sheet  
ADuM5240/ADuM5241/ADuM5242  
Table 12. ADuM5240 Truth Table  
VDD State  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Unpowered  
Unpowered  
DC-to-DC Converter  
VISO State  
VIA Input  
VIB Input  
VOA Output  
VOB Output  
Enabled  
Enabled  
Enabled  
Enabled  
Disabled  
Disabled  
Disabled  
Disabled  
Disabled  
Disabled  
Disabled  
Powered (Internally)  
Powered (Internally)  
Powered (Internally)  
Powered (Internally)  
Powered (Externally)  
Powered (Externally)  
Powered (Externally)  
Powered (Externally)  
Unpowered  
H
L
H
L
H
L
H
L
H
L
L
H
H
L
H
L
H
L
H
L
H
L
H
L
L
H
H
L
L
L
H
X
X
X
H
Z
L
X
X
X
Z
L
Z
Powered (Externally)  
Unpowered  
Z
Table 13. ADuM5241 Truth Table  
VDD State  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Unpowered  
Unpowered  
DC-to-DC Converter  
VISO State  
VIA Input  
VIB Input  
VOA Output  
VOB Output  
Enabled  
Enabled  
Enabled  
Enabled  
Disabled  
Disabled  
Disabled  
Disabled  
Disabled  
Disabled  
Disabled  
Powered (Internally)  
Powered (Internally)  
Powered (Internally)  
Powered (Internally)  
Powered (Externally)  
Powered (Externally)  
Powered (Externally)  
Powered (Externally)  
Unpowered  
H
L
H
L
H
L
H
L
H
L
L
H
H
L
H
L
H
L
H
L
H
L
H
L
L
H
H
L
L
L
H
X
X
X
H
Z
L
X
X
X
L
Z
Z
Powered (Externally)  
Unpowered  
Z
Table 14. ADuM5242 Truth Table  
VDD State  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Powered  
Unpowered  
Unpowered  
DC-to-DC Converter  
VISO State  
VIA Input  
VIB Input  
VOA Output  
VOB Output  
Enabled  
Enabled  
Enabled  
Enabled  
Disabled  
Disabled  
Disabled  
Disabled  
Disabled  
Disabled  
Disabled  
Powered (Internally)  
Powered (Internally)  
Powered (Internally)  
Powered (Internally)  
Powered (Externally)  
Powered (Externally)  
Powered (Externally)  
Powered (Externally)  
Unpowered  
H
L
H
L
H
L
H
L
H
L
L
H
H
L
H
L
H
L
H
L
H
L
H
L
L
H
H
L
L
H
L
Z
Z
L
H
X
X
X
X
X
X
L
Z
Z
Powered (Externally)  
Unpowered  
Rev. B | Page 9 of 16  
 
 
ADuM5240/ADuM5241/ADuM5242  
Data Sheet  
TYPICAL PERFORMANCE CHARACTERISTICS  
120  
100%  
0
LOAD  
100  
80  
60  
40  
20  
0
100  
50  
0
–50  
0
12  
0
35  
2
4
6
8
10  
5
10  
15  
20  
25  
30  
I
OUTPUT LOAD CURRENT (mA)  
TIME (µs)  
ISO  
Figure 8. Typical IDD Input Current vs. IISO Output Load Current  
Figure 10. Typical VISO Transient Load Response, 5 V Output,  
90% to 10% to 90% Pulsed Load, 100 nF Bypass Capacitance vs. Time  
5.5  
5.4  
5.3  
5.2  
5.1  
5.0  
4.9  
4.8  
4.7  
4.6  
4.5  
200  
150  
100  
50  
0
–50  
–100  
–150  
–200  
0
12  
0
100  
2
4
6
8
10  
20  
40  
60  
80  
I
OUTPUT LOAD CURRENT (mA)  
TIME (ns)  
ISO  
Figure 9. Typical Isolated VISO Output Voltage vs. IISO Output Load Current  
Figure 11. Typical Output Voltage Noise at 100% Load,  
100 nF Bypass Capacitance vs. Time  
Rev. B | Page 10 of 16  
 
 
 
 
Data Sheet  
ADuM5240/ADuM5241/ADuM5242  
APPLICATIONS INFORMATION  
DC-TO-DC CONVERTER  
PROPAGATION DELAY-RELATED PARAMETERS  
The dc-to-dc converter section of the ADuM524x works on  
principles that are common to most modern power supply  
designs. VDD power is supplied to an oscillating circuit that  
switches current into a chip scale air core transformer. Power is  
transferred to the secondary side where it is rectified to a high  
dc voltage. The power is then linearly regulated down to about  
5.2 V and supplied to the secondary side data section and to the  
Propagation delay is a parameter that describes the time it takes  
a logic signal to propagate through a component. The propagation  
delay to a logic low output may differ from the propagation  
delay to a logic high.  
INPUT (V  
)
50%  
Ix  
tPLH  
tPHL  
VISO pin for external use. This design allows for a physically  
OUTPUT (V  
)
50%  
Ox  
small power section compatible with the 8-lead SOIC packaging  
of this device. Active feedback was not implemented in this  
version of isoPower for reasons of size and cost.  
Figure 12. Propagation Delay Parameters  
Pulse width distortion is the maximum difference between  
these two propagation delay values and is an indication of how  
accurately the timing of the input signal is preserved.  
Because the oscillator runs at a constant high frequency inde-  
pendent of the load, excess power is internally dissipated in the  
output voltage regulation process. Limited space for transformer  
coils and components also adds to internal power dissipation.  
This results in low power conversion efficiency, especially at low  
load currents.  
Channel-to-channel matching refers to the maximum amount  
the propagation delay differs between channels within a single  
ADuM524x component.  
Propagation delay skew refers to the maximum amount the  
propagation delay differs between multiple ADuM524x  
components operating under the same conditions.  
The load characteristic curve in Figure 8 shows that the VDD  
current is typically 80 mA with no VISO load and 110 mA at full  
VISO load at the VDD supply pin.  
DC CORRECTNESS AND MAGNETIC FIELD  
IMMUNITY  
Alternate supply architectures are possible using this technology.  
Addition of a digital feedback path allows regulation of power  
on the primary side. Feedback would allow significantly higher  
power, efficiency, and synchronization of multiple supplies at the  
expense of size and cost. Future implementations of isoPower  
includes feedback to achieve these performance improvements.  
Positive and negative logic transitions at the isolator input cause  
narrow (~1 ns) pulses to be sent to the decoder via the transformer.  
The decoder is bistable and is, therefore, either set or reset by  
the pulses, indicating input logic transitions. In the absence of  
logic transitions at the input for more than 1 μs, a periodic set  
of refresh pulses indicative of the correct input state are sent to  
ensure dc correctness at the output. If the decoder receives no  
internal pulses of more than about 5 μs, the input side is assumed  
to be unpowered or nonfunctional, in which case the isolator  
output is forced to a default state by the watchdog timer circuit  
(see Table 12 through Table 14).  
The ADuM524x can be operated with the internal dc-to-dc  
enabled or disabled. With the internal dc-to-dc converter  
enabled, the isolated supply of Pin 8 provides the output power  
as well as power to the secondary-side circuitry of the part.  
The internal dc-to-dc converter state of the ADuM524x is  
controlled by the input VDD voltage, as defined in Table 6. In  
normal operating mode, VDD is set between 4.5 V and 5.5 V and  
the internal dc-to-dc converter is enabled. When/if it is desired  
to disable the dc-to-dc converter, VDD is lowered to a value  
between 2.7 V and 4.0 V. In this mode, VISO power is supplied  
externally by the user and the signal channels of the ADuM524x  
continue to operate normally.  
The limitation on the magnetic field immunity of the ADuM524x  
is set by the condition in which induced voltage in the receiving  
coil of the transformer is sufficiently large to either falsely set or  
reset the decoder. The following analysis defines the conditions  
under which this may occur. The 3 V operating condition of the  
ADuM524x is examined because it represents the most susceptible  
mode of operation.  
There is hysteresis into the VDD input voltage detect circuit.  
Once the dc-to-dc converter is active, the input voltage must be  
decreased below the turn-on threshold to disable the converter.  
This feature ensures that the converter does not go into  
oscillation due to noisy input power.  
The pulses at the transformer output have an amplitude greater  
than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus  
establishing a 0.5 V margin in which induced voltages can be  
tolerated. The voltage induced across the receiving coil is given by  
2
V = (−dβ/dt)Σπrn ; n = 1, 2, … , N  
where:  
β is magnetic flux density (gauss).  
N is the number of turns in the receiving coil.  
rn is the radius of the nth turn in the receiving coil (cm).  
Rev. B | Page 11 of 16  
 
 
 
 
ADuM5240/ADuM5241/ADuM5242  
Data Sheet  
Given the geometry of the receiving coil in the ADuM524x and  
an imposed requirement that the induced voltage be at most  
50% of the 0.5 V margin at the decoder, a maximum allowable  
magnetic field is calculated, as shown in Figure 13.  
100  
Note that at combinations of strong magnetic field and high  
frequency, any loops formed by printed circuit board (PCB)  
traces could induce error voltages sufficiently large enough to  
trigger the thresholds of succeeding circuitry. Care should be  
taken in the layout of such traces to avoid this possibility.  
THERMAL ANALYSIS  
10  
1
Each ADuM524x component consists of two internal die,  
attached to a split-paddle lead frame. For the purposes of  
thermal analysis, it is treated as a thermal unit with the highest  
junction temperature reflected in the θJA value in Table 2. The  
value of θJA is based on measurements taken with the part  
mounted on a JEDEC standard 4-layer PCB with fine-width  
traces in still air. Under normal operating conditions, the  
ADuM524x operates at full load across the full temperature  
range without derating the output current. For example, a part  
with no external load drawing 80 mA and dissipating 400 mW  
causes a 32°C temperature rise above ambient. It is normal for  
these devices to run warm.  
0.1  
0.01  
0.001  
1k  
10k  
100k  
1M  
10M  
100M  
MAGNETIC FIELD FREQUENCY (Hz)  
Figure 13. Maximum Allowable External Magnetic Flux Density  
Following the recommendations in the PCB Layout section  
decreases the thermal resistance to the PCB allowing increased  
thermal margin at high ambient temperatures.  
For example, at a magnetic field frequency of 1 MHz, the  
maximum allowable magnetic field of 0.2 kgauss induces a  
voltage of 0.25 V at the receiving coil. This is about 50% of the  
sensing threshold and does not cause a faulty output transition.  
Similarly, if such an event were to occur during a transmitted  
pulse (and was of the worst-case polarity), it would reduce the  
received pulse from >1.0 V to 0.75 V—still well above the 0.5 V  
sensing threshold of the decoder.  
PCB LAYOUT  
The ADuM524x requires no external circuitry for its logic  
interfaces. Power supply bypassing is required at the input and  
output supply pins (see Figure 15).  
The power supply section of the ADuM524x uses a 300 MHz  
oscillator frequency to pass power through its chip scale trans-  
formers. In addition, the normal operation of the data section  
of the iCoupler introduces switching transients, as described in  
the DC Correctness and Magnetic Field Immunity section, on  
the power supply pins (see Figure 11). Low inductance capacitors  
are required to bypass noise generated at the switching frequency  
as well as 1 ns pulses generated by the data transfer and dc refresh  
circuitry. The total lead length between both ends of the capacitor  
and the input power supply pin should not exceed 20 mm.  
The preceding magnetic flux density values correspond to  
specific current magnitudes at given distances from the  
ADuM524x transformers. Figure 14 expresses these allowable  
current magnitudes as a function of frequency for selected  
distances. As shown in Figure 14, the ADuM524x is extremely  
immune and can only be affected by extremely large currents  
operated at high frequencies very close to the component. For  
the 1 MHz example noted, one would have to place a 0.5 kA  
current 5 mm away from the ADuM524x to affect the operation  
of the component.  
In cases where EMI emission is a concern, series inductance may  
be added to critical power and ground traces. Discrete inductors  
should be added to the line such that the high frequency bypass  
capacitors are between the inductor and the ADuM524x device  
pin. Inductance can be added in the form of discrete inductors  
or ferrite beads added to both power and ground traces. The  
recommended value corresponds to impedance between 50 Ω  
and 100 Ω at approximately 300 MHz.  
1000  
DISTANCE = 1m  
100  
10  
DISTANCE = 100mm  
1
If the switching speed of the data outputs is causing unacceptable  
EMI, capacitance to ground can be added at output pins to slow  
the rise and fall time of the output. This slew rate limits the output.  
Capacitance values depend on application speed requirements.  
DISTANCE = 5mm  
0.1  
0.01  
See the AN-0971 Application Note for board layout guidelines.  
1k  
10k  
100k  
1M  
10M  
100M  
MAGNETIC FIELD FREQUENCY (Hz)  
Figure 14. Maximum Allowable Current  
for Various Current-to-ADuM524x Spacings  
Rev. B | Page 12 of 16  
 
 
 
 
Data Sheet  
ADuM5240/ADuM5241/ADuM5242  
Load regulation transients are the primary source of lower  
frequency power supply voltage excursions, as illustrated in  
Figure 10. These should be dealt with by adding an additional  
supply stiffening capacitor between VISO and GNDISO. The  
stiffening capacitor can be of a more highly inductive type  
because the high frequency bypass is handled by the required  
low inductance capacitor.  
lifetime of the insulation structure within the ADuM524x.  
Analog Devices performs accelerated life testing using voltage  
levels higher than the rated continuous working voltage. Accel-  
eration factors for several operating conditions are determined.  
These factors allow calculation of the time to failure at the actual  
working voltage. The values shown in Table 8 summarize the peak  
voltage for 50 years of service life for a bipolar ac operating condi-  
tion and the maximum CSA/VDE approved working voltages. In  
many cases, the approved working voltage is higher than 50-year  
service life voltage. Operation at these high working voltages  
can lead to shortened insulation life in some cases.  
V
V
V
V
DD  
ISO  
V
V
IA/OA  
OA/IA  
OB/IB  
IB/OB  
GND  
The insulation lifetime of the ADuM524x depends on the voltage  
waveform type imposed across the isolation barrier. The iCoupler  
insulation structure degrades at different rates depending on  
whether the waveform is bipolar ac, unipolar ac, or dc. Figure 16,  
Figure 17, and Figure 18 illustrate these different isolation  
voltage waveforms.  
GND  
ISO  
Figure 15. Recommended Printed Circuit Board Layout  
In applications involving high common-mode transients, care  
should be taken to ensure that board coupling across the isolation  
barrier is minimized. Furthermore, the board layout should be  
designed such that any coupling that does occur equally affects  
all pins on a given component side. Failure to ensure this can  
cause voltage differentials between pins exceeding the absolute  
maximum ratings of the device (specified in Table 7), thereby  
leading to latch-up and/or permanent damage.  
Bipolar ac voltage is the most stringent environment. The goal  
of a 50-year operating lifetime under the ac bipolar condition  
determines the recommended maximum working voltage of  
Analog Devices.  
In the case of unipolar ac or dc voltage, the stress on the  
insulation is significantly lower, which allows operation at  
higher working voltages while still achieving a 50-year service  
life. The working voltages listed in Table 8 can be applied while  
maintaining the 50-year minimum lifetime provided the voltage  
conforms to either the unipolar ac or dc voltage cases. Any cross-  
insulation voltage waveform that does not conform to Figure 17 or  
Figure 18 should be treated as a bipolar ac waveform, and its  
peak voltage should be limited to the 50-year lifetime voltage  
value listed in Table 8.  
The ADuM524x is a power device that dissipates as much as  
600 mW of power when fully loaded. Because it is not possible  
to apply a heat sink to an isolation device, the device primarily  
depends on heat dissipation into the PCB through the GND  
pins. If the device is used at high ambient temperatures, care  
should be taken to provide a thermal path from the GND pins  
to the PCB ground plane. The board layout in Figure 15 shows  
enlarged pads for Pin 4 and Pin 5. Multiple vias should be  
implemented from each of the pads to the ground plane,  
which significantly reduce the temperatures inside the chip.  
The dimensions of the expanded pads are left to the discretion  
of the designer and the available board space.  
Note that the voltage presented in Figure 17 is shown as sinusoidal  
for illustration purposes only. It is meant to represent any  
voltage waveform varying between 0 V and some limiting value.  
The limiting value can be positive or negative, but the voltage  
cannot cross 0 V.  
INCREASING AVAILABLE POWER  
The ADuM524x devices are not designed with the capability of  
running several devices in parallel. However, if more power is  
required to run multiple loads, it is possible to group loads and  
run each group from an individual ADuM542x device. For  
example, if a transceiver and external logic must be powered,  
one ADuM524x could be dedicated to the transceiver and an  
additional ADuM524x could power the external logic, which  
prevents issues with load sharing because each load is dedicated  
to its own supply.  
RATED PEAK VOLTAGE  
0V  
Figure 16. Bipolar AC Waveform  
RATED PEAK VOLTAGE  
0V  
Figure 17. Unipolar AC Waveform  
INSULATION LIFETIME  
All insulation structures eventually breaks down when subjected  
to voltage stress over a sufficiently long period. The rate of  
insulation degradation is dependent on the characteristics of the  
voltage waveform applied across the insulation. In addition to  
the testing performed by the regulatory agencies, Analog Devices  
carries out an extensive set of evaluations to determine the  
RATED PEAK VOLTAGE  
0V  
Figure 18. DC Waveform  
Rev. B | Page 13 of 16  
 
 
 
 
 
 
ADuM5240/ADuM5241/ADuM5242  
OUTLINE DIMENSIONS  
Data Sheet  
5.00 (0.1968)  
4.80 (0.1890)  
8
1
5
4
6.20 (0.2441)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
0.50 (0.0196)  
0.25 (0.0099)  
1.27 (0.0500)  
BSC  
45°  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
8°  
0°  
0.51 (0.0201)  
0.31 (0.0122)  
COPLANARITY  
0.10  
1.27 (0.0500)  
0.40 (0.0157)  
0.25 (0.0098)  
0.17 (0.0067)  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MS-012-AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 19. 8-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body  
(R-8)  
Dimensions shown in millimeters and (inches)  
ORDERING GUIDE  
Number  
Number  
of Inputs, of Inputs, Maximum Data  
Package  
Option  
Model1  
VDD Side  
VISO Side  
Rate (Mbps)  
Temperature Range  
−40°C to +105°C  
−40°C to +105°C  
−40°C to +105°C  
−40°C to +105°C  
−40°C to +105°C  
−40°C to +105°C  
Package Description  
ADuM5240ARZ  
ADuM5240ARZ-RL7  
ADuM5241ARZ  
ADuM5241ARZ-RL7  
ADuM5242ARZ  
ADuM5242ARZ-RL7  
2
2
1
1
0
0
0
0
1
1
2
2
1
1
1
1
1
1
8-Lead SOIC_N  
R-8  
8-Lead SOIC_N, 7”Tape and Reel R-8  
8-Lead SOIC_N R-8  
8-Lead SOIC_N, 7”Tape and Reel R-8  
8-Lead SOIC_N R-8  
8-Lead SOIC_N, 7”Tape and Reel R-8  
1 Z = RoHS Compliant Part.  
Rev. B | Page 14 of 16  
 
 
Data Sheet  
NOTES  
ADuM5240/ADuM5241/ADuM5242  
Rev. B | Page 15 of 16  
ADuM5240/ADuM5241/ADuM5242  
NOTES  
Data Sheet  
©2007–2012 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D06014-0-5/12(B)  
Rev. B | Page 16 of 16  

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