8302401YA [AGILENT]
Hermetically Sealed, Low IF, Wide VCC, High Gain Optocouplers; 密封式，低中频，宽VCC ，高增益光电耦合器
| 型号： | 8302401YA |
| 厂家： | 
AGILENT TECHNOLOGIES, LTD. |
| 描述： | Hermetically Sealed, Low IF, Wide VCC, High Gain Optocouplers |
| 文件： | 总12页 (文件大小：323K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Hermetically Sealed, Low IF,
Wide VCC, High Gain
Optocouplers
5962-89810
HCPL-573X
HCPL-673X
5962-89785
5962-98002
6N140A*
HCPL-675X
83024
HCPL-570X
HCPL-177K
Technical Data
*See matrix for available extensions.
both lower saturation voltage and
higher signaling speed than
possible with conventional photo-
Darlington optocouplers. The
shallow depth and small junctions
offered by the IC process
provides better radiation
immunity than conventional
photo transistor optocouplers.
Features
• Isolated Input Line Receiver
• EIA RS-232-C Line Receiver
• Voltage Level Shifting
• Isolated Input Line Receiver
• Isolated Output Line Driver
• Logic Ground Isolation
• Harsh Industrial Environments
• Current Loop Receiver
• Dual Marked with Device
Part Number and DSCC
Drawing Number
• Manufactured and Tested on
a MIL-PRF-38534 Certified
Line
• QML-38534, Class H and K
• Five Hermetically Sealed
Package Configurations
• System Test Equipment
Isolation
• Process Control
The supply voltage can be
operated as low as 2.0 V without
adversely affecting the
• Performance Guaranteed,
Over -55°C to +125°C
parametric performance.
Input/Output Isolation
• Low Input Current
Requirement: 0.5 mA
• High Current Transfer
Ratio: 1500% Typical @
IF = 0.5 mA
• Low Output Saturation
Voltage: 0.11 V Typical
• 1500 Vdc Withstand Test
Voltage
Description
Truth Table
(Positive Logic)
These units are single, dual, and
quad channel, hermetically sealed
optocouplers. The products are
capable of operation and storage
over the full military temperature
range and can be purchased as
either standard product or with
full MIL-PRF-38534 Class Level
H or K testing or from the appro-
priate DSCC Drawing. All devices
are manufactured and tested on a
MIL-PRF-38534 certified line and
are included in the DSCC Quali-
fied Manufacturers List QML-
38534 for Hybrid Microcircuits.
Input
Output
On (H)
Off (L)
L
H
Functional Diagram
Multiple Channel Devices
Available
• High Radiation Immunity
• 6N138/9, HCPL-2730/31
Function Compatibility
• Reliability Data
1
V
8
CC
Applications
2
3
4
7
6
5
• Military and Space
• High Reliability Systems
• Telephone Ring Detection
• Microprocessor System
Interface
V
OUT
Each channel contains a GaAsP
light emitting diode which is
optically coupled to an integrated
high gain photon detector. The
GND
• Transportation, Medical, and high gain output stage features
an open collector output providing
Life Critical Systems
The connection of a 0.1 µF bypass capacitor between VCC and GND is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
2
These devices have a 300%
minimum CTR at an input current
of only 0.5 mA making them ideal
for use in low input current
applications such as MOS, CMOS,
low power logic interfaces or line
receivers. Compatibility with high
voltage CMOS logic systems is
assured by specifying ICCH and
IOH at 18 Volts.
Package styles for these parts are
8 and 16 pin DIP through hole
(case outlines P and E respec-
tively), 16 pin DIP flat pack (case
outline F), and leadless ceramic
chip carrier (case outline 2).
Devices may be purchased with a
variety of lead bend and plating
options. See Selection Guide
table for details. Standard
for each channel of each device
listed in this data sheet, absolute
maximum ratings, recommended
operating conditions, electrical
specifications, and performance
characteristics shown in the
figures are similar for all parts
except as noted. Additionally, the
same package assembly processes
and materials are used in all
devices. These similarities justify
the use of a common data base
for die related reliability and
certain limited radiation test
results.
Military Drawing (SMD) parts are
available for each package and
lead style.
Upon special request, the follow-
ing device selections can be
made: CTR minimum of up to
600% at 0.5 mA, and lower
output leakage current levels to
100 µA.
Because the same electrical die
(emitters and detectors) are used
Selection Guide-Package Styles and Lead Configuration Options
16 pin
20 Pad
LCCC
Package
Lead Style
Channels
16 pin DIP
Through Hole
4
8 pin DIP
Through Hole
1
8 pin DIP
Through Hole
2
Flat Pack
Unformed Leads
4
Surface Mount
2
Common Channel Wiring
Agilent Part # & Options
Commercial
MIL-PRF-38534 Class H
MIL-PRF-38534 Class K
Standard Lead Finish
Solder Dipped
Butt Cut/Gold Plate
Gull Wing/Soldered
Crew Cut/Gold Plate
Class H SMD Part #
Prescript for all below
Either Gold or Solder
Gold Plate
VCC, GND
None
VCC, GND
VCC, GND
None
6N140A*
6N140A/883B
HCPL-177K
Gold Plate
HCPL-5700
HCPL-5701
HCPL-570K
Gold Plate
HCPL-5730
HCPL-5731
HCPL-573K
Gold Plate
HCPL-6750
HCPL-6751
HCPL-675K
Gold Plate
HCPL-6730
HCPL-6731
HCPL-673K
Solder Pads
Option #200
Option #100
Option #300
Option #600
Option #200
Option #100
Option #300
Option #600
Option #200
Option #100
Option #300
Option #600
None
5962-
5962-
None
5962-
8302401EX
8302401EC
8302401EA
8302401YC
8302401YA
8302401XA
8302401ZC
8302401ZA
8981001PX
8981001PC
8981001PA
8981001YC
8981001YA
8981001XA
Available
8978501PX
8978501PC
8978501PA
8978501YC
8978501YA
8978501ZA
Available
8302401FX
8302401FC
89785022X
Solder Dipped
89785022A
Butt Cut/Gold Plate
Butt Cut/Soldered
Gull Wing/Soldered
Crew Cut/Gold Plate
Crew Cut/Soldered
Class K SMD Part #
Prescript for all below
Either Gold or Solder
Gold Plate
Available
Available
5962-
5962-
5962-
5962-
5962-
9800201KEX
9800201KEC
9800201KEA
9800201KYC
9800201KYA
9800201KXA
9800201KZC
9800201KZA
8981002KPX
8981002KPC
8981002KPA
8981002KYC
8981002KYA
8981002KXA
Available
8978503KPX
8978503KPC
8978503KPA
8978503KYC
8978503KYA
8978503KZA
Available
9800201KFX
9800201KFC
8978504K2X
Solder Dipped
8978504K2A
Butt Cut/Gold Plate
Butt Cut/Soldered
Gull Wing/Soldered
Crew Cut/Gold Plate
Crew Cut/Soldered
*JEDEC registered part.
Available
Available
3
Functional Diagrams
16 pin DIP
Through Hole
4 Channels
8 pin DIP
Through Hole
1 Channel
8 pin DIP
Through Hole
2 Channels
16 pin Flat Pack
Unformed Leads
4 Channels
20 Pad LCCC
Surface Mount
2 Channels
15
V
CC2
1
V
8
1
V
8
CC
CC
1
16
1
16
19
20
13
12
V
O2
V
O1
GND
2
3
4
7
6
5
2
2
3
4
7
6
5
V
15
14
13
2
3
4
V
15
14
13
2
3
4
CC
CC
V
V
V
CC1
10
OUT
O2
2
3
V
O1
V
V
V
V
V
V
V
V
O1
O2
O3
O4
O1
O2
O3
O4
GND
1
GND
GND
7
8
5
12
5
12
6
7
8
11
10
9
6
7
8
11
10
9
GND
GND
Note: All DIP and flat pack devices have common VCC and ground. LCCC (leadless ceramic chip carrier) package has isolated channels
with separate VCC and ground connections.
Outline Drawings
16 Pin DIP Through Hole, 4 Channels
20.06 (0.790)
20.83 (0.820)
8.13 (0.320)
MAX.
0.89 (0.035)
1.65 (0.065)
4.45 (0.175)
MAX.
0.51 (0.020)
MIN.
3.81 (0.150)
MIN.
0.20 (0.008)
0.33 (0.013)
7.36 (0.290)
7.87 (0.310)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
Leaded Device Marking
Leadless Device Marking
Agilent DESIGNATOR
A QYYWWZ
XXXXXX
XXXXXXX
XXX XXX
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
A QYYWWZ
XXXXXX
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
DSCC SMD*
DSCC SMD*
Agilent CAGE CODE*
Agilent DESIGNATOR
Agilent P/N
PIN ONE/
ESD IDENT
COUNTRY OF MFR.
Agilent P/N
DSCC SMD*
DSCC SMD*
PIN ONE/
XXXX
XXXXXX
•
COUNTRY OF MFR.
Agilent CAGE CODE*
50434
XXX 50434
•
ESD IDENT
*QUALIFIED PARTS ONLY
*QUALIFIED PARTS ONLY
4
Outline Drawings (continued)
16 Pin Flat Pack, 4 Channels
7.24 (0.285)
6.99 (0.275)
2.29 (0.090)
MAX.
1.27 (0.050)
REF.
11.13 (0.438)
10.72 (0.422)
0.46 (0.018)
0.36 (0.014)
8.13 (0.320)
MAX.
2.85 (0.112)
MAX.
0.88 (0.0345)
MIN.
0.31 (0.012)
0.23 (0.009)
0.89 (0.035)
0.69 (0.027)
5.23
(0.206)
MAX.
9.02 (0.355)
8.76 (0.345)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
20 Terminal LCCC Surface Mount, 2 Channels
8 Pin DIP Through Hole, 1 and 2 Channel
9.40 (0.370)
9.91 (0.390)
8.13 (0.320)
MAX.
8.70 (0.342)
9.10 (0.358)
0.76 (0.030)
1.27 (0.050)
4.95 (0.195)
5.21 (0.205)
7.16 (0.282)
7.57 (0.298)
1.78 (0.070)
2.03 (0.080)
1.02 (0.040) (3 PLCS)
4.32 (0.170)
MAX.
1.14 (0.045)
1.40 (0.055)
8.70 (0.342)
9.10 (0.358)
4.95 (0.195)
TERMINAL 1 IDENTIFIER
2.16 (0.085)
0.51 (0.020)
3.81 (0.150)
5.21 (0.205)
MIN.
0.20 (0.008)
0.33 (0.013)
MIN.
METALIZED
1.78 (0.070)
2.03 (0.080)
CASTILLATIONS (20 PLCS)
0.64
(0.025)
(20 PLCS)
0.51 (0.020)
7.36 (0.290)
7.87 (0.310)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
1.52 (0.060)
2.03 (0.080)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
SOLDER THICKNESS 0.127 (0.005) MAX.
5
Hermetic Optocoupler Options
Option
Description
100
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This option is
available on commercial and hi-rel product in 8 and 16 pin DIP (see drawings below for details).
4.32 (0.170)
MAX.
0.51 (0.020)
1.14 (0.045)
MIN.
1.40 (0.055)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
4.32 (0.170)
MAX.
0.51 (0.020)
MIN.
1.14 (0.045)
1.40 (0.055)
0.20 (0.008)
0.33 (0.013)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
7.36 (0.290)
7.87 (0.310)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
200
300
Lead finish is solder dipped rather than gold plated. This option is available on commercial and hi-rel
product in 8 and 16 pin DIP. DSCC Drawing part numbers contain provisions for lead finish. All leadless
chip carrier devices are delivered with solder dipped terminals as a standard feature.
Surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. This option is
available on commercial and hi-rel product in 8 and 16 pin DIP (see drawings below for details). This
option has solder dipped leads.
4.57 (0.180)
MAX.
0.51 (0.020)
1.40 (0.055)
MIN.
1.65 (0.065)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
4.57 (0.180)
MAX.
4.57 (0.180)
MAX.
0.20 (0.008)
0.33 (0.013)
0.51 (0.020)
MIN.
5° MAX.
1.40 (0.055)
1.65 (0.065)
9.65 (0.380)
9.91 (0.390)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
600
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This option is
available on commercial and hi-rel product in 8 and 16 pin DIP (see drawings below for details). Contact
factory for the availability of this option on DSCC part types.
3.81 (0.150)
MIN.
3.81 (0.150)
MAX.
0.20 (0.008)
0.33 (0.013)
0.51 (0.020)
MIN.
0.51 (0.020)
MIN.
2.29 (0.090)
2.79 (0.110)
1.14 (0.045)
1.25 (0.049)
2.29 (0.090)
2.79 (0.110)
1.02 (0.040)
TYP.
7.36 (0.290)
7.87 (0.310)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
6
Absolute Maximum Ratings
Storage Temperature Range, TS .................................. -65°C to +150°C
Operating Temperature, TA ......................................... -55°C to +125°C
Case Temperature, TC ............................................................... +170°C
Junction Temperature, TJ ......................................................... +175°C
Lead Solder Temperature ................................................ 260°C for 10s
Output Current, IO (Each Channel)..............................................40 mA
Output Voltage, VO (Each Channel) .................................-0.5 to 20 V[1]
Supply Voltage, VCC ..........................................................-0.5 to 20 V[1]
Output Power Dissipation (Each Channel) ............................. 50 mW[2]
Peak Input Current (Each Channel, <1 ms Duration) .................20 mA
Average Input Current, IF (Each Channel)............................... 10 mA[3]
Reverse Input Voltage, VR (Each Channel).........................................5V
Package Power Dissipation, PD (each channel) ........................200 mW
8 Pin Ceramic DIP Single Channel Schematic
V
8
CC
I
I
CC
F
2
+
ANODE
V
F
I
–
3
O
6
5
CATHODE
V
O
GND
ESD Classification
(MIL-STD-883, Method 3015)
HCPL-5700/01/0K and 6730/31/3K .................................. (∆∆), Class 2
6N140A, 6N140A/883B, HCPL-177K,
HCPL-6750/51/5K and HCPL-5730/31/3K................ (Dot), Class 3
Recommended Operating Conditions
Parameter
Input Voltage, Low Level (Each Channel)
Input Current, High Level (Each Channel)
Supply Voltage
Symbol
VF(OFF)
IF(ON)
VCC
Min.
Max.
0.8
5
18
18
Units
V
mA
V
0.5
2.0
2.0
Output Voltage
VO
V
7
Electrical Characteristics, T = -55°C to +125°C, unless otherwise specified
A
Group
A[13]
Sub-
Limits
Sym-
bol
Parameter
TestConditions
Group Min. Typ.** Max. Units Fig. Note
CurrentTransfer
Ratio
CTR* IF = 0.5mA,VO = 0.4V,
VCC = 4.5V
1,2,3
300
300
200
1500
1000
500
%
3
4,5
IF = 1.6mA,VO = 0.4V,
VCC = 4.5V
IF = 5mA,VO = 0.4V,
VCC = 4.5V
LogicLowOutput
Voltage
VOL
IF = 0.5mA,IOL = 1.5mA,
VCC = 4.5V
IF = 1.6mA, IOL = 4.8mA,
VCC = 4.5V
IF = 5mA, IOL = 10 mA,
VCC = 4.5V
1,2,3
0.11
0.13
0.16
0.4
0.4
0.4
V
2
4
4,16
4
LogicHighOutput
Current
IOH
IOHX
*
IF = 2 µA,VO = 18V,
1,2,3
1,2,3
0.001 250
250
µA
µA
mA
4
4,6
15
VCC = 18 V
Logic
SingleChannel ICCL
*
IF = 1.6mA,VCC = 18V
1.0
2
Low
and LCCC
Supply
Current
DualChannel
QuadChannel
IF1 = IF2 = 1.6mA,
VCC = 18V
IF1 =IF2 = IF3 = IF4 = 1.6 mA
VCC = 18V
1.0
4
4
1.7
4
Logic
High
Supply
Current
SingleChannel ICCH
and LCCC
DualChannel
QuadChannel
*
IF = 0 mA,VCC = 18V
1,2,3
0.001
20
40
40
µA
15
4
IF1 = IF2 = 0mA,
VCC = 18V
IF1 = IF2 =IF3 = IF4 =0mA
VCC = 18V
Input
Forward
Voltage
Singleand
VF* IF = 1.6mA
1
2
3
1.0
1.0
5
1.4
1.7
1.7
1.8
1.8
1.7
1.8
V
1
Dual Channel
LCCC
QuadChannel
1,2,3
1,2
3
1.4
1.4
InputReverse
BVR* IR = 10µA
1,2,3
V
4
BreakdownVoltage
Input-Output
Insulation
LeakageCurrent
CapacitanceBetween
Input-Output
II-O* 45% RelativeHumidity
1
4
1.0
4
µA
7,12
TA = 25°C,t = 5s,
VI-O = 1500VDC
CI-O f = 1MHz,TA = 25°C
pF
4,8
14,17
*For JEDEC registered parts.
**All typical values are at VCC = 5 V, TA = 25°C.
8
Electrical Characteristics (cont) TA = -55°C to +125°C, unless otherwise specified
Group
A[13]
Sub-
Limits
Sym-
bol
Parameter
TestConditions
Group Min. Typ.** Max. Units Fig. Note
PropagationDelay
TimetoLogicLow
at Output
tPHL
*
IF = 0.5mA,RL = 4.7kΩ,
VCC = 5V
9,10,11
9,10,11
30
100
µs 5,6,
4
7,8
tPHL IF = 1.6mA, RL = 1.5kΩ,
5
30
4,16
4,17
VCC = 5V
IF = 5mA,RL = 680Ω,
tPHL*
9
2
5
VCC = 5V
10,11
9,10,11
9,10,11
10
10
60
4,16
4
PropagationDelay
TimetoLogicHigh
at Output
tPLH
*
IF = 0.5mA,RL = 4.7kΩ,
VCC = 5V
tPLH IF = 1.6mA, RL = 1.5kΩ,
17
14
8
µs 5,6,
7,8
9,10,11
50
4,16
4,17
VCC = 5V
tPLH*
IF = 5mA,RL = 680Ω,
CC = 5V
9
20
30
30
V
10,11
9,10,11
4,16
[17]
[16]
Common Mode
|CML| VCC = 5 V, |V | = 25VP-P
9,10,11 500 1000
V/µs
V/µs
9
9
CM
TransientImmunity
atLowOutputLevel
IF = 1.6mA
RL = 1.5kΩ
4,10
11,14
|V | = 50VP-P
CM
[17]
Common Mode
|CMH| VCC = 5 V, |V | = 25VP-P
9,10,11 500 1000
CM
TransientImmunity
atHighOutputLevel
IF = 0mA
RL = 1.5kΩ
4,10
11,14
[16]
|V | = 50VP-P
CM
*For JEDEC registered parts.
**All typical values are at VCC = 5 V, T = 25°C.
A
Typical Characteristics, T = 25°C, VCC = 5V
A
Parameter
Input Capacitance
Input Diode Temperature
Coefficient
Sym.
CIN
∆VF/∆TA
Typ.
60
-1.8
Units
pF
mV/°C
Test Conditions
VF = 0V, f = 1 MHz
IF = 1.6 mA
Note
4
4
Resistance (Input-Output)
Capacitance (Input-Output)
RI-O
CI-O
1012
2.0
Ω
VI-O = 500 V
f = 1MHz
4, 8
4, 8
pF
Dual and Quad Channel Product Only
Input-Input Leakage Current
II-I
0.5
nA
Relative Humidity = 45%,
VI-I = 500 V, t = 5 s
9
Resistance (Input-Input)
Capacitance (Input-Input)
RI-I
CI-I
1012
1.0
Ω
VI-I = 500 V
f = 1 MHz
9
9
pF
9
Notes:
8. Measured between each input pair
shorted together and all output
connections for that channel shorted
together.
9. Measured between adjacent input
pairs shorted together for each multi-
channel device.
10. CML is the maximum rate of rise of
the common mode voltage that can be
sustained with the output voltage in
the logic low state (VO < 0.8 V). CMH
is the maximum rate of fall of the
common mode voltage that can be
sustained with the output voltage in
the logic high state (VO > 2.0 V).
11. In applications where dV/dt may
exceed 50,000 V/µs (such as a static
12. This is a momentary withstand test,
not an operating condition.
1. GND Pin should be the most negative
voltage at the detector side. Keeping
VCC as low as possible, but greater
than 2.0 V, will provide lowest total
IOH over temperature.
2. Output power is collector output
power plus total supply power for the
single channel device. For the dual
channel device, output power is
collector output power plus one half
the total supply power. For the quad
channel device, output power is
collector output power plus one
fourth of total supply power. Derate
at 1.66 mW/°C above 110°C.
13. Standard parts receive 100% testing
at 25°C (Subgroups 1 and 9). SMD
and 883B parts receive 100% testing
at 25,125, and -55°C (Subgroups 1
and 9, 2 and 10, 3 and 11,
respectively).
14. Parameters tested as part of device
initial characterization and after
design and process changes.
Parameters guaranteed to limits
specified for all lots not specifically
tested.
15. The HCPL-6730, HCPL-6731, and
HCPL-673K dual channel parts
function as two independent single
channel units. Use the single channel
parameter limits.
16. Not required for 6N140A, 6N140A/
883B, HCPL-177K, HCPL-6750/51/
5K, 8302401, and 5962-9800201
types.
17. Required for 6N140A, 6N140A/883B,
HCPL-177K, HCPL-6750/51/5K,
8302401, and 5962-9800201 types.
3. Derate IF at 0.33 mA/°C above 110°C.
4. Each channel.
discharge) a series resistor, RCC
,
5. CURRENT TRANSFER RATIO is
defined as the ratio of output
collector current, IO, to the forward
LED input current, IF, times 100%.
6. IOHX is the leakage current resulting
from channel to channel optical
crosstalk. IF = 2 µA for channel under
test. For all other channels,
should be included to protect the
detector ICs from destructively high
surge currents. The recommended
value is:
1 (V)
RCC = ——––––––– kΩ
0.15 IF (mA)
for single channel;
1 (V)
RCC = ——––––––– kΩ
0.3 IF (mA)
for dual channel;
IF = 10 mA.
7. All devices are considered two-
terminal devices; measured between
all input leads or terminals shorted
together and all output leads or
terminals shorted together.
1 (V)
R
CC = —–––––—–– kΩ
0.6 IF (mA)
for quad channel.
10
Figure 1. Input Diode Forward
Current vs. Forward Voltage.
Figure 2. Normalized DC Transfer
Characteristics.
Figure 3. Normalized Current
Transfer Ratio vs. Input Diode
Forward Current.
Figure 4. Normalized Supply Current
vs. Input Diode Forward Current.
Figure 5. Propagation Delay to Logic
Low vs. Input Pulse Period.
Figure 6. Propagation Delay vs.
Temperature.
Figure 7. Propagation Delay vs. Input
Diode Forward Current.
11
I
F
PULSE GEN.
= 50 Ω
R
*
56 Ω
CC
B
A
D.U.T.
Z
+5 V
O
t , t = 50 ns
R
*
r
f
56 Ω
V
CC
CC
D.U.T.
f = 100 Hz
= 0.5ms
R
L
1.0 µF
I
+5 V
F
t
PULSE
V
CC
V
O
R
1.0 µF
L
V
O
I
MONITOR
F
V
FF
GND
Rm
C **
L
V
CM
GND
+
–
PULSE GEN.
* SEE NOTE 11
** C INCLUDES PROBE AND STRAY WIRING CAPACITANCE.
* SEE NOTE 11
L
Figure 9. Test Circuit for Transient Immunity and
Typical Waveforms.
Figure 8. Switching Test Circuit (f, tP
not JEDEC registered).
V
CC
R
1
I
LEAK
R
2
D.U.T.
V
CC
2.4 - V
F
>
<
R
R
2
I
F
V
O
V
- V - I
R
2
CC
F
F
1
I
+ I
F
LEAK
GND
R
MAY BE OMITTED
2
IF ADDITIONAL FANOUT
IS NOT USED.
Figure 10. Recommended Drive Circuitry Using TTL Open-Collector Logic.
MIL-PRF-38534 Class H,
Class K, and DSCC SMD
Test Program
Agilent’s Hi-Rel Optocouplers are
in compliance with MIL-PRF-
38534 Class H and K. Class H
and Class K devices are also in
compliance with DSCC drawings
83024, 5962-89785, 5962-
89810, and 5962-98002.
Testing consists of 100% screen-
ing and quality conformance
inspection to MIL-PRF-38534.
V
+ 18 V
CC
V
D.U.T.*
OC
V
CC
(EACH INPUT)
–
0.01 µF
+
V
O
V
IN
(EACH OUTPUT)
GND
CONDITIONS: I = 10 mA
F
O
I
= 40 mA
T
= +125 °C
A
* ALL CHANNELS TESTED SIMULTANEOUSLY.
Figure 11. Operating Circuit for Burn-In and Steady State Life Tests.
www.semiconductor.agilent.com
Data subject to change.
Copyright © 1999 Agilent Technologies
Obsoletes 5968-0554E
5968-9400E (10/00)
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