HSMP-389TBLKG [AGILENT]

100V, SILICON, PIN DIODE, LEAD FREE, SC-70, 6 PIN;
HSMP-389TBLKG
型号: HSMP-389TBLKG
厂家: AGILENT TECHNOLOGIES, LTD.    AGILENT TECHNOLOGIES, LTD.
描述:

100V, SILICON, PIN DIODE, LEAD FREE, SC-70, 6 PIN

二极管
文件: 总12页 (文件大小:91K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Surface Mount PIN Diodes  
in SOT-323 (SC-70 3-Lead)  
Technical Data  
HSMP-381B/C/E/F  
HSMP-386B/C/E/F  
HSMP-389B/C/E/F  
HSMP-481B, -482B, -489B  
Features  
Package Lead Code  
Identification  
( Top View)  
Description/Applications  
The HSMP-381B/C/E/F series is  
specifically designed for low  
distortion attenuator applications.  
The HSMP-386B/C/E/F series is a  
general purpose PIN diode  
designed for low current attenua-  
tors and low cost switches. The  
HSMP-389B/C/E/F series is  
optimized for switching applica-  
tions where low resistance at low  
current, and low capacitance are  
required.  
• Diodes Optimized for:  
Low Current Switching  
Low Distortion Attenuating  
Ultra-Low Distortion Switching  
Microwave Frequency  
Operation  
SERIES  
SINGLE  
B
C
• Surface Mount SOT-323  
( SC-70) Package  
COMMON  
ANODE  
COMMON  
CATHODE  
Single and Pair Versions  
Tape and Reel Options  
Available  
E
F
DUAL ANODE DUAL CATHODE  
• Low Failure in Time ( FIT)  
Rate*  
The HSMP-48XB series is special  
products featuring ultra low  
* For more information see the  
Surface Mount PIN Reliability  
Data Sheet.  
parasitic inductance in the SOT-  
323 package, specifically designed  
for use at frequencies which are  
much higher than the upper limit  
for conventional SOT-323 PIN  
diodes. The HSMP-481B diode is a  
low distortion attenuating PIN  
designed for operation to 3 GHz.  
The HSMP-482B diode is ideal for  
limiting and low inductance  
482B/489B  
481B  
Absolute Maximum Ratings[1], TC = + 25°C  
Symbol Parameter  
Unit Absolute Maximum  
If  
Forward Current (1 µs Pulse) Amp  
1
Piv  
TJ  
Peak Inverse Voltage  
Junction Temperature  
Storage Temperature  
Thermal Resistance[2]  
V
°C  
Same as VBR  
150  
switching applications up to  
1.5 GHz. The HSMP-489B is  
optimized for low current switch-  
ing applications up to 3 GHz.  
TSTG  
θjc  
°C  
-65 to 150  
300  
°C/W  
Notes:  
1. Operation in excess of any one of these conditions may result in  
permanent damage to the device.  
2. TC = 25°C, where TC is defined to be the temperature at the package  
pins where contact is made to the circuit board.  
2
Electrical Specifications, TC = +25°C, each diode  
PIN Attenuator Diodes  
Minimum Maximum Maximum Minimum Maximum  
Part  
Package  
Breakdown  
Voltage  
Total  
Total  
High  
Low  
Number Marking Lead  
Resistance Capacitance Resistance Resistance  
RT ()  
HSMP- Code[1] Code Configuration  
VBR ( V)  
CT ( pF)  
RH ()  
RL ()  
381B  
381C  
381E  
381F  
E0  
E2  
E3  
E4  
B
C
E
F
Single  
Series  
Common Anode  
Common Cathode  
100  
3.0  
0.35  
1500  
10  
Test Conditions  
VR = VBR IF = 100 mA VR = 50 V IR = 0.01 mA IF = 20 mA  
Measure f = 100 MHz f = 1 MHz f = 100 MHz f = 100 MHz  
IR 10 µA  
PIN General Purpose Diodes  
Minimum  
Breakdown  
Voltage  
Typical  
Total  
Resistance  
RT ()  
Typical  
Total  
Capacitance  
CT ( pF)  
Part  
Package  
Number Marking  
HSMP-  
Lead  
Code  
Code[1]  
Configuration  
VBR (V)  
386B  
386C  
386E  
386F  
L0  
L2  
L3  
L4  
B
C
E
F
Single  
Series  
Common Anode  
Common Cathode  
50  
3.0  
1.5*  
0.20  
Test Conditions  
VR = VBR  
Measure  
IR 10 µA  
IF = 10 mA  
f = 100 MHz  
IF = 100 mA*  
VR = 50 V  
f = 1 MHz  
PIN Switching Diodes  
Minimum  
Breakdown  
Voltage  
Maximum  
Total  
Resistance  
RT ()  
Maximum  
Total  
Capacitance  
CT ( pF)  
Part  
Package  
Number Marking  
HSMP-  
Lead  
Code  
Code[1]  
Configuration  
VBR (V)  
389B  
389C  
389E  
389F  
G0  
G2  
G3  
G4  
B
C
E
F
Single  
Series  
Common Anode  
Common Cathode  
100  
2.5  
0.30  
Test Conditions  
VR = VBR  
Measure  
IF = 5 mA  
f = 100 MHz  
VR = 5 V  
f = 1 MHz  
IR 10 µA  
3
Electrical Specifications, TC = +25°C, each diode, continued  
Typical Parameters  
Part Number Total Resistance Carrier Lifetime Reverse Recovery Time Total Capacitance  
HSMP-  
RT ( )  
τ ( ns)  
Trr ( ns)  
( pF)  
381A Series  
386A Series  
389A Series  
75  
22  
3.8  
1500  
500  
200*  
300  
80  
0.27  
0.20  
Test Conditions  
IF = 1 mA  
f = 100 MHz  
IF = 50 mA  
TR = 250 mA  
IF = 10 mA*  
IR = 6 mA*  
VR = 10 V  
IF = 20 mA  
90% Recovery  
50 V  
Note:  
1. Package marking code is laser marked.  
High Frequency ( Low Inductance, 500 MHz–3 GHz PIN Diodes  
Minimum Maximum  
Typical  
Total  
Maximum  
Total  
Typical  
Total  
Part  
Package  
Breakdown  
Voltage  
Series  
Number Marking  
Resistance Capacitance Capacitance Inductance  
HSMP-  
Code Configuration VBR (V)  
RS ()  
CT (pF)  
CT (pF)  
LT ( nH) Application  
481B  
482B  
489B  
EB  
FA  
GA  
Dual Cathode  
Dual Anode  
Dual Anode  
100  
50  
100  
3.0  
0.6*  
2.5**  
0.35  
0.75*  
0.33**  
0.4  
1.0  
0.375*  
1.0  
1.0*  
1.0  
Attenuator  
Limiter  
Switch  
Test Conditions  
VR = VBR IF = 100 mA  
Measure  
IR 10 µA IF = 5 mA** VR = 20V*  
VR = 50V  
IF = 10 mA* f = 1 MHz  
VR = 50V f=500 MHz–  
f = 1 MHz  
VR = 5 V*  
3 GHz  
VR = 20V*  
VR = 5 V**  
4
Typical Performance, TC = 25°C  
0.45  
0.40  
0.35  
0.30  
0.25  
0.20  
0.35  
10000  
1000  
100  
10  
HSMP-381B/C/E/F, -481B  
0.30  
1 MHz  
1 MHz  
HSMP-  
386B/C/E/F  
0.25  
0.20  
100 MHz  
1 GHz  
30 MHz  
HSMP-482B  
1
frequency>100 MHz  
HSMP-389B/C/E/F, -489B  
0.1  
0.01  
0.15  
0.15  
0
2
4
6
8
10 12 14 16 18 20  
0
2
4
6
8
10 12 14 16 18 20  
0.1  
1
10  
100  
I
– FORWARD BIAS CURRENT (mA)  
REVERSE VOLTAGE (V)  
REVERSE VOLTAGE (V)  
F
Figure 3. Total RF Resistance at  
25° C vs. Forward Bias Current.  
Figure 1. RF Capacitance vs. Reverse  
Bias, HSMP-381B/C/E/F Series.  
Figure 2. RF Capacitance vs. Reverse  
Bias, HSMP-386B/C/E/F Series.  
1.4  
120  
10000  
TA = +85°C  
TA = +25°C  
TA = –55°C  
Diode Mounted as a  
Series Attenuator in  
a 50Microstrip and  
Tested at 123 MHz  
HSMP-381B/C/E/F  
110  
1.2  
1
HSMP-386B/C/E/F  
HSMP-389B/C/E/F  
100  
1000  
HSMP-482B  
90  
80  
0.8  
0.6  
0.4  
0.2  
0
100  
10  
70  
HSMP-381B/C/E/F  
60  
50  
40  
1.0  
0.01  
0
10  
20  
30  
40  
50  
0.1  
1
10  
100  
1000  
100  
10  
I
– FORWARD BIAS CURRENT (mA)  
V
– REVERSE VOLTAGE (V)  
DIODE RF RESISTANCE (OHMS)  
F
R
Figure 4. RF Resistance vs. Forward  
Bias Current for HSMP-381B/C/E/F  
Series and HSMP-481B.  
Figure 5. Capacitance vs. Reverse  
Voltage at 1 MHz.  
Figure 6. 2nd Harmonic Input  
Intercept Point vs. Diode RF  
Resistance for Attenuator Diodes.  
120  
100  
1000  
100  
10  
Diode Mounted as a  
Series Switch in  
a 50Microstrip and  
Tested at 123 MHz  
115  
110  
105  
100  
95  
V
R = 2V  
V
V
= 5V  
R
R
VR = 5V  
= 10V  
HSMP-389B/C/E/F  
10  
VR = 10V  
V
= 20V  
R
90  
HSMP-386B/C/E/F  
10 30  
– FORWARD BIAS CURRENT (mA)  
85  
1
10  
10  
20  
FORWARD CURRENT (mA)  
30  
20  
FORWARD CURRENT (mA)  
30  
1
I
F
Figure 9. Reverse Recovery Time vs.  
Forward Current for Various Reverse  
Voltages. HSMP-386B/C/E/F Series.  
Figure 7. 2nd Harmonic Input  
Intercept Point vs. Forward Bias  
Current for Switch Diodes.  
Figure 8. Reverse Recovery Time vs.  
Forward Current for Various Reverse  
Voltages. HSMP-482B.  
5
Typical Performance, TC = 25°C  
200  
100  
100  
160  
10  
10  
1
V
= –2V  
R
120  
80  
1
V
= –5V  
R
0.1  
0.01  
0.1  
40  
0
V
= –10V  
R
–50°C  
125°C 25°C  
0.4 0.6  
125°C  
0.2 0.4  
– FORWARD VOLTAGE (mA)  
25°C –50°C  
0.01  
10  
15  
20  
25  
30  
0
0.6 0.8  
1.0 1.2  
0
0.2  
0.8  
1.0 1.2  
FORWARD CURRENT (mA)  
V
V
– FORWARD VOLTAGE (mA)  
F
F
Figure 10. Typical Reverse Recovery  
Time vs. Reverse Voltage. ꢀ  
HSMP-389B/C/E/F Series.  
Figure 11. Forward Current vs.  
Forward Voltage. HSMP-381B/C/E/F  
Series and HSMP-481B.  
Figure 12. Forward Current vs.  
Forward Voltage. HSMP-482B.  
100  
10  
100  
10  
1
1
0.1  
0.1  
125°C  
0.2 0.4  
–50°C  
25°C  
25°C –50°C  
125°C  
0.4  
– FORWARD VOLTAGE (V)  
0.01  
0.01  
0
0.6  
0.8  
1.0 1.2  
0
0.2  
0.6  
0.8  
1.0 1.2  
V
– FORWARD VOLTAGE (V)  
F
V
F
Figure 13. Forward Current vs.  
Forward Voltage. HSMP-386B/C/E/F  
Series.  
Figure 14. Forward Current vs.  
Forward Voltage. HSMP-389B/C/E/F  
Series and HSMP-489B.  
6
Typical Applications for Multiple Diode Products  
RF COMMON  
RF COMMON  
RF 1  
RF 2  
RF 1  
RF 2  
BIAS 1  
BIAS 2  
BIAS  
BIAS  
Figure 15. Simple SPDT Switch, Using Only Positive ꢀ  
Bias Current.  
Figure 16. High Isolation SPDT Switch.  
RF COMMON  
RF COMMON  
BIAS  
RF 1  
RF 2  
RF 2  
RF 1  
BIAS  
Figure 17. SPDT Switch Using Both Positive and ꢀ  
Negative Bias Current.  
Figure 18. Very High Isolation SPDT Switch.  
7
Typical Applications for Multiple Diode Products (continued)  
VARIABLE BIAS  
RF IN/OUT  
INPUT  
FIXED  
BIAS  
VOLTAGE  
Figure 19. Four Diode π Attenuator.  
BIAS  
Figure 20. High Isolation SPST Switch ꢀ  
( Repeat Cells as Required) .  
8
Typical Applications for HSMP-48XX Low Inductance Series  
3
3
Microstrip Series  
Connection for  
HSMP-48XB Series  
In order to take full advantage of  
the low inductance of the  
HSMP-48XB series when using  
them in series applications, both  
lead 1 and lead 2 should be  
connected together, as shown in  
Figure 21.  
1
2
1
2
HSMP-481B  
HSMP-489B  
Figure 21. Internal Connections.  
Figure 22. Circuit Layout.  
50 OHM MICROSTRIP LINES  
Microstrip Shunt  
Connections for  
HSMP-48XB Series  
In Figure 23, the center conductor  
of the microstrip line is inter-  
rupted and leads 1 and 2 of the  
HSMP-48XB series diode are  
placed across the resulting gap.  
This forces the 0.5 nH lead induc-  
tance of leads 1 and 2 to appear as  
part of a low pass filter, reducing  
the shunt parasitic inductance and  
increasing the maximum available  
attenuation. The 0.3 nH of shunt  
inductance external to the diode is  
created by the via holes, and is a  
good estimate for 0.032" thick  
material.  
PAD CONNECTED TO  
GROUND BY TWO  
VIA HOLES  
Figure 23. Circuit Layout.  
1.5 nH  
1.5 nH  
0.3 pF*  
0.3 nH  
0.3 nH  
*0.8 pF TYPICAL FOR HSMP-482B  
Figure 24. Equivalent Circuit.  
9
Typical Applications for HSMP-48XX Low Inductance Series (continued)  
Co-Planar Waveguide  
Shunt Connection for  
HSMP-48XB Series  
Co-Planar waveguide, with ground  
on the top side of the printed  
circuit board, is shown in  
Co-Planar Waveguide  
Groundplane  
Center Conductor  
Groundplane  
Figure 25. Since it eliminates the  
need for via holes to ground, it  
offers lower shunt parasitic  
inductance and higher maximum  
attenuation when compared to a  
microstrip circuit.  
Figure 25. Circuit Layout.  
0.3 pF*  
0.75 nH  
*0.8 pF TYPICAL FOR HSMP-482B  
Figure 26. Equivalent Circuit.  
10  
SMT Assembly  
passes through one or more  
Assembly Information  
SOT-323 PCB Footprint  
Reliable assembly of surface  
mount components is a complex  
process that involves many  
material, process, and equipment  
factors, including: method of  
heating (e.g., IR or vapor phase  
reflow, wave soldering, etc.)  
circuit board material, conductor  
thickness and pattern, type of  
solder alloy, and the thermal  
conductivity and thermal mass of  
components. Components with a  
low mass, such as the SOT-323  
package, will reach solder reflow  
temperatures faster than those  
with a greater mass.  
preheat zones. The preheat zones  
increase the temperature of the  
board and components to prevent  
thermal shock and begin evaporat-  
ing solvents from the solder paste.  
The reflow zone briefly elevates  
the temperature sufficiently to  
produce a reflow of the solder.  
A recommended PCB pad layout  
for the miniature SOT-323 (SC-70)  
package is shown in Figure 27  
(dimensions are in inches). This  
layout provides ample allowance  
for package placement by auto-  
mated assembly equipment  
without adding parasitics that  
could impair performance.  
The rates of change of tempera-  
ture for the ramp-up and cool-  
down zones are chosen to be low  
enough to not cause deformation  
of the board or damage to compo-  
nents due to thermal shock. The  
maximum temperature in the  
0.026  
0.07  
reflow zone (T  
exceed 235 °C.  
) should not  
MAX  
0.035  
HPs SOT-323 diodes have been  
qualified to the time-temperature  
profile shown in Figure 28. This  
profile is representative of an IR  
reflow type of surface mount  
assembly process.  
These parameters are typical for a  
surface mount assembly process  
for HP SOT-323 diodes. As a  
general guideline, the circuit  
board and components should be  
exposed only to the minimum  
temperatures and times necessary  
to achieve a uniform reflow of  
solder.  
0.016  
Figure 27. PCB Pad Layout  
( dimensions in inches) .  
After ramping up from room  
temperature, the circuit board  
with components attached to it  
(held in place with solder paste)  
250  
200  
TMAX  
150  
Reflow  
Zone  
100  
Preheat  
Zone  
Cool Down  
Zone  
50  
0
0
60  
120  
180  
240  
300  
TIME (seconds)  
Figure 28. Surface Mount Assembly Profile.  
11  
Device Orientation  
REEL  
TOP VIEW  
4 mm  
END VIEW  
8 mm  
CARRIER  
TAPE  
##  
##  
##  
##  
USER  
FEED  
DIRECTION  
Note: “##” represents Package Marking Code.  
COVER TAPE  
Tape Dimensions  
For Outline SOT-323 ( SC-70 3 Lead)  
P
P
D
2
P
0
E
F
W
C
D
1
t
(CARRIER TAPE THICKNESS)  
T (COVER TAPE THICKNESS)  
t
1
K
8° MAX.  
5° MAX.  
0
A
B
0
0
DESCRIPTION  
SYMBOL  
SIZE (mm)  
SIZE (INCHES)  
CAVITY  
LENGTH  
WIDTH  
DEPTH  
PITCH  
A
B
K
P
D
2.24 ± 0.10  
2.34 ± 0.10  
1.22 ± 0.10  
4.00 ± 0.10  
1.00 + 0.25  
0.088 ± 0.004  
0.092 ± 0.004  
0.048 ± 0.004  
0.157 ± 0.004  
0.039 + 0.010  
0
0
0
BOTTOM HOLE DIAMETER  
1
0
PERFORATION  
DIAMETER  
PITCH  
POSITION  
D
P
E
1.55 ± 0.05  
4.00 ± 0.10  
1.75 ± 0.10  
0.061 ± 0.002  
0.157 ± 0.004  
0.069 ± 0.004  
CARRIER TAPE WIDTH  
THICKNESS  
W
8.00 ± 0.30  
0.315 ± 0.012  
t
0.255 ± 0.013 0.010 ± 0.0005  
5.4 ± 0.10 0.205 ± 0.004  
0.062 ± 0.001 0.0025 ± 0.00004  
1
COVER TAPE  
WIDTH  
C
TAPE THICKNESS  
T
t
DISTANCE  
CAVITY TO PERFORATION  
(WIDTH DIRECTION)  
F
3.50 ± 0.05  
0.138 ± 0.002  
CAVITY TO PERFORATION  
(LENGTH DIRECTION)  
P
2
2.00 ± 0.05  
0.079 ± 0.002  
Package Dimensions  
Outline SOT-323 ( SC-70)  
1.30 (0.051)  
REF.  
2.20 (0.087)  
2.00 (0.079)  
1.35 (0.053)  
1.15 (0.045)  
0.650 BSC (0.025)  
0.425 (0.017)  
TYP.  
2.20 (0.087)  
1.80 (0.071)  
0.10 (0.004)  
0.00 (0.00)  
0.30 REF.  
0.20 (0.008)  
0.10 (0.004)  
1.00 (0.039)  
0.80 (0.031)  
0.25 (0.010)  
0.15 (0.006)  
10°  
0.30 (0.012)  
0.10 (0.004)  
DIMENSIONS ARE IN MILLIMETERS (INCHES)  
Package Characteristics  
Lead Material ........................................................................................ Copper  
Lead Finish .............................................................................Tin-Lead 85/15%  
Maximum Soldering Temperature ............................... 260°C for 5 seconds  
Minimum Lead Strength ........................................................... 2 pounds pull  
Typical Package Inductance ................................................................... 2 nH  
Typical Package Capacitance .............................. 0.08 pF (opposite leads)  
Ordering Information  
Specify part number followed by option. For example:  
HSMP- 38XA – XXX  
www.hp.com/go/rf  
For technical assistance or the location of  
your nearest Hewlett-Packard sales office,  
distributor or representative call:  
Bulk or Tape and Reel Option  
Part Number  
Americas/Canada: 1-800-235-0312 or  
408-654-8675  
Surface Mount PIN  
Hewlett-Packard  
Far East/Australasia: Call your local HP  
sales office.  
Option – BLK = Bulk, 100 pcs. per antistatic bag  
Japan: (81 3) 3335-8152  
Option – TR1 = Tape and Reel, 3000 devices per 7" reel  
Europe: Call your local HP sales office.  
Conforms to Electronic Industries RS-481, “Taping of Surface Mounted  
Components for Automated Placement.” Standard Quantity is  
3,000 Devices per Reel.  
Data subject to change.  
Copyright © 1998 Hewlett-Packard Co.  
Obsoletes 5966-2323E  
Printed in U.S.A.  
5967-6070E (5/98)  

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