A4934GLPTR-T [ALLEGRO]

Three-Phase Sensorless Fan Driver;


型号：	A4934GLPTR-T
厂家：	ALLEGRO MICROSYSTEMS
描述：	Three-Phase Sensorless Fan Driver 电动机控制光电二极管
文件：	总9页 (文件大小：365K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

A4934

Three-Phase Sensorless Fan Driver

Discontinued Product

This device is no longer in production. The device should not be

purchased for new design applications. Samples are no longer available.

Date of status change: October 31, 2011

Recommended Substitutions:

For existing customer transition, and for new customers or new appli-

cations, refer to the A4941.

NOTE: For detailed information on purchasing options, contact your

local Allegro field applications engineer or sales representative.

Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan

for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The

information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no respon-

sibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.

A4934

Three-Phase Sensorless Fan Driver

Description

Features and Benefits

• Sensorless (no Hall sensors required)

• Soft switching for reduced audible noise

• Minimal external components

• PWM speed input

• FG speed output

• Low power standby mode

• Lock detection

The A4934 three-phase motor driver incorporates BEMF

sensing to eliminate the requirement for Hall sensors in fan

applications.

A pulse wave modulated (PWM) input is provided to control

motor speed, allowing system cost savings by eliminating

external variable power supply. PWM input can also be used

as an on/off switch to disable motor operation and place the

IC into a low power standby mode.

• Optional overcurrent protection

The A4934 soft switching settings are designed for lower

inductance or lower speed motors. For higher inductance

or higher speed motors consider using the pin-compatible

A4941.

Package: 16-pin TSSOP with exposed

thermal pad (suffix LP)

TheA4934 is provided in a 16-pinTSSOPpackage (suffix LP)

with an exposed thermal pad. It is lead (Pb) free, with 100%

matte tin leadframe plating.

Not to scale

Functional Block Diagram

12 V

0.1 μF

CP2

0.1 μF

VCP

CP1

VBB

Charge

Pump

10 μF

+V_INT

OUTA

SLEW

PWM

Soft

Switch

OUTB

OUTC

Control

Logic

3-Phase

Half Bridges

25 kHz

SENSE

GND

OCP

OSC

Timers

V_BB

0.18 Ω

Sequencer

(Direction)

O/C

Startup

OSC

TEST

Adaptive

Commutation

Delay

CTAP

GND

10 kΩ

CDCOM

BEMF

Comp

OUTA

OUTB

OUTC

FCOM

A4934-DS

A4934

Three-Phase Sensorless Fan Driver

Selection Guide

Part Number

Packing

A4934GLPTR-T

4000 pieces per 13-in. reel

Absolute Maximum Ratings

Characteristic

Symbol

Notes

Rating

Unit

Supply Voltage

V_BB

PWM, SLEW

–0.3 to 5.5

–0.3 to V_BB

V_BB

Logic Input Voltage Range

Logic Output Voltage

Output Current

V_IN

V_OUT

I_OUT

Peak (startup and lock rotor)

Duty cycle = 100%

1.25

800

ºC

Operating Ambient Temperature

Maximum Junction Temperature

Storage Temperature

T_A

T_J(max)

T_stg

G temperature range

–40 to 105

150

–55 to 150

Recommended Operating Conditions

Characteristic

Symbol

Conditions

Min.

Typ.

–

Max.

Unit

Supply Voltage

V_BB

–

800

–

Peak (startup and lock rotor)

Run current

–

Output Current

I_OUT

<500

Thermal Characteristics may require derating at maximum conditions

Characteristic

Symbol

Test Conditions*

Value Unit

On 4-layer PCB based on JEDEC standard

ºC/W

Package Thermal Resistance

R_θJA

On 2-layer PCB with 1 in.²of copper area each side

*Additional thermal information available on the Allegro website

Terminal List Table

Name

CP1

Number

Function

Charge pump

Pin-out Diagram

CP2

CTAP

Motor terminal center tap

Logic input

OUTC

CP1

OUTB

OUTA

SENSE

VBB

Speed output signal

Ground

CP2

GND

OUTA

OUTB

OUTC

PWM

SENSE

SLEW

TEST

VBB

5, 11

VCP

GND

SLEW

PWM

PAD

CTAP

GND

Motor terminal A

Motor terminal B

Motor terminal C

Logic input

TEST

Sense resistor connection

Logic input

Test use only, leave open circuit

Input supply

VCP

Charge pump

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

A4934

Three-Phase Sensorless Fan Driver

ELECTRICAL CHARACTERISTICS Valid at T_A= 25°C, V_BB= 12 V; unless otherwise noted

Characteristics

Symbol

Test Conditions

Min.

–

Typ.

2.5

Max.

Unit

μA

mΩ

I_BB

VBB Supply Current

I_BBST

R_DS(on)

V_OCL

V_IL

Standby mode, PWM = 0 V, SLEW = FC = O/C

I = 800 mA, T_J= 25°C

–

Total Driver R_DS(on)(Sink + Source)

Overcurrent Threshold

PWM Low Level

–

750

200

–

180

–

220

PWM High Level

V_IH

0.8

–

Input Hysteresis

V_HYS

300

–20

–50

–

μA

PWM, FC V_IN= 0 V

SLEW

–

Logic Input Current

I_IN

–

Output Saturation Voltage

FG Output Leakage

V_SAT

I_FG

I = 5 mA

–

0.3

V = 16 V

–

μA

Protection Circuitry

t_on

–

Lock Protection

t_off

Thermal Shutdown Temperature

Thermal Shutdown Hysteresis

VBB Undervoltage Lockout (UVLO)

T_JTSD

T_JHYS

V_UVLO

Temperature increasing

Recovery = T_JTSD– ∆T_J

V_BBrising

150

–

165

6.3

180

–

°C

–

VBB Undervoltage Lockout (UVLO)

Hysteresis

V_UVLOHYS

–

0.56

–

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

A4934

Three-Phase Sensorless Fan Driver

Functional Description

The driver system is a three-phase, BEMF sensing motor control- Adaptive commutation circuitry and programmable timers

determine the optimal commutation points with minimal

external components. The major blocks within this system are:

the BEMF zero crossing detector, Commutation Delay timer, and

the Blank timer.

ler and driver. Commutation is controlled by a proprietary BEMF

sensing technique.

The motor drive system consists of three half bridge NMOS

outputs, BEMF sensing circuits, adaptive commutation control,

and state sequencer. The sequencer determines which output

devices are active. The BEMF sensing circuits and adaptive com-

mutation circuits determine when the state sequencer advances to

the next state.

BEMF Zero Cross Detection

BEMF zero crossings are detected by comparing the voltage at

the tri-stated motor winding to the voltage at the motor center

tap. Zero crossings are indicated by the FCOM signal, which

goes high at each valid zero crossing and low at the beginning

of the next commutation. In each state, the BEMF detector looks

for the first correct polarity zero crossing and latches it until the

next state. This latching action, along with precise comparator

hysteresis, makes for a robust sensing system. At the beginning

of each commutation event, the BEMF detectors are inhibited for

a period of time set by the Blank timer. This is done so that com-

mutation transients do not disturb the BEMF sensing system.

A complete self-contained BEMF sensing commutation scheme is

provided. The three half-bridge outputs are controlled by a state

machine with six possible states, shown in figure 1. Motor BEMF

is sensed at the tri-stated output for each state.

BEMF sensing motor commutation relies on the accurate com-

parison of the voltage on the tri-stated output to the voltage at the

center tap of the motor. The BEMF zero crossing, the point where

the tri-stated motor winding voltage crosses the center tap volt-

age, is used as a positional reference. The zero crossing occurs

roughly halfway through one commutation cycle.

Commutation Event

See figure 1 for timing relationships. The commutation sequence

is started by a CDCOM pulse or a valid XCOM at startup. After

Output

State

OUTA

OUTB

OUTC

FCOM

CDCOM

Figure 1. Motor Terminal Output States

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

A4934

Three-Phase Sensorless Fan Driver

the commutation delay period, a CDCOM is asserted, starting

the Blank timer. The Blank signal disables the BEMF detector so

the comparator is not active during the commutation transients.

The next zero crossing, detected on the tri-stated output, causes

FCOM to go high. This triggers the Commutation Delay timer

and the sequence repeats.

• For PWM applications, input frequencies in the range

15 to 30 kHz are applied directly to the motor windings. If the

PWM duty cycle is very small, then the IC will apply a mini-

mum pulse width of typically 6 μs. This minimum pulse width

effects the minimum speed. As a result of having a minimum

pulse width, the IC can startup and operate down to very short

duty cycles.

Startup

At startup, commutations are provided by an onboard oscillator.

These commutations are part of the startup scheme, to step the

motor to generate BEMF until legitimate BEMF zero crossings

are detected and normal BEMF sensing commutation is achieved.

Until an appropriate number of FCOM pulses are achieved (96),

100% PWM will be applied to the motor windings.

SLEW Input

Controls the level of soft switching:

SLEW Pin Connection

Soft Switch Status

GND

Less

Open

Standby Mode

Driving PWM low for 500 μs causes the IC to enter a low power

standby mode.

FC Input

This is the logic input to set force commutation time at startup, by

connection as follows:

Lock Detect

Valid FCOM signals must be detected to ensure the motor is not

stalled. If a valid FG is not detected for 2 s, the outputs will be

disabled for 5 s before an auto-restart is attempted.

Startup Commutation Time

FC Pin Connection

(ms)

100

FG Output

GND

VBB

The FG output provides fan speed information to the system.

FG is an open drain output.

Open

200

PWM Input

Overcurrent Protection

The duty cycle applied to the PWM pin is translated directly

to an average duty cycle applied across the motor windings

to control speed.

If needed, a sense resistor can be installed to limit current. (See

Applications Information section for more details.) The current

limit trip point would be set by:

• For voltage controlled applications, where V_BBcontrols the

speed, PWM can be left open circuit. PWM is internally pulled-

up to logic high level.

I_OCL= 200 mV / R_S.

When the trip point is reached, if the threshold voltage, V_OCL, is

• PWM also can be used as a control input to start and stop the

motor.

exceeded, the drivers will be disabled for 25 μs.

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

A4934

Three-Phase Sensorless Fan Driver

Input/Output Structures

VCP

CP1

GND

CP2

GND

100 kΩ

250 kΩ

SLEW

PWM

8 V

GND

VBB

MOS

Parasitic

OUTA

OUTB

OUTC

25 V

GND

CTAP

MOS

Parasitic

GND

TEST

8 V

GND

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

A4934

Three-Phase Sensorless Fan Driver

Application Information

Name

Typical Value

Description

CTAP

OUTB

VBB supply capacitor, minimum 10 μF,

electrolytic can be used

10 μF / 25 V

0.1 μF / 25 V

10 kΩ

OUTC

CP1

A4934

PAD

OUTA

SENSE

VBB

C2,C3

Charge pump ceramic capacitors

CP2

FG pull-up resistor, can be pulled-up to

VCP

GND

SLEW

PWM

V_BBif required

CTAP

GND

CTAP

Optional blocking diode for supply reverse

polarity protection

>1.5 A rated

17 V

TEST

Transient voltage suppressor (TVS)

Current limiting sense resistor, required for

low resistance motors

0.18 Ω / 0.25 W

Typical Application Circuit; speed adjusted via VBB

ground. That is:

Startup Oscillator Setting (FC)

Typically, the 50 ms setting is optimum for motors appropriate

for use with the A4934. If the motor does not produce a proper

BEMF signal at startup when power is applied, a longer setting

may be required.

• If (V_BB(max) / R_motor) < 1.25 A, eliminate R_S.

• If (V_BB(max) / R_motor) > I_OUT(max), the choice of R_Sdeter-

mines the current limit setting; recommended range is

167 mΩ < R_S< 250 mΩ.

SLEW Setting

For some motors, soft switching will reduce audible noise. The

soft switching function can result in motor stall for some motors,

specifically motors with large inductance that run at higher

speeds. For this situation, there are two potential solutions:

Note: For some motor types, use of the current limit circuit may

prevent proper startup due to the effect of the chopping on the

BEMF voltage appearing on the tri-stated winding.

• Limit the motor speed by lowering the maximum demand, by

reducing either V_motor(max) or the PWM duty applied.

Layout Notes

• Connect GND pins (5,11) to exposed pad ground area under

package.

• Consider the pin-to-pin compatible IC A4941 that allows dis-

abling of the soft switching function.

• Add thermal vias from exposed pad to bottom side ground

plane.

Current Limiting

Use of the current limit circuit is not required. If motor resistance

(phase-to-phase) will limit the current below the rating in the

• Place V_BBdecoupling capacitor as close to the IC as possible.

Absolute Maximum table, then simply connect the SENSE pin to • Place sense resistor, (if used), as close to the IC as possible.

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

A4934

Three-Phase Sensorless Fan Driver

Package LP, 16-Pin TSSOP with Exposed Thermal Pad

0.45

0.65

5.00±0.10

8º

0º

1.70

0.20

0.09

6.10

3.00

3 NOM 4.40±0.10 6.40±0.20

0.60 ±0.15

1.00 REF

3 NOM

0.25 BSC

Branded Face

SEATING PLANE

GAUGE PLANE

3.00

PCB Layout Reference View

16X

SEATING

PLANE

0.10

0.30

0.19

For Reference Only; not for tooling use (reference MO-153 ABT)

Dimensions in millimeters

1.20 MAX

0.65 BSC

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

0.15

0.00

Terminal #1 mark area

Exposed thermal pad (bottom surface); dimensions may vary with device

Reference land pattern layout (reference IPC7351

SOP65P640X110-17M);

All pads a minimum of 0.20 mm from all adjacent pads; adjust as

necessary to meet application process requirements and PCB layout

tolerances; when mounting on a multilayer PCB, thermal vias at the

exposed thermal pad land can improve thermal dissipation (reference

EIA/JEDEC Standard JESD51-5)

Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to per-

mit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the

information being relied upon is current.

Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the

failure of that life support device or system, or to affect the safety or effectiveness of that device or system.

The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;

nor for any infringement of patents or other rights of third parties which may result from its use.

For the latest version of this document, visit our website:

www.allegromicro.com

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

A4934GLPTR-T [ALLEGRO]

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