APS11060LLHALX1NH_技术文档

APS11000 and APS11060

2

-

Vertical and Planar Hall-Effect Switches

FEATURES AND BENEFITS

DESCRIPTION

• ASIL A functional safety compliance (pending

confirmation)

• Planar and vertical Hall-effect sensor ICs

• 3.3 to 24 V operation

• Automotive-grade ruggedness and fault tolerance

□ Extended AEC-Q100 qualification

□ Internal protection circuits enable 40 V load dump

compliance

TheAPS11000andAPS11060familiesofHall-effectswitches

are AEC-Q100 qualified for 24 V automotive applications

and compliant with ISO 26262:2011 ASIL A (pending

confirmation).Thesesensorsaretemperature-stableandsuited

for operation over extended junction temperature ranges up to

165°C. The APS11000 and APS11060 families are available

in several different magnetic sensitivities and polarities to

offer flexible options for system design. They are available in

active high and active low variants for ease of integration into

electronic subsystems.

□ Reverse-battery protection

□ Output short-circuit and overvoltage protection

□ Operation from –40°C to 165°C junction temperature

□ High EMC immunity

The APS11000 features a Hall-effect element that is sensitive

to magnetic flux perpendicular to the face of the IC package.

TheAPS11060 features a vertical Hall-effect sensing element

sensitivetomagneticfluxparalleltothefaceoftheICpackage.

• Omnipolar and unipolar switch threshold options

• Choice of output polarity

• Open-drain output

Continued on next page...

• Solid-state reliability

PACKAGES

Not to scale

TYPICAL APPLICATIONS

• Gear shift selectors and driver controls (PRNDL)

• Human-machine interfaces (HMI) and driver controls

• Open/close sensor for LCD screens/doors/lids/trunks

• Clutch/brake position sensor

3-pin SOT23W

(suffix LH)

• Magnetically actuated lighting

• Wiper home/end position sensor

• End of travel and index sensors

3-pin SIP (suffix UA)

VCC

POK

Regulator

To All Subcircuits

Low-Pass

Filter

Schmitt

Trigger

VOUT

Output

Control

Sample, Hold &

Averaging

Hall

Amp.

Current

Limit

GND

Figure 1: Functional Block Diagram

APS11060-DS, Rev. 4

MCO-0000392

May 12, 2020

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

DESCRIPTION (continued)

The devices include on-board reverse-battery and overvoltage Two package styles provide a choice of through-hole or surface

protection for operating directly from an automobile battery, as mounting. Package type LH is a modified 3-pin SOT23W surface

well as protection from shorts to ground by limiting the output mount package, while package type UA is a 3-pin ultra-mini SIP

current until the short is removed. The device is especially suited for through-hole mounting. Both packages are lead (Pb) free, with

for operation from unregulated supplies.

100% matte-tin-plated leadframes.

ꢀꢁꢂꢃlete Part

ꢄꢅꢂꢆer ꢇꢁrꢂat

Allegro Iden�ﬁer (Device Family)

APS – Digital Posi�on Sensor

Allegro Device Number

11000 – Planar Hall-eﬀect Switch

11060 – Ver�cal Hall-eﬀect Switch

Conﬁgura�on Op�ons

Planar

A P S1 1 0 0 0

-

L L H A L T 0 S L

Ver�cal

Output Polarity for B > B_OP

H – High (Output Oﬀ)

L – Low (Output On)

A P S 1 1 0 6 0

Opera�ng Mode

S – Unipolar South Sensing

P – Omnipolar (North and South) Sensing

N – Unipolar North Sensing

Device Switch Threshold Magnitude

0 – 35 G B_OP, 25 G B_RP(typ.)

1 – 95 G B_OP, 70 G B_RP(typ.)

ꢀ.g. APS110ꢁ0ꢂꢂHAꢃꢃ-ꢃꢃꢃ

2 – 150 G B_OP, 125 G B_RP(typ.)

3 – 280 G B_OP, 225 G B_RP(typ.)

Instruc�ons (Packing)

APS110ꢁ0ꢂꢂHAꢂꢄ-0Sꢂ

LT – 7-in. reel, 3,000 pieces/reel (LH Only)

LX – 13-in. reel, 10,000 pieces/reel (LH Only)

[blank] – bulk, 500 pieces/bag (UA Only)

Package Designa�on

LHA – 3-pin SOT23W Surface Mount

UAA – 3-pin SIP Through-Hole

RoHS

COMPLIANT

Ambient Opera�ng Temperature Range

L – -40°C to +150°C

2

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

SELECTION GUIDE

Output

State for

B > B_OP

Sensing

Orientation

Operating

Mode

Part Number ^[1]

Packing^[2]

Mounting

APS11000LLHALT-0SL

APS11000LLHALX-0SL

APS11000LUAA-0SL

APS11000LLHALT-0SH

APS11000LLHALX-0SH

APS11000LUAA-0SH

APS11000LLHALT-0PL

APS11000LLHALX-0PL

APS11000LUAA-0PL

APS11060LLHALT-0SL

APS11060LLHALX-0SL

APS11060LUAA-0SL

APS11060LLHALT-0SH

APS11060LLHALX-0SH

APS11060LUAA-0SH

APS11060LLHALT-0PL

APS11060LLHALX-0PL

APS11060LUAA-0PL

7-in. reel, 3000 pieces/reel

13-in. reel, 10000 pieces/reel

Bulk, 500 pieces/bag

3-pin SOT23W surface mount

3-pin SIP through-hole

Low

High

Low

High

Low

Unipolar

South

Z-Axis

7-in. reel, 3000 pieces/reel

13-in. reel, 10000 pieces/reel

Bulk, 500 pieces/bag

3-pin SOT23W surface mount

3-pin SIP through-hole

7-in. reel, 3000 pieces/reel

13-in. reel, 10000 pieces/reel

Bulk, 500 pieces/bag

3-pin SOT23W surface mount

3-pin SIP through-hole

Z-Axis

Omnipolar

7-in. reel, 3000 pieces/reel

13-in. reel, 10000 pieces/reel

Bulk, 500 pieces/bag

3-pin SOT23W surface mount

3-pin SIP through-hole

X-Axis

Y-Axis

X-Axis

Y-Axis

X-Axis

Y-Axis

Unipolar

South

7-in. reel, 3000 pieces/reel

13-in. reel, 10000 pieces/reel

Bulk, 500 pieces/bag

3-pin SOT23W surface mount

3-pin SIP through-hole

7-in. reel, 3000 pieces/reel

13-in. reel, 10000 pieces/reel

Bulk, 500 pieces/bag

3-pin SOT23W surface mount

3-pin SIP through-hole

Omnipolar

^[1]Contact Allegro MicroSystems for options not listed in the selection guide.

^[2]Contact Allegro MicroSystems for additional packing options.

3

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

ABSOLUTE MAXIMUM RATINGS

Characteristic

Symbol

V_CC

Notes

Rating

40

Units

V

Supply Voltage ^[1]

Reverse Supply Voltage ^[1]

Output Voltage ^[1]

V_RCC

V_OUT

I_OUT

I_ROUT

B

–18

V

–0.3 to 32

40

V

Output Current ^[2]

mA

G

Reverse Output Current

Magnetic Flux Density ^[3]

Operating Ambient Temperature

Maximum Junction Temperature

Storage Temperature

–50

Unlimited

–40 to 150

165

T_A

Range L

°C

T_J(max)

T_stg

–65 to 170

^[1]This rating does not apply to extremely short voltage transients. Transient events such as Load Dump and/or ESD have individual, specific ratings.

^[2]Through short-circuit current limiting device.

^[3]Guaranteed by design.

ESD PERFORMANCE ^[4]

Characteristic

Symbol

V_ESD(HBM)

V_ESD(CDM)

Notes

Rating

±11

Units

kV

Human Body Model according to AEC-Q100-002

Charged Device Model according to AEC-Q100-011

ESD Voltage

±1

kV

^[4]ESD ratings provided are based on qualification per AEC-Q100 as an expected level of ESD robustness.

4

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

PINOUT DIAGRAMS AND TERMINAL LIST

(View from branded face)

3

2

1

2

1

3

3-pin SIP

(suffix UA)

3-pin SOT23W

(suffix LH)

Terminal List

Number

Name

Description

LH

UA

1

VCC

VOUT

GND

Connects power supply to chip

Output from circuit

1

2

3

Terminal for ground connection

2

5

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

ELECTRICAL CHARACTERISTICS: Valid over full operating voltage and ambient temperature ranges for T_J< T_J(max)and

C_BYP= 0.1 µF, unless otherwise specified

Characteristics

SUPPLY AND STARTUP

Supply Voltage

Symbol

Test Conditions

Min.

Typ. ^[1]

Max.

Unit

V_CC

I_CC

3.3

1

–

2.2

2.5

180

High

2

24

4

V

mA

µs

–

APS11000

Supply Current

APS11060

1

5

Power-On Time ^[2]

Power-On State ^[5]

t_PO

V_CC≥ V_CC(min)

–

350

POS

V_CC≥ V_CC(min), t < t_PO

V_CC(UV)ENV_CC≥ V_CC(min) → V_CC< V_CC(min)

V_CC(UV)DISV_CC< V_CC(min) → V_CC≥ V_CC(min)

t_POR

–

V

Undervoltage Lockout ^[3]

UVLO Reset Time ^[3]

2.3

100

V

µs

CHOPPER STABILIZATION AND OUTPUT MOSFET CHARACTERISTICS

Chopping Frequency

f_C

–

800

–

kHz

µA

V_OUT(OFF)= 12 V, T_A= –40°C to 85°C, output off,

V_CC≥ V_CC(min), t > t_PO

Output Leakage Current ^[4]

I_OUTOFF

0.1

Output Leakage Current

V_OUT(OFF)= 24 V, output off, V_CC≥ V_CC(min), t > t_PO

–

1

95

500

24

2

µA

mV

V

Output Leakage Current, Power-On ^[4][5]I_OUTOFF(PO)V_CC≥ V_CC(min), t < t_PO

Output Saturation Voltage

Output Off Voltage

V_OUT(SAT)Output on, I_OUT= 5 mA

V_OUT(OFF)

100

–

Output Rise Time ^[6][7]

t_r

t_f

C_L= 20 pF, R_PULL-UP= 4.8 kΩ

0.2

0.1

µs

Output Fall Time ^[6][7]

2

ON-BOARD PROTECTION

Output Short-Circuit Current Limit

Output Zener Clamp Voltage

Supply Zener Clamp Voltage

Reverse Battery Zener Clamp Voltage

Reverse Battery Current

I_OM

V_Z(OUT)

V_Z

Output on

15

32

40

–

40

–

mA

V

I_OUT= 1.5 mA, T_A= 25°C

I_CC= I_CC(max) + 3 mA, T_A= 25°C

I_CC= –5 mA, T_A= 25°C

V_CC= –18 V, T_A= 25°C

–

V

V_RZ

–18

–

V

I_RCC

–5

mA

^[1]Typical data is at T_A= 25°C and V_CC= 12 V unless otherwise noted.

^[2]Measured from V_CC≥ 3.3 V to valid output.

^[3]See Undervoltage Lockout section for operational characteristics.

^[4]Guaranteed by device design and characterization.

^[5]See Power-On Behavior section and Figure 4.

V_OUT(OFF)

90%

^[6]C_L= oscilloscope probe capacitance.

^[7]See Figure 2 - Definition of Output Rise and Fall Time.

10%

V_OUT(SAT)

t

t_f

t_r

Figure 2: Deﬁnition of Output Rise and Fall Time

6

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

MAGNETIC CHARACTERISTICS: Valid over full operating voltage and ambient temperature ranges for T_J< T_J(max)and

C_BYP= 0.1 µF, unless otherwise specified

Characteristics

-0Px OPTION

Symbol

Test Conditions

Min.

Typ. ^[1]

Max.

Unit ^[2]

B_OPS

B_OPN

B_RPS

B_RPN

B_HYS

-0Px Option

–

–70

5

35

–35

25

70

–

G

Operate Point

Release Point

–

–25

15

–5

25

Hysteresis

5

-0Sx OPTION

Operate Point

Release Point

Hysteresis

B_OPS

B_RPS

B_HYS

-0Sx Option

‒

5

35

25

15

70

‒

G

25

-0Nx OPTION

Operate Point

Release Point

Hysteresis

B_OPN

B_RPN

B_HYS

-0Nx Option

‒70

‒

‒35

‒25

15

‒

G

‒5

25

5

^[1]Typical data are at T_A= 25°C and V_CC= 12 V unless otherwise noted.

^[2]Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and a positive value for south-polarity magnetic fields.

Unipolar South

“-xSL”

Omnipolar

“-xPL”

Unipolar North

“-xNL”

V+

V_OUT(OFF)

Standard

Output

Polarity

V_OUT(SAT)

B-

V_OUT(SAT)

0

B-

0

B+

0

B+

B_HYS

Unipolar South

“-xSH”

Omnipolar

“-xPH”

Unipolar North

“-xNH”

V+

V_OUT(OFF)

Inverted

Output

Polarity

V_OUT(SAT)

B-

0

B-

0

B+

0

B+

0

B_HYS

Figure 3: Hall Switch Output State vs. Magnetic Field

B- indicates increasing north polarity magnetic ﬁeld strength, and B+ indicates increasing south polarity magnetic ﬁeld strength.

7

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

MAGNETIC CHARACTERISTICS (continued): Valid over full operating voltage and ambient temperature ranges for T_J< T_J(max)

and C_BYP= 0.1 µF, unless otherwise specified

Characteristics

-1Px OPTION ^[3]

Symbol

Test Conditions

Min.

Typ. ^[1]

Max.

Unit ^[2]

B_OPS

B_OPN

B_RPS

B_RPN

B_HYS

-1Px Option

50

‒135

40

95

‒95

70

135

‒50

110

‒40

42

G

Operate Point

Release Point

‒110

10

‒70

25

Hysteresis

-1Sx OPTION ^[3]

Operate Point

Release Point

Hysteresis

B_OPS

B_RPS

B_HYS

-1Sx Option

50

40

10

95

70

25

135

110

42

G

-1Nx OPTION ^[3]

Operate Point

Release Point

Hysteresis

B_OPN

B_RPN

B_HYS

-1Nx Option

‒135

‒110

10

‒95

‒70

25

‒50

‒40

42

G

-2Px OPTION ^[3]

B_OPS

B_OPN

B_RPS

B_RPN

B_HYS

-2Px Option

120

‒200

110

150

‒150

125

‒125

25

200

‒120

190

‒110

42

G

Operate Point

Release Point

‒190

10

Hysteresis

-2Sx OPTION ^[3]

Operate Point

Release Point

Hysteresis

B_OPS

B_RPS

B_HYS

-2Sx Option

120

110

10

150

125

25

200

190

42

G

-2Nx OPTION ^[3]

Operate Point

Release Point

Hysteresis

B_OPN

B_RPN

B_HYS

-2Nx Option

‒200

‒190

10

‒150

‒125

25

‒120

‒110

42

G

^[1]Typical data are at T_A= 25°C and V_CC= 12 V unless otherwise noted.

^[2]Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and a positive value for south-polarity magnetic fields.

^[3]Contact Allegro MicroSystems for availability.

8

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

PACKAGE THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information.

Characteristic

Symbol

Test Conditions

Value Units

Package LH, 1-layer PCB with copper limited to solder pads

228

110

165

°C/W

2

Package LH, 2-layer PCB with 0.463 in. of copper area each side

Package Thermal Resistance

R_θJA

connected by thermal vias

Package UA, 1-layer PCB with copper limited to solder pads

Power Derating Curve

T_J(max)= 165°C; I_CC= I_CC(max),I_OUT= 0 mA (Output Off)

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

V_CC(max)

Package LH, 2-layer PCB

(R_θJA= 110°C/W)

Package UA, 1-layer PCB

(R_θJA= 165°C/W)

Package LH, 1-layer PCB

(R_θJA= 228°C/W)

8

7

6

5

4

V_CC(min)

3

2

25

45

65

85 105 125 145 165 185

T_J(max)

Temperature (°C)

Power Dissipation versus Ambient Temperature

1900

1800

1700

1600

1500

1400

1300

1200

1100

1000

900

Package LH, 2-layer PCB

(R_θJA= 110°C/W)

Package UA, 1-layer PCB

(R_θJA= 165°C/W)

800

700

600

500

400

300

Package LH, 1-layer PCB

(R_θJA= 228°C/W)

200

100

0

25

45

65

85

105 125 145 165 185

Temperature (°C)

9

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

CHARACTERISTIC PERFORMANCE DATA

Electrical Characteristics

Supply Current versus Supply Voltage

Supply Current versus Ambient Temperature

(Output Off)

5

4.5

4

5

T_A(°C)

APS11000

V_CC(V)

APS11000

4.5

4

3.3

12

-40

3.5

3

3.5

25

3

2.5

2

24

2.5

2

150

APS11060

1.5

1

1.5

1

3.3

12

24

-40

25

0.5

0

0.5

0

150

2

6

10

14

18

22

26

-60 -40 -20

0

20

40

60

80

100 120 140 160

V_CC(V)

T_A(°C)

Output Saturation Voltage versus Supply Voltage

Average Output Saturation Voltage versus Supply Voltage

for I_OUT= 5 mA

Output Saturation Voltage versus Ambient

Average Output Saturation Voltage versus Ambient

Temperature for I_OUT= 5 mA

500

450

400

350

300

250

200

150

100

50

500

450

400

350

300

250

200

150

100

50

T_A(°C)

-40

V_CC(V)

3.3

25

12

150

24

0

2

6

10

14

18

22

26

-60

-40

-20

0

20

40

60

80

100 120 140 160

V_CC(V)

T_A(°C)

10

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

CHARACTERISTIC PERFORMANCE DATA

Magnetic Characteristics

Aꢀeraꢁe ꢂꢃerate Pꢄint ꢀersꢅs Aꢆꢇient ꢈeꢆꢃeratꢅre

Aꢀeraꢁe ꢂꢃerate Pꢄint ꢀersꢅs Sꢅꢃꢃlꢉ Vꢄltaꢁe

ꢀ0

50

V_CC(V)

ꢁ_ꢂꢃꢄ

ꢀ0

50

T_A(°C)

ꢁ_ꢂꢃꢄ

3.3

-40

30

12

24

25

10

150

ꢁ_ꢂꢃꢅ

-10

-30

-50

-ꢀ0

ꢁ_ꢂꢃꢅ

-10

-30

-50

-ꢀ0

3.3

12

24

-40

25

150

-60

-40

-20

0

20

40

60

80

100 120 140 160

2

4

6

8

10

12

14

V_CC(V)

16

18

20

22

24

26

T_A(°C)

Aꢀeraꢁe ꢊelease Pꢄint ꢀersꢅs Sꢅꢃꢃlꢉ Vꢄltaꢁe

Aꢀeraꢁe ꢊelease Pꢄint ꢀersꢅs Aꢆꢇient ꢈeꢆꢃeratꢅre

50

40

50

40

V_CC(V)

ꢁ_ꢆꢃꢄ

T_A(°C)

ꢁ_ꢆꢃꢄ

30

3.3

12

-40

20

25

10

24

0

150

0

ꢁ_ꢆꢃꢅ

-10

-20

-30

-40

-50

ꢁ_ꢆꢃꢅ

-10

-20

-30

-40

-50

3.3

12

24

-40

25

150

-60

-40

-20

0

20

40

60

80

100 120 140 160

2

4

6

8

10

12

14

16

18

20

22

24

26

V_CC(V)

T_A(°C)

Aꢀeraꢁe Hꢉsteresis ꢀersꢅs Sꢅꢃꢃlꢉ Vꢄltaꢁe

Aꢀeraꢁe Hꢉsteresis ꢀersꢅs Aꢆꢇient ꢈeꢆꢃeratꢅre

25

22.5

20

25

22.5

20

V_CC(V)

ꢁ_{ꢇꢈꢄ(ꢄ)}

T_A(°C)

ꢁ_{ꢇꢈꢄ(ꢄ)}

3.3

12

-40

1ꢀ.5

15

1ꢀ.5

15

25

24

150

ꢁ_{ꢇꢈꢄ(ꢅ)}

12.5

10

12.5

10

3.3

12

24

-40

25

ꢀ.5

5

ꢀ.5

5

150

-60

-40

-20

0

20

40

60

80

100 120 140 160

2

4

6

8

10

12

14

16

18

20

22

24

26

V_CC(V)

T_A(°C)

11

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

FUNCTIONAL DESCRIPTION

Undervoltage Lockout Operation

Power-On Behavior

Device power-on begins when the supply voltage reaches

The APS11000 and APS11060 have an internal diagnostic to

V_CC(min). During the power-on time, t_PO, the device output is off check the voltage supply (an undervoltage lockout regulator).

with the exception of the leakage current, I_OUTOFF(PO). Use of a

large pull-up resistor, R_PULL-UP(see Figure 6), can influence the

Power-On State (POS) voltage level on the output pin during t_ON

When the supply voltage falls below the undervoltage lockout

voltage threshold, V_CC(UV)EN, the device enters reset, where

the output state returns to the Power-On State (POS) until V_CC

.

The output voltage level during the POS is a function of the pull- is increased to V_CC(UV)DIS. Once the V_CC(UV)DISthreshold is

up resistor and pull-up voltage. The level can be determined by reached, the power-on sequence begins and the output will cor-

subtracting the voltage drop created by R_PULL-UPand I_OUTOFF(PO)respond with the applied magnetic field for B > B_OPand B < B_RP

from the pull-up voltage. To retain a power-on output voltage

level above V_PULL-UP/2, a pull-up resistor less than or equal to

20 kΩ is recommended. After power-on is complete and the

after t_PORhas elapsed. In the case the supply voltage does not

return to these operational levels, or if the applied magnetic field

is within the hysteresis range, the output will remain in the power-

power-on time has elapsed, the device output will correspond with on state. See Figure 4 for an example of the undervoltage lockout

the applied magnetic field for B > B_OPand B < B_RP. Powering-on behavior.

the device in the hysteresis range (less than B_OPand higher than

B_RP) will cause the device output to remain off. A valid output

state is attained after the first excursion beyond B_OPor B_RP.

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Sꢅꢆꢆly ꢏlitch

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High

ꢉow

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ꢃ ꢅ ꢃ_ꢇꢀ

ꢀ_ꢁꢁꢈ ꢀ_ꢁꢁꢂminꢃ

Figure 4: Power-On and Undervoltage Lockout Behavior

12

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

Functional Safety

Table 1: Switch Polarity Configuration Options

2

Part

Number

Suffix

Output

State for

B > B_OP

Output

State for

B = 0 G

Power-On

State,

t < t_PO

The APS11000 and APS11060 were designed

accordance with the international standard for

automotive functional safety, ISO 26262:2011.

in

Operating

Mode

-

Unipolar

South

xSL

xSH

xNL

xNH

Low

High

Low

High

Low

High

Low

High

These products achieve an ASIL (Automotive Safety Integrity

Unipolar

South

Level) rating of ASILA (pending confirmation) according to the

standard. The APS11000 and APS11060 are both classified as a

SEooC (Safety Element out of Context) and can be easily inte-

grated into safety-critical systems requiring higher ASIL ratings

that incorporate external diagnostics or use measures such as redun-

dancy. Safety documentation will be provided to support and guide

the integration process. For further information, contact your local

FAE for A²-SIL™ documentation: www.allegromicro.com/ASIL.

Unipolar

North

Unipolar

North

xPL

xPH

Omnipolar

Low

High

Low

High

Configurations xPL and xPH. The omnipolar operation of these

devices allows actuation with either a north or a south polarity

field. The xPL operates using the standard output polarity conven-

tion. Fields exceeding the operating points, B_OPSor B_OPN, will turn

the output on (low). When the magnetic field is removed or reduced

below the release point, B_RPNor B_RPS, the device output turns off

(goes high). The xPH is complementary, in that for the device, a

north or south polarity field exceeding the operate points, B_OPS

or B_OPN, will turn the output off (high). Removal of the field, or

reduction below the release point threshold, B_RPSor B_RPN, will turn

the output on (low). See Figure 3 for omnipolar switching behavior.

Operation

The APS11000 and APS11060 are integrated Hall-effect sensor

ICs with an open-drain output. Table 1 offers a guide for select-

ing the output polarity configuration, further explained in the

configuration sections below. The open-drain output is an NMOS

transistor that actuates in response to a magnetic field. The direc-

tion of the applied magnetic field is perpendicular to the branded

face for the APS11000, and parallel with the branded face for

the APS11060; see Figure 5 for an illustration. The devices are

offered in two packages: the UA package, a 3-pin through-hole

mounting configuration, or in the LH package, a 3-pin surface-

mount configuration. See the Selection Guide for a complete list

of available options.

After turn-on, the output transistor is capable of sinking current

up to the short circuit current limit, I_OM, which is a minimum of

15 mA. The difference in the magnetic operate and release points

is the hysteresis, B_HYS, of the device. This built-in hysteresis

allows clean switching of the output even in the presence of exter-

nal mechanical vibration and electrical noise.

Configurations xSL and xSH. The unipolar output of these

devices is actuated when a south-polarity magnetic field perpen-

dicular to the Hall element exceeds the operate point threshold,

B_OPS. When B_OPSis exceeded, the xSL output turns on (goes

low). The xSH is complementary, in that for this device the output

turns off (goes high) when B_OPSis exceeded. When the magnetic

field is removed or reduced below the release point, B_RPS, the

device outputs return to their original state—off for the xSL and

on for the xSH. See Figure 3 for unipolar south switching behav-

ior.

Configurations xNL and xNH. The unipolar output of these

devices is actuated when a north-polarity magnetic field perpen-

dicular to the Hall element exceeds the operate point threshold,

B_OPN. When B_OPNis exceeded, the xNL output turns on (goes low).

The xNH is complementary, in that for this device the output turns

off (goes high) when B_OPNis exceeded. When the magnetic field

is removed or reduced below the release point, B_RPN, the device

outputs return to their original state—off for the xNL and on for the

xNH. See Figure 3 for unipolar north switching behavior.

Figure 5: Magnetic Sensing Orientations

APS11000 LH (Panel A), APS11000 UA (Panel B),

APS11060 LH (Panel C), and APS11060 UA (Panel D)

13

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

Applications

It is strongly recommended that an external bypass capacitor be

connected (in close proximity to the Hall element) between the

supply and ground of the device to guarantee correct performance

under harsh environmental conditions and to reduce noise from

internal circuitry. As is shown in Figure 6: Typical and Enhanced

Protection Application Circuits, a 0.1 µF capacitor is required.

Extensive applications information for Hall-effect devices is

available in:

• Hall-Effect IC Applications Guide, AN27701,

• Hall-Effect Devices: Guidelines for Designing Subassemblies

Using Hall-Effect Devices AN27703.1

• Soldering Methods for Allegro’s Products – SMD and Through-

Hole, AN26009

In applications where the APS11000 or APS11060 receives

its power from an unregulated source such as a car battery, or

where greater immunity is required, additional measures may

be employed. Specifications for such transients will vary, so

protection circuit design should be optimized for each application.

For example, the circuit shown in Figure 6 includes an optional

series resistor and output capacitor which improves performance

during Powered ESD testing (ISO 10605) and Bulk Current

Injection testing (ISO 11452-4).

All are provided on the Allegro website:

www.allegromicro.com

Vertical Hall-Effect Sensor Linear Tools

ꢁꢂꢃical Aꢃꢃlicatiꢄns ꢅircꢆit

System design and magnetic sensor evaluation often require

an in-depth look at the overall strength and profile gener-

ated by a magnetic field input. To aid in this evaluation,

Allegro MicroSystems, LLC provides a high-accuracy linear

output tool capable of reporting the nonperpendicular magnetic

field by means of an vertical Hall-effect sensor IC equipped with

a calibrated analog output. For further information, contact your

local Allegro field applications engineer or sales representative.

ꢀ_SUPPꢁꢂ

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APS110ꢀꢀ

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ꢀ_PUꢁꢁ-UP

ꢀ_SUPPꢁꢂ

R_PUꢁꢁ-UP

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R_S

100 Ω

APS110ꢀꢀ

1

ꢅ

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ꢀ_ꢃUꢄ

ꢎNꢏ

3

ꢆ_ꢇꢂP

0.1 ꢈꢉ

ꢆ_ꢃUꢄ

ꢊ.ꢍ nꢉ

Figure 6: Typical and Enhanced

Protection Application Circuits

Recommended R_PULL-UP≤ 20 kΩ.

See Power-On Behavior section.

14

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

CHOPPER STABILIZATION

A limiting factor for switchpoint accuracy when using Hall-effect offset causing the magnetically induced signal to recover its

original spectrum at baseband while the DC offset becomes a

high-frequency signal. Then, using a low-pass filter, the signal

passes while the modulated DC offset is suppressed. Allegro’s

innovative chopper-stabilization technique uses a high-frequency

clock.

technology is the small signal voltage developed across the Hall

plate. This voltage is proportionally small relative to the offset

that can be produced at the output of the Hall sensor. This makes

it difficult to process the signal and maintain an accurate, reliable

output over the specified temperature and voltage range. Chopper

stabilization is a proven approach used to minimize Hall offset.

The high-frequency operation allows a greater sampling rate

that produces higher accuracy, reduced jitter, and faster signal

processing. Additionally, filtering is more effective and results

in a lower noise analog signal at the sensor output. Devices such

as the APS11000 and APS11060 that use this approach have an

extremely stable quiescent Hall output voltage, are immune to

thermal stress, and have precise recoverability after temperature

cycling. This technique is made possible through the use of a

BiCMOS process which allows the use of low offset and low

noise amplifiers in combination with high-density logic and

sample-and-hold circuits.

The technique, dynamic quadrature offset cancellation, removes

key sources of the output drift induced by temperature and pack-

age stress. This offset reduction technique is based on a signal

modulation-demodulation process. Figure 7: Model of Chopper

Stabilization Circuit (Dynamic Offset Cancellation) illustrates

how it is implemented.

The undesired offset signal is separated from the magnetically

induced signal in the frequency domain through modulation. The

subsequent demodulation acts as a modulation process for the

Regulator

Clock/Logic

Low-Pass

Filter

Hall Element

Amp

Figure 7: Model of Chopper Stabilization Circuit

(Dynamic Oﬀset Cancellation)

15

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

POWER DERATING

The device must be operated below the maximum junction tem-

perature, T_J(max). Reliable operation may require derating supplied

power and/or improving the heat dissipation properties of the

application.

This provides the allowable increase to T_Jresulting from internal

power dissipation. Then, using equation 2 first for the output as

shown below:

P_D(VOUT)= V_OUT× I_OUT= 500 mV × 20 mA = 10 mW

Then, for the V_CCsupply:

Thermal Resistance, R_θJA(junction to ambient), is a figure of

merit summarizing the ability of the application and the device to

dissipate heat from the junction (die), through all paths to ambient

air. R_θJAis dominated by the Effective Thermal Conductivity,

K, of the printed circuit board which includes adjacent devices

and board layout. Thermal resistance from the die junction to

case, R_θJC, is a relatively small component of R_θJA. Ambient air

temperature, T_A, and air motion are significant external factors in

determining a reliable thermal operating point.

P_D(VCC)= V_CC× I_CC= 24 V × 5 mA = 120 mW

Combine the power dissipated by the device pins:

P_D(total)= (P_D(VOUT)+ P_D(VCC)

)

P_D(total)= (10 mW + 120 mW) = 130 mW

Next, solve for the maximum allowable V_CCfor the given condi-

tions using equation 1:

V_CC(est)= P_D(total)÷ (I_CC+ I_OUT

130 mW ÷ (5 mA + 20 mA)

)

The following three equations can be used to determine operation

points for given power and thermal conditions:

V_CC(est)=130 mW ÷ 25 mA = 5.2 V

P_D= V_IN× I_IN(1)

ΔT = P_D× R_θJA(2)

T_J= T_A+ ΔT (3)

The result indicates that, at T_A, the application and device can dis-

sipate adequate amounts of heat at voltages ≤ V_CC(est)

.

If the application requires V_CC> V_CC(est)then R_θJAmust by

improved. This can be accomplished by adjusting the layout, PCB

materials, or by controlling the ambient temperature.

Determining Junction Temperature

For example, given common conditions: T_A= 25°C, V_CC= 12 V,

Determining Maximum T_A

I_CC= 2.5 mA, V_OUT(SAT)= 100 mV, I_OUT= 5 mA, and R_θJA

165°C/W, then:

=

In cases where the V_CC(max)level is known, and the system

designer would like to determine the maximum allowable ambient

temperature, T_A(max), the calculations can be reversed.

P_D= (V_CC× I_CC) + (V_OUT× I_OUT) =

(12 V × 2.5 mA) + (100 mV × 5 mA) =

30 mW + 0.5 mW = 30.5 mW

For example, in a worst-case scenario with conditions V_CC(max)

=

24 V, I_CC(max)= 5 mA, V_OUT= 500 mV, I_OUT(max)= 15 mA, and

R_θJA= 228°C/W, for the LH package using equation 1, the largest

possible amount of dissipated power is:

ΔT = P_D× R_θJA= 30.5 mW × 165°C/W = 5°C

T_J= T_A+ ΔT = 25°C + 5°C = 30°C

P_D= V_IN× I_IN

P_D= P_D(VOUT)+ P_D(VCC)= 500 mV × 15 mA + 24 V × 5 mA

P_D= 7.5 mW + 120 mW = 127.5 mW

Then, by rearranging equation 3:

Determining Maximum V_CC

For a given ambient temperature (T_A), the maximum allowable

power dissipation as a function of V_CCcan be calculated. P_D(max)

represents the maximum allowable power level without exceeding

T_J(max), at a selected R_θJAand T_A.

,

T_A(max)= T_J(max)– ΔT

Example: V_CCestimation using the conditions R_θJA= 228°C/W,

T_A(max)= 165°C – (127.5 mW × 228°C/W)

T_A(max)= 165°C – 29.1°C = 135.9°C

T_A(max)= 150°C, T_J(max)= 165°C, V_CC(max)= 24 V, I_CC(max)

=

5 mA, V_OUT= 500 mV, and I_OUT= 20 mA (output on), calculate

the maximum allowable power level, P_D(max), first using equa-

tion 3:

Finally, note that the T_A(max)rating of the device is 150°C and

performance is not guaranteed above this temperature for any

power level.

ΔT_(max)= T_J(max)– T_A= 165°C – 150°C = 15°C

16

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

Package LH, 3-Pin SMD (SOT23W)

APS11000

+0.12

–0.08

2.98

D

1.49

4°±4°

3

A

+0.020

0.180

–0.053

D

0.96

D

+0.10

–0.20

+0.19

1.91

–0.06

2.40

2.90

0.70

0.25 MIN

1.00

2

1

0.55 REF

0.25 BSC

0.95

Seating Plane

Gauge Plane

PCB Layout Reference View

B

Branded Face

8X 10° REF

1.00 ±0.13

+0.10

AAH

0.05

–0.05

0.95 BSC

0.40 ±0.10

1

C

Standard Branding Reference View

For Reference Only; not for tooling use (reference DWG-2840)

Dimensions in millimeters

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

Active Area Depth, 0.28 mm REF

A

B

Reference land pattern layout

All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary

to meet application process requirements and PCB layout tolerances

C

D

Branding scale and appearance at supplier discretion

Hall element, not to scale

17

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

Package LH, 3-Pin SMD (SOT23W)

APS11060

+0.12

–0.08

2.98

4°±4°

3

+0.020

0.180

–0.053

D

0.96

D

+0.10

–0.20

+0.19

1.91

–0.06

2.40

2.90

0.70

0.25 MIN

1.00

2

1

0.55 REF

0.25 BSC

0.95

PCB Layout Reference View

A

Seating Plane

Gauge Plane

B

Branded Face

8X 10° REF

1.00 ±0.13

+0.10

A44

0.05

–0.05

0.95 BSC

0.40 ±0.10

1

C

Standard Branding Reference View

For Reference Only; not for tooling use (reference DWG-2840)

Dimensions in millimeters

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

Active Area Depth, 1.32 mm

A

B

Reference land pattern layout

All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary

to meet application process requirements and PCB layout tolerances

C

D

Branding scale and appearance at supplier discretion

Hall element, not to scale

18

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

Package UA, 3-Pin SIP

APS11000

+0.08

–0.05

4.09

45°

B

C

E

2.04

1.52 ±0.05

10°

1.44

E

Mold Ejector

Pin Indent

E

+0.08

3.02

–0.05

45°

Branded

Face

0.79 REF

A

AAH

1.02

MAX

1

Standard Branding Reference View

D

1

2

3

14.99 ±0.25

+0.03

–0.06

0.41

For Reference Only; not for tooling use (reference DWG-9065)

Dimensions in millimeters

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

+0.05

–0.07

0.43

Dambar removal protrusion (6X)

A

ꢀ

ꢁ

D

Gate and tie bar burr area

Active Area Depth, 0.50 mm REF

Branding scale and appearance at supplier discretion

Hall element (not to scale)

E

1.27 NOM

19

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

Package UA, 3-Pin SIP

APS11060

+0.08

–0.05

4.09

45°

B

E

2.04

1.52 ±0.05

10°

C

E

Mold Ejector

+0.08

3.02

Pin Indent

–0.05

45°

Branded

Face

0.79 REF

A

A44

1.02

MAX

1

Standard Branding Reference View

D

1

2

3

14.99 ±0.25

+0.03

–0.06

0.41

For Reference Only; not for tooling use (reference DWG-9065)

Dimensions in millimeters

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

+0.05

–0.07

0.43

Dambar removal protrusion (6X)

Gate and tie bar burr area

A

ꢀ

ꢁ

D

Active Area Depth, 1.27 mm

Branding scale and appearance at supplier discretion

Hall element (not to scale)

E

1.27 NOM

20

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

APS11000 and

APS11060

Vertical and Planar Hall-Effect Switches

Revision History

Number

Date

Description

–

1

March 15, 2018

July 16, 2018

Initial release

Added APS11000 part option; updated Magnetic Characteristics tables; other minor editorial updates

Updated T_J(max)to 165°C, Selection Guide (page 3), Absolute Maximum Ratings footnotes (page 4), Power-

On State (page 6), Magnetic Characteristics table (page 8), Package Thermal Characteristics (page 9),

Magnetic Characteristic Performance chart labels (page 11), and Power Derating section (page 16).

2

October 22, 2018

3

4

February 7, 2020

May 12, 2020

Minor editorial updates

Added “(pending confirmation)” to ASIL references.

Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit

improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the

information being relied upon is current.

Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of

Allegro’s product can reasonably be expected to cause bodily harm.

The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor

for any infringement of patents or other rights of third parties which may result from its use.

Copies of this document are considered uncontrolled documents.

For the latest version of this document, visit our website:

www.allegromicro.com

21

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com


型号：	APS11060LLHALX1NH
厂家：	ALLEGRO MICROSYSTEMS
描述：	Vertical and Planar Hall-Effect Switches
文件：	总21页 (文件大小：1302K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

APS11060LLHALX1NH [ALLEGRO]

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