APS12200LLHALT [ALLEGRO]
High-Temperature Precision Hall-Effect Latches;
| 型号： | APS12200LLHALT |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | High-Temperature Precision Hall-Effect Latches |
| 文件： | 总16页 (文件大小：1046K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APS12200, APS12210,
and APS12230
2
-
High-Temperature Precision Hall-Effect Latches
FEATURES AND BENEFITS
DESCRIPTION
• Symmetrical latch switchpoints
The APS12200, APS12210, and APS12230 are three-wire,
planar Hall-effect sensor integrated circuits (ICs). These
devices were developed in accordance with ISO 26262:2011
and support a functional safety level of ASIL A.
• ASIL A functional safety compliance
• Automotive-grade ruggedness and fault tolerance
□ Extended AEC-Q100 qualification
□ Reverse-battery and 40 V load dump protection
□ Operation from –40°C to 175°C junction temperature
□ High EMC immunity, ±12 kV HBM ESD
□ Output short-circuit and overvoltage protection
□ Superior temperature stability
This family of precision Hall-effect latch ICs feature extended
AEC-Q100 qualification and are ideal for high-temperature
operation up to 175°C junction temperatures. In addition,
the APS12200/10/30 include a number of features designed
specifically to maximize system robustness, such as reverse-
battery protection, output current limiter, overvoltage, and
EMC protection.
□ Resistant to physical stress
• Operation from unregulated supplies, 2.8 to 24 V
• Chopper stabilization
• Solid-state reliability
• Industry-standard packages and pinouts
The single silicon chip includes: a voltage regulator, a Hall
plate, small signal amplifier, chopper stabilization, Schmitt
trigger, and a short-circuit-protected open-drain output. A
south pole of sufficient strength turns the output on; a north
pole of sufficient strength is necessary to turn the output off.
The devices include on-board transient protection for all pins,
permittingoperationdirectlyfromavehiclebatteryorregulator
with supply voltages from 2.8 to 24 V.
PACKAGES:
Not to scale
3-pin SIP
(suffix UA)
Twopackagestylesprovideachoiceofthrough-holeorsurface
mounting. Package type LH is a modified 3-pin SOT23W
surface-mount package, while UAis a three-pin ultramini SIP
for through-hole mounting. Both packages are lead (Pb) free
and RoHS compliant, with 100% matte-tin-plated leadframes.
3-pin SOT23W
(suffix LH)
Functional Block Diagram
VCC
R
EGULATOR
TO ALL SUBCIRCUITS
L
OW-PASS
ILTER
S
CHMITT
RIGGER
VOUT
F
T
Hall
Element
S
AMPLE, HOLD
&
H
ALL
C
ONTROL
URRENT
AVERAGING
A
MP
.
C
L
IMIT
GND
APS12200-10-30-DS, Rev. 1
MCO-0000382
February 11, 2019
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
SELECTION GUIDE
Part Number
Packing[1]
Mounting
Branding
A14
BRP (Min) BOP (Max)
APS12200LLHALX
APS12200LLHALT[2]
APS12200LUAA
13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
A14
–35 G
–80 G
35 G
80 G
A15
APS12210LLHALX
APS12210LLHALT[2]
APS12210LUAA
13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount
A16
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
A16
A17
APS12230LLHALX
APS12230LLHALT[2]
APS12230LUAA
13-in. reel, 10000 pieces/reel 3-pin SOT23W surface mount
A19
RoHS
COMPLIANT
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
A19
–180 G
180 G
A20
[1] Contact Allegro for additional packing options.
[2] Available through authorized Allegro distributors only.
ABSOLUTE MAXIMUM RATINGS
Characteristic
Forward Supply Voltage [1]
Reverse Supply Voltage [1]
Output Off Voltage [1]
Symbol
Notes
Rating
Units
V
VCC
30
–18
30
VRCC
VOUT
IOUT
V
V
Output Current [2]
60
mA
mA
–
Reverse Output Current
Magnetic Flux Density [3]
IROUT
B
–50
Unlimited
165
°C
°C
°C
kV
kV
kV
Maximum Junction Temperature
Storage Temperature
TJ(max)
For 500 hours
175
Tstg
–65 to 170
±12
VESD(HBM)
VESD(CDM)
VESD(SYS)
Human Body Model according to AEC-Q100-002
Charged Device Model according to AEC-Q100-011
ISO 10605, System Level
ESD Voltage [4]
±1
±15
[1] This rating does not apply to extremely short voltage transients such as load dump and/or ESD. Those events have individual ratings,
specific to the respective transient voltage event.
[2] Through short-circuit current limiting device.
[3] Guaranteed by design.
[4] System level ESD rating based on characterization performed under ISO 10605:2008 (2 kΩ / 330 pF) with the application circuit
shown in Figure 4.
2
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
PINOUT DIAGRAMS AND TERMINAL LIST TABLE
3
2
1
3
1
2
Package UA
Package LH
Terminal List
Number
Name
Description
Package LH
Package UA
VCC
VOUT
GND
Connects power supply to chip
Output from circuit
Ground
1
2
3
1
3
2
VSUPPLY
RLOAD
=
1 kΩ
APS122XX
1
2
VCC
VOUT
VOUT
CBYP
=
GND
0.1 µF
3
Figure 1: Typical Application Diagram
3
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
ELECTRICAL CHARACTERISTICS: Valid over full operating voltage, ambient temperature range TA = –40°C to 150°C, and with
BYP = 0.1 µF (unless otherwise specified)
C
Characteristics
Symbol
Test Conditions
Min.
Typ. [1]
Max.
Unit [2]
ELECTRICAL CHARACTERISTICS
Forward Supply Voltage
Supply Current
VCC
ICC
Operating, TJ < 175°C
2.8
1
–
2
24
3
V
mA
µA
mV
V
Output Leakage Current
Output Saturation Voltage
Output Off Voltage
IOUTOFF
VOUTOFF = 24 V, B < BRP
–
–
10
500
24
VOUT(SAT) IOUT = 20 mA, B > BOP
–
200
–
VOUTOFF
tON
B < BRP
–
VCC ≥ VCC(min), B < BRP(min) – 10 G,
B > BOP(max) + 10 G
Power-On Time
–
–
25
µs
[3]
POS
VCC ≥ VCC(min), t < tON
Low
800
0.2
–
Power-On State, Output
Chopping Frequency
fC
tr
–
–
–
–
2
2
kHz
µs
[4]
RLOAD = 1 kΩ, CL = 20 pF
RLOAD = 1 kΩ, CL = 20 pF
Output Rise Time
[4]
tf
0.1
µs
Output Fall Time
TRANSIENT PROTECTION CHARACTERISTICS
Output Short-Circuit Current Limit
Output Zener Clamp Voltage
Reverse Battery Current
IOM
VZoutput
IRCC
30
30
–
–
–
–
–
60
–
mA
V
IOUT = 3 mA, TA = 25°C, Output Off
VRCC = –18 V, TA = 25°C
–5
–
mA
V
Supply Zener Clamp Voltage
MAGNETIC CHARACTERISTICS
VZ
ICC = ICC(max) + 3 mA, TA = 25°C
30
APS12200
APS12210
APS12230
APS12200
APS12210
APS12230
APS12200
APS12210
APS12230
BOP + BRP
(BOP + BRP) / 2
5
25
20
50
35
80
G
G
G
G
G
G
G
G
G
G
G
Operate Point
Release Point
Hysteresis
BOP
100
–35
–80
–180
10
150
–20
–50
–150
40
180
–5
BRP
–25
–100
70
BHYS
50
100
300
–
160
360
27.5
13.75
200
–27.5
–13.75
Symmetry
BSYM
BOFF
Magnetic Offset
–
[1] Typical data are at TA = 25°C and VCC = 12 V.
[2] 1 G (gauss) = 0.1 mT (millitesla).
[3] Guaranteed by device design and characterization.
[4] CL = oscilloscope probe capacitance.
4
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information
Characteristic
Symbol
Test Conditions
Value
Units
Package LH, 1-layer PCB with copper limited to solder pads
228
°C/W
2
Package LH, 2-layer PCB with 0.463 in. of copper area each side
connected by thermal vias
Package Thermal Resistance
RθJA
110
165
°C/W
°C/W
Package UA, 1-layer PCB with copper limited to solder pads
Power Derating Curve
TJ(max) = 175°C; ICC = ICC(max), IOUT = 0 mA (Output Off)
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
VCC(max)
Package LH, 2-layer PCB
(RθJA = 110 °C/W)
Package UA, 1-layer PCB
(RθJA = 165 °C/W)
Package LH, 1-layer PCB
(RθJA = 228 °C/W)
8
7
6
5
4
VCC(min)
3
2
25
45
65
85 105 125 145 165 185
TJ(max)
Temperature (°C)
Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
Package LH, 2-layer PCB
(RθJA = 110°C/W)
Package UA, 1-layer PCB
(RθJA = 165°C/W)
800
700
600
500
400
300
200
100
Package LH, 1-layer PCB
(RθJA = 228°C/W)
0
25
45
65
85
105 125 145 165 185
Temperature (°C)
5
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
CHARACTERISTIC PERFORMANCE DATA
Electrical Characteristics
Aꢀerage Sꢁꢂꢂly Cꢁrrent ꢀersꢁs Sꢁꢂꢂly ꢅoltage
Aꢀerage Sꢁꢂꢂly Cꢁrrent ꢀersꢁs Amꢃient ꢄemꢂeratꢁre
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
TA (°C)
-40
VCC (V)
2.8
25
12
24
150
2
6
10
14
18
22
26
-60 -40 -20
0
20
40
60
80
100 120 140 160
VCC (V)
TA (°C)
Aꢀerage Low ꢁꢂtꢃꢂt ꢄoltage ꢀersꢂs Sꢂꢃꢃly ꢄoltage ꢇor ꢈꢁUꢆ ꢉ ꢊ0 mA
Aꢀerage Low ꢁꢂtꢃꢂt ꢄoltage ꢀersꢂs Amꢅient ꢆemꢃeratꢂre ꢇor ꢈꢁUꢆ ꢉ ꢊ0 mA
500
500
450
400
350
300
250
200
150
100
50
450
400
350
300
250
200
150
100
50
TA (°C)
-40
VCC (V)
2.8
12
24
25
150
0
0
2
6
10
14
18
22
26
-60 -40 -20
0
20
40
60
80
100 120 140 160
VCC (V)
TA (°C)
6
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
CHARACTERISTIC PERFORMANCE DATA (continued)
APS12200 Magnetic Characteristics
Average Operate Point versus Ambient Temperature
Average Operate Point versus Supply Voltage
35
30
25
20
15
10
5
35
30
25
20
15
10
5
TA (°C)
-40
VCC (V)
2.8
25
12
24
150
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
VCC (V)
18
22
26
TA (°C)
Average Release Point versus Ambient Temperature
Average Release Point versus Supply Voltage
-5
-10
-15
-20
-25
-30
-35
-5
-10
-15
-20
-25
-30
-35
TA (°C)
-40
VCC (V)
2.8
25
12
24
150
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
VCC (V)
18
22
26
TA (°C)
Average Switchpoint Hysteresis versus Supply Voltage
Average Switchpoint Hysteresis versus Ambient Temperature
70
60
50
40
30
20
10
70
60
50
40
30
20
10
VCC (V)
2.8
TA (°C)
-40
12
25
24
150
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
18
22
26
TA (°C)
VCC (V)
Average BOP + BRP Symmetry versus Supply Voltage
Average BOP + BRP Symmetry versus Ambient Temperature
25
20
15
10
5
25
20
15
10
5
VCC (V)
2.8
TA (°C)
-40
0
12
0
25
-5
-5
24
-10
-15
-20
-25
-10
-15
-20
-25
150
-60
-40
-20
0
20
40
60
80
100 120 140 160
2
6
10
14
18
22
26
TA (°C)
VCC (V)
7
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
CHARACTERISTIC PERFORMANCE DATA (continued)
APS12210 Magnetic Characteristics
Average Operate Point versus Ambient Temperature
Average Operate Point versus Supply Voltage
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
15
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
15
TA (°C)
-40
VCC (V)
2.8
25
12
24
150
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
VCC (V)
18
22
26
TA (°C)
Average Release Point versus Ambient Temperature
Average Release Point versus Supply Voltage
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
TA (°C)
-40
VCC (V)
2.8
25
12
24
150
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
VCC (V)
18
22
26
TA (°C)
Average Switchpoint Hysteresis versus Supply Voltage
Average Switchpoint Hysteresis versus Ambient Temperature
180
170
160
150
140
130
120
110
100
90
180
170
160
150
140
130
120
110
100
90
VCC (V)
2.8
TA (°C)
-40
12
25
24
80
80
150
70
70
60
60
50
50
40
40
30
30
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
18
22
26
TA (°C)
VCC (V)
Average BOP + BRP Symmetry versus Supply Voltage
Average BOP + BRP Symmetry versus Ambient Temperature
25
20
15
10
5
25
20
15
10
5
VCC (V)
2.8
TA (°C)
-40
0
12
0
25
-5
-5
24
-10
-15
-20
-25
-10
-15
-20
-25
150
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
18
22
26
TA (°C)
VCC (V)
8
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
CHARACTERISTIC PERFORMANCE DATA (continued)
APS12230 Magnetic Characteristics
Average Operate Point versus Ambient Temperature
Average Operate Point versus Supply Voltage
180
175
170
165
160
155
150
145
140
135
130
125
120
115
110
105
100
180
175
170
165
160
155
150
145
140
135
130
125
120
115
110
105
100
TA (°C)
-40
VCC (V)
2.8
25
12
24
150
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
VCC (V)
18
22
26
TA (°C)
Average Release Point versus Ambient Temperature
Average Release Point versus Supply Voltage
-100
-105
-110
-115
-120
-125
-130
-135
-140
-145
-150
-155
-160
-165
-170
-175
-180
-100
-105
-110
-115
-120
-125
-130
-135
-140
-145
-150
-155
-160
-165
-170
-175
-180
TA (°C)
-40
VCC (V)
2.8
25
12
24
150
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
VCC (V)
18
22
26
TA (°C)
Average Switchpoint Hysteresis versus Supply Voltage
Average Switchpoint Hysteresis versus Ambient Temperature
360
350
340
330
320
310
300
290
280
270
260
250
240
230
220
210
200
360
350
340
330
320
310
300
290
280
270
260
250
240
230
220
210
200
VCC (V)
2.8
TA (°C)
-40
12
25
24
150
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
18
22
26
TA (°C)
VCC (V)
Average BOP + BRP Symmetry versus Supply Voltage
Average BOP + BRP Symmetry versus Ambient Temperature
25
20
15
10
5
25
20
15
10
5
VCC (V)
2.8
TA (°C)
-40
0
12
0
25
-5
-5
24
-10
-15
-20
-25
-10
-15
-20
-25
150
-60 -40 -20
0
20
40
60
80
100 120 140 160
2
6
10
14
18
22
26
TA (°C)
VCC (V)
9
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
FUNCTIONAL DESCRIPTION
OPERATION
POWER-ON BEHAVIOR
The output of these devices switches low (turns on) when a mag-
netic field perpendicular to the Hall element exceeds the operate
Device power-on occurs once tON has elapsed. During the
time prior to tON, and after VCC ≥ VCC(min), the output state is
point threshold, BOP (see Figure 2). After turn-on, the output volt- VOUT(SAT) (Low). After tON has elapsed, the output will corre-
age is VOUT(SAT). The output transistor is capable of continuously spond with the applied magnetic field for B > BOP or B < BRP.
sinking up to 30 mA. When the magnetic field is reduced below
the release point, BRP, the device output goes high (turns off)
to VOUTOFF. The difference in the magnetic operate and release
points is the hysteresis, BHYS, of the device. This built-in hyster-
esis allows clean switching of the output even in the presence of
external mechanical vibration and electrical noise.
See Figure 3 for an example.
Powering-on the device in the hysteresis range (less than BOP and
higher than BRP) will give an output state of VOUT(SAT). The cor-
rect state is attained after the first excursion beyond BOP or BRP
.
POS
Removal of the magnetic field will leave the device output
latched on if the last crossed switchpoint is BOP, or latched off if
the last crossed switch point is BRP.
B > BOP, BRP < B < BOP
V
B < BRP
VOUTOFF
Output State
Undefined for
V+
POS
VCC<VCC(min)
VOUTOFF
VOUT(SAT )
t
t
V
VCC(min)
VOUT(SAT)
B+
0
0
B–
0
tON
BHYS
Figure 3: Power-On Timing Diagram
Figure 2: Switching Behavior of Latches
On the horizontal axis, the B+ direction indicates increasing
south polarity magnetic field strength, and the B– direction
indicates increasing north polarity field strength.
10
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
VPULL-UP
VSUPPLY
FUNCTIONAL SAFETY
2
-
The APS12200, APS12210, and APS12230
were designed in accordance with the interna-
A
RLOAD
1 kΩ
=
RS =
100 Ω
APS122XX
tional standard for automotive functional safety, ISO 26262:2011.
These products achieve an ASIL (Automotive Safety Integrity
Level) rating of ASILA according to the standard. The APS12200,
APS12210, and APS12230 are all classified as a SEooC (Safety
Element out of Context) and can be easily integrated into safety-
critical systems requiring higher ASIL ratings that incorporate
external diagnostics or use measures such as redundancy. Safety
documentation will be provided to support and guide the integra-
tion process. For further information, contact your local Allegro
field applications engineer or sales representative.
VOUT
1
2
VCC
VOUT
A
GND
3
CBYP
0.1 µF
=
COUT
=
4.7 nF
A
RS and COUT are recommended for maximum
robustness in an automotive environment.
Figure 4: Enhanced Protection Circuit
APPLICATIONS
These devices are sensitive in the direction perpendicular to the
branded face, as depicted in Figure 5. For further information,
extensive applications information on magnets and Hall-effect
sensors is available in:
It is strongly recommended that an external bypass capacitor be
connected (in close proximity to the Hall element) between the
supply and ground of the device to guarantee correct performance
under harsh environmental conditions and to reduce noise from
internal circuitry. As is shown in Figure 1: Typical Application
Circuit, a 0.1 µF capacitor is required. In applications where
maximum robustness is required, such as in an automobile, addi-
tional measures may be taken. In Figure 4: Enhanced Protection
Circuit, a resistor in series with the VCC pin and a capacitor on
the VOUT pin enhance the EMC immunity of the device. It is
up to the user to fully qualify the Allegro sensor IC in their end
system to ensure they achieve their system requirements.
• Hall-Effect IC Applications Guide, AN27701,
• Hall-Effect Devices: Guidelines for Designing Subassemblies
Using Hall-Effect Devices AN27703.1
• Soldering Methods for Allegro’s Products – SMD and
Through-Hole, AN26009
All are provided on the Allegro website:
www.allegromicro.com
Figure 5: Sensing Configurations
11
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
offset, causing the magnetically induced signal to recover its orig-
CHOPPER STABILIZATION
inal spectrum at baseband while the DC offset becomes a high-
frequency signal. Then, using a low-pass filter, the signal passes
while the modulated DC offset is suppressed. Allegro’s innova-
tive chopper stabilization technique uses a high-frequency clock.
The high-frequency operation allows a greater sampling rate
that produces higher accuracy, reduced jitter, and faster signal
processing. Additionally, filtering is more effective and results in
a lower noise analog signal at the sensor output. Devices such as
the APS12200, APS12210, and APS12230 that use this approach
have an extremely stable quiescent Hall output voltage, are
immune to thermal stress, and have precise recoverability after
temperature cycling. This technique is made possible through the
use of a BiCMOS process which allows the use of low offset and
low noise amplifiers in combination with high-density logic and
sample-and-hold circuits.
A limiting factor for switchpoint accuracy when using Hall-effect
technology is the small signal voltage developed across the Hall
plate. This voltage is proportionally small relative to the offset
that can be produced at the output of the Hall sensor. This makes
it difficult to process the signal and maintain an accurate, reliable
output over the specified temperature and voltage range. Chopper
stabilization is a proven approach used to minimize Hall offset.
The Allegro technique, dynamic quadrature offset cancellation,
removes key sources of the output drift induced by temperature
and package stress. This offset reduction technique is based on a
signal modulation-demodulation process. Figure 6 illustrates how
it is implemented.
The undesired offset signal is separated from the magnetically
induced signal in the frequency domain through modulation. The
subsequent demodulation acts as a modulation process for the
Regulator
Clock/Logic
Low-Pass
Filter
Hall Element
Amp
Figure 6: Model of Chopper Stabilization
(Dynamic Offset Cancellation)
12
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
For example, given common conditions such as: TA= 25°C,
POWER DERATING
The device must be operated below the maximum junction tem-
perature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the appli-
cation. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro MicroSystems website.)
VCC = 12 V, ICC = 2 mA, VOUT = 185 mV, IOUT = 20 mA (output
on), and RθJA = 165°C/W, then:
PD = (VCC × ICC) + (VOUT × IOUT) =
(12 V × 2 mA) + (185 mV × 20 mA) =
24 mW + 3.7 mW = 27.7 mW
ΔT = PD × RθJA = 27.7 mW × 165°C/W = 4.6°C
TJ = TA + ΔT = 25°C + 4.6°C = 29.6°C
The Package Thermal Resistance, RθJA, is a figure of merit sum-
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity, K,
of the printed circuit board, including adjacent devices and traces.
Radiation from the die through the device case, RθJC, is a relatively
small component of RθJA. Ambient air temperature, TA, and air
motion are significant external factors, damped by overmolding.
A worst-case estimate, PD(max), represents the maximum allow-
able power level (VCC(max), ICC(max)), without exceeding
TJ(max), at a selected RθJA
.
For example, given the conditions RθJA = 228°C/W, TJ(max) =
175°C, VCC(max) = 24 V, ICC(max) = 4 mA, VOUT = 500 mV,
and IOUT = 25 mA (output on), the maximum allowable operating
ambient temperature can be determined.
The resulting power dissipation capability directly reflects upon
the ability of the device to withstand extreme operating condi-
tions. The junction temperature mission profile specified in the
Absolute Maximum Ratings table designates a total operating life
capability based on qualification for the most extreme conditions,
where TJ may reach 175°C.
The power dissipation required for the output is shown below:
PD(VOUT) = VOUT × IOUT = 500 mV × 25 mA = 12.5 mW
The power dissipation required for the IC supply is shown below:
PD(VCC) = VCC × ICC = 24 V × 4 mA = 96 mW
The silicon IC is heated internally when current is flowing into
the VCC terminal. When the output is on, current sinking into the
VOUT terminal generates additional heat. This may increase the
junction temperature, TJ, above the surrounding ambient tempe-
rature. The APS12200, APS12210, and APS12230 are permitted
to operate up to TJ = 175°C. As mentioned above, an operating
device will increase TJ according to equations 1, 2, and 3 below.
This allows an estimation of the maximum ambient operating
temperature.
Next, by inverting using equation 2:
ΔT = PD × RθJA = [PD(VOUT) + PD(VCC)] × 228°C/W =
(12.5 mW + 96 mW) × 228°C/W =
108.5 mW × 228°C/W = 24.7°C
Finally, by inverting equation 3 with respect to voltage:
TA(est) = TJ(max) – ΔT = 175°C – 24.7°C = 150.3°C
In the above case, there is sufficient power dissipation capability
to operate up to TA(est). The example indicates that TA(max)
can be as high as 150.3°C without exceeding TJ(max). Howe-
ver, the TA(max) rating of the devices is 150°C; the APS12200,
APS12210, and APS12230 performance is not guaranteed above
TA = 150°C.
PD = VIN
I
(1)
(2)
(3)
×
IN
ꢀ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀΔT = PD
R
θJA
×
TJ = TA + ΔT
13
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
Package LH, 3-Pin (SOT-23W)
+0.12
–0.08
2.98
3
D
1.49
4°±4°
A
+0.020
–0.053
0.180
D
0.96
D
+0.10
2.90
+0.19
–0.06
2.40
1.91
–0.20
0.70
0.25 MIN
1.00
2
1
0.55 REF
0.25 BSC
0.95
PCB Layout Reference View
Seating Plane
Gauge Plane
B
Branded Face
8X 10° REF
C
Standard Branding Reference View
1.00 ±0.13
+0.10
0.05
A14
–0.05
0.95 BSC
0.40 ±0.10
1
For Reference Only; not for tooling use (reference dwg. 802840)
Dimensions in millimeters
APS12200LLHA
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Active Area Depth, 0.28 mm REF
A
B
A16
A19
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C
D
1
1
Branding scale and appearance at supplier discretion
Hall element, not to scale
APS12210LLHA
APS12230LLHA
14
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
Package UA, 3-Pin SIP
+0.08
4.09
–0.05
For Reference Only; not for tooling use (reference DWG-9065)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
45°
B
Exact case and lead configuration at supplier discretion within limits shown
C
E
Dambar removal protrusion (6X)
Gate and tie bar burr area
A
2.04
B
C
D
1.52 ±0.05
Active Area Depth, 0.50 mm REF
10°
1.44
E
Branding scale and appearance at supplier discretion
Hall element (not to scale)
Mold Ejector
Pin Indent
E
+0.08
3.02
E
–0.05
45°
Branded
Face
Standard Branding Reference View
A15
D
0.79 REF
A
1.02
MAX
1
1
2
3
APS12200LUAA
14.99 ±0.25
+0.03
–0.06
0.41
A17
1
+0.05
–0.07
APS12210LUAA
0.43
A20
1
APS12230LUAA
1.27 NOM
15
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS12200,
APS12210,
and APS12230
High-Temperature Precision Hall-Effect Latches
Revision History
Number
Date
March 6, 2018
February 11, 2019
Description
–
1
Initial release
Minor editorial updates
Copyright ©2019, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.
For the latest version of this document, visit our website:
www.allegromicro.com
16
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明