APS13290 [ALLEGRO]
Precision Hall-Effect Latches for Consumer and Industrial Applications;
| 型号： | APS13290 |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | Precision Hall-Effect Latches for Consumer and Industrial Applications |
| 文件： | 总15页 (文件大小：991K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APS13290
and APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
FEATURES AND BENEFITS
DESCRIPTION
• Symmetrical latch switchpoints
• Superior ruggedness and fault tolerance
TheAPS13290andAPS13291arethree-wire,planarHall-effect
sensor integrated circuits (ICs) especially suited for operation
• Reverse-polarity and transient protection
• Operation from –40°C to 175°C junction temperature
• Output short-circuit and overvoltage protection
• Superior temperature stability
over extended temperature ranges (up to 125°C).
This family of precision Hall-effect latch ICs are ideal for
industrial and consumer applications and feature performance
enhancements permitting high-temperature operation up to
175°C junction temperatures. In addition, the APS13290/1
includeanumberoffeaturesdesignedspecificallytomaximize
system robustness, such as reverse-polarity protection, output
current limiter, overvoltage, and EMC protection.
• Resistant to physical stress
• High EMC immunity, ±12 kV HBM ESD
• Operation from unregulated supplies, 2.8 to 24 V
• Chopper stabilization
• Solid-state reliability
• Industry-standard packages and pinouts
The single silicon chip includes: a voltage regulator, a Hall
plate, small signal amplifier, chopper stabilization, Schmitt
trigger, and a short-circuit-protected open-drain output. A
south pole of sufficient strength turns the output on; a north
pole of sufficient strength is necessary to turn the output off.
The devices include on-board transient protection for all pins,
permittingoperationdirectlyfromavehiclebatteryorregulator
with supply voltages from 2.8 to 24 V.
PACKAGES:
Not to scale
3-pin SIP
(suffix UA)
Twopackagestylesprovideachoiceofthrough-holeorsurface
mounting. Package type LH is a modified 3-pin SOT23W
surface-mount package, while UAis a three-pin ultramini SIP
for through-hole mounting. Both packages are lead (Pb) free
and RoHS compliant, with 100% matte-tin-plated leadframes.
3-pin SOT23W
(suffix LH)
Functional Block Diagram
VCC
R
EGULATOR
TO ALL SUBCIRCUITS
L
OW-PASS
ILTER
S
CHMITT
RIGGER
VOUT
F
T
Hall
Element
S
AMPLE, HOLD
&
H
ALL
C
ONTROL
URRENT
AVERAGING
A
MP
.
C
L
IMIT
GND
APS13290-1-DS, Rev. 1
MCO-0000385
February 11, 2019
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
SELECTION GUIDE
Magnetic Switchpoints [2]
Ambient Temperature,
Part Number
Packing[1]
Mounting
Operate
BOP (G)
Release
BRP (G)
TA
APS13290KLHALX
APS13290KLHALT [3]
APS13290KUAA
13-in. reel, 10000 pieces/reel
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SOT23W surface mount
3-pin SIP through hole
5 to 40
–5 to –40
–40°C to 125°C
APS13291KLHALX
APS13291KLHALT [3]
APS13291KUAA
13-in. reel, 10000 pieces/reel
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SOT23W surface mount
3-pin SIP through hole
25 to 80
–25 to –80
[1] Contact Allegro for additional packing options.
[2] Algebraic convention used: (+) south polarity, (‒) north polarity.
[3] Available through authorized Allegro distributors only.
RoHS
COMPLIANT
ꢀSUPPLꢁ
RLꢂAꢉ
1 ꢊΩ
ꢆ
APS1329ꢀ
1
ꢄ
ꢀCC
ꢀꢂUꢃ
ꢀꢂUꢃ
CꢅꢁP
ꢆ
ꢋNꢉ
0.1 ꢇꢈ
3
Figure 1: Typical Application Circuit
2
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
VCC
Notes
Rating
30
Units
V
Forward Supply Voltage [1]
Reverse Supply Voltage [1]
Output Off Voltage [1]
VRCC
VOUT
IOUT
IROUT
B
–18
V
30
V
Output Current [2]
60
mA
mA
–
Reverse Output Current
Magnetic Flux Density [3]
Operating Temperature Range
–50
Unlimited
–40 to 125
165
TA
Range K
°C
°C
°C
°C
kV
kV
Maximum Junction Temperature
Storage Temperature
TJ(max)
Tstg
For 500 hours
175
–65 to 170
±12
VESD(HBM)
VESD(CDM)
Human Body Model according to AEC-Q100-002
Charged Device Model according to AEC-Q100-011
ESD Voltage
±1
[1] This rating does not apply to extremely short voltage transients such as load dump and/or ESD. Those events have individual ratings,
specific to the respective transient voltage event.
[2] Through short-circuit current limiting device.
[3] Guaranteed by design.
PINOUT DIAGRAMS AND TERMINAL LIST TABLE
3
2
1
3
1
2
Package UA
Package LH
Terminal List
Number
Name
Description
Package LH Package UA
VCC
VOUT
GND
Connects power supply to chip
1
2
3
1
3
2
Output from circuit
Ground
3
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
ELECTRICAL CHARACTERISTICS: Valid over full operating voltage, ambient temperature range TA = –40°C to 125°C, and with
CBYP = 0.1 µF (unless otherwise specified)
Characteristics
ELECTRICAL CHARACTERISTICS
Forward Supply Voltage
Supply Current
Symbol
Test Conditions
Min.
Typ. [1]
Max.
Unit [2]
VCC
ICC
Operating, TJ < 175°C
2.8
1
–
2
24
3
V
mA
µA
mV
V
Output Leakage Current
Output Saturation Voltage
Output Off Voltage
IOUTOFF
VOUTOFF = 24 V, B < BRP
–
–
10
500
24
VOUT(SAT) IOUT = 20 mA, B > BOP
–
200
–
VOUTOFF
tON
B < BRP
–
VCC ≥ VCC(min), B < BRP(min) – 10 G,
B > BOP(max) + 10 G
[3]
–
–
25
µs
Power-On Time
[3]
POS
VCC ≥ VCC(min), t < tON
Low
800
0.2
–
Power-On State, Output
Chopping Frequency
fC
tr
–
–
–
–
2
2
kHz
µs
[4]
RLOAD = 1 kΩ, CL = 20 pF
RLOAD = 1 kΩ, CL = 20 pF
Output Rise Time
[4]
tf
0.1
µs
Output Fall Time
TRANSIENT PROTECTION CHARACTERISTICS
Output Short-Circuit Current Limit
Output Zener Clamp Voltage
Reverse Battery Current
IOM
VZoutput
IRCC
30
30
–
–
–
–
–
60
–
mA
V
IOUT = 3 mA, TA = 25°C, Output Off
VRCC = –18 V, TA = 25°C
–5
–
mA
V
Supply Zener Clamp Voltage
MAGNETIC CHARACTERISTICS
VZ
ICC = ICC(max) + 3 mA, TA = 25°C
30
APS13290
APS13291
APS13290
APS13291
APS13290
APS13291
BOP + BRP
(BOP + BRP) / 2
5
25
20
50
–20
–50
40
100
–
40
80
G
G
G
G
G
G
G
G
Operate Point
Release Point
Hysteresis
BOP
–40
–80
10
–5
BRP
–25
80
BHYS
50
160
27.5
13.75
Symmetry
BSYM
BOFF
–27.5
–13.75
Magnetic Offset
–
[1] Typical data are at TA = 25°C and VCC = 12 V.
[2] 1 G (gauss) = 0.1 mT (millitesla).
[3] Guaranteed by device design and characterization.
[4] CL = oscilloscope probe capacitance.
4
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information
Characteristic
Symbol
Test Conditions
Value
Units
Package LH, 1-layer PCB with copper limited to solder pads
228
°C/W
2
Package LH, 2-layer PCB with 0.463 in. of copper area each side
connected by thermal vias
Package Thermal Resistance
RθJA
110
165
°C/W
°C/W
Package UA, 1-layer PCB with copper limited to solder pads
Power Derating Curve
TJ(max) = 175°C; ICC = ICC(max), IOUT = 0 mA (Output Off)
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
VCC(max)
Package LH, 2-layer PCB
(RθJA = 110 °C/W)
Package UA, 1-layer PCB
(RθJA = 165 °C/W)
Package LH, 1-layer PCB
(RθJA = 228 °C/W)
8
7
6
5
4
VCC(min)
3
2
25
45
65
85 105 125 145 165 185
TJ(max)
Temperature (°C)
Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
Package LH, 2-layer PCB
(RθJA = 110°C/W)
Package UA, 1-layer PCB
(RθJA = 165°C/W)
800
700
600
500
400
300
200
100
Package LH, 1-layer PCB
(RθJA = 228°C/W)
0
25
45
65
85
105 125 145 165 185
Temperature (°C)
5
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
CHARACTERISTIC PERFORMANCE DATA
Electrical Characteristics
Average Supply Current versus Supply Voltage
Average Supply Current versus Ambient Temperature
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
TA (°C)
-40
VCC (V)
2.8
25
12
24
125
2
6
10
14
18
22
26
-60
-40
-20
0
20
40
60
80
100
120
140
VCC (V)
TA (°C)
Average Low Output Voltage versus Supply Voltage for IOUT = 20 mA
Average Low Output Voltage versus Ambient Temperature for IOUT = 20 mA
500
500
450
400
350
300
250
200
150
100
50
450
400
350
300
250
200
150
100
50
TA (°C)
-40
VCC (V)
2.8
25
12
125
24
0
0
2
6
10
14
18
22
26
-60
-40
-20
0
20
40
60
80
100
120
140
VCC (V)
TA (°C)
6
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
CHARACTERISTIC PERFORMANCE DATA (continued)
APS13290 Magnetic Characteristics
Average Operate Point versus Ambient Temperature
Average Operate Point versus Supply Voltage
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
TA (°C)
-40
VCC (V)
2.8
25
12
24
125
-60
-40
-20
0
20
40
60
80
100
120
140
2
6
10
14
VCC (V)
18
22
26
TA (°C)
Average Release Point versus Ambient Temperature
Average Release Point versus Supply Voltage
-5
-10
-15
-20
-25
-30
-35
-40
-5
-10
-15
-20
-25
-30
-35
-40
TA (°C)
-40
VCC (V)
2.8
25
12
24
125
-60
-40
-20
0
20
40
60
80
100
120
140
2
6
10
14
VCC (V)
18
22
26
TA (°C)
Average Switchpoint Hysteresis versus Supply Voltage
Average Switchpoint Hysteresis versus Ambient Temperature
80
70
60
50
40
30
20
10
80
70
60
50
40
30
20
10
VCC (V)
2.8
TA (°C)
-40
12
25
24
125
-60
-40
-20
0
20
40
60
80
100
120
140
2
6
10
14
18
22
26
TA (°C)
VCC (V)
Average BOP + BRP Symmetry versus Supply Voltage
Average BOP + BRP Symmetry versus Ambient Temperature
25
20
15
10
5
25
20
15
10
5
VCC (V)
2.8
TA (°C)
-40
0
12
0
25
-5
-5
24
-10
-15
-20
-25
-10
-15
-20
-25
125
-60
-40
-20
0
20
40
60
80
100
120
140
2
6
10
14
18
22
26
TA (°C)
VCC (V)
7
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
CHARACTERISTIC PERFORMANCE DATA (continued)
APS13291 Magnetic Characteristics
Average Operate Point versus Ambient Temperature
Average Operate Point versus Supply Voltage
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
15
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
15
TA (°C)
-40
VCC (V)
2.8
25
12
24
125
-60
-40
-20
0
20
40
60
80
100
120
140
2
6
10
14
VCC (V)
18
22
26
TA (°C)
Average Release Point versus Ambient Temperature
Average Release Point versus Supply Voltage
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
TA (°C)
-40
VCC (V)
2.8
25
12
24
125
-60
-40
-20
0
20
40
60
80
100
120
140
2
6
10
14
VCC (V)
18
22
26
TA (°C)
Average Switchpoint Hysteresis versus Supply Voltage
Average Switchpoint Hysteresis versus Ambient Temperature
180
170
160
150
140
130
120
110
100
90
180
170
160
150
140
130
120
110
100
90
VCC (V)
2.8
TA (°C)
-40
12
25
24
80
80
125
70
70
60
60
50
50
40
40
30
30
-60
-40
-20
0
20
40
60
80
100
120
140
2
6
10
14
18
22
26
TA (°C)
VCC (V)
Average BOP + BRP Symmetry versus Supply Voltage
Average BOP + BRP Symmetry versus Ambient Temperature
25
20
15
10
5
25
20
15
10
5
VCC (V)
2.8
TA (°C)
-40
0
12
0
25
-5
-5
24
-10
-15
-20
-25
-10
-15
-20
-25
125
-60
-40
-20
0
20
40
60
80
100
120
140
2
6
10
14
18
22
26
TA (°C)
VCC (V)
8
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
FUNCTIONAL DESCRIPTION
OPERATION
POWER-ON BEHAVIOR
The output of these devices switches low (turns on) when a mag-
netic field perpendicular to the Hall element exceeds the operate
Device power-on occurs once tON has elapsed. During the
time prior to tON, and after VCC ≥ VCC(min), the output state is
point threshold, BOP (see Figure 2). After turn-on, the output volt- VOUT(SAT) (Low). After tON has elapsed, the output will corre-
age is VOUT(SAT). The output transistor is capable of continuously spond with the applied magnetic field for B > BOP or B < BRP.
sinking up to 30 mA. When the magnetic field is reduced below
the release point, BRP, the device output goes high (turns off)
to VOUTOFF. The difference in the magnetic operate and release
points is the hysteresis, BHYS, of the device. This built-in hyster-
esis allows clean switching of the output even in the presence of
external mechanical vibration and electrical noise.
See Figure 3 for an example.
Powering-on the device in the hysteresis range (less than BOP and
higher than BRP) will give an output state of VOUT(SAT). The cor-
rect state is attained after the first excursion beyond BOP or BRP
.
POS
Removal of the magnetic field will leave the device output
latched on if the last crossed switchpoint is BOP, or latched off if
the last crossed switch point is BRP.
B > BOP, BRP < B < BOP
V
B < BRP
VOUTOFF
Output State
Undefined for
V+
POS
VCC<VCC(min)
VOUTOFF
VOUT(SAT )
t
t
V
VCC(min)
VOUT(SAT)
B+
0
0
B–
0
tON
BHYS
Figure 3: Power-On Timing Diagram
Figure 2: Switching Behavior of Latches
On the horizontal axis, the B+ direction indicates increasing
south polarity magnetic field strength, and the B– direction
indicates increasing north polarity field strength.
9
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
ꢀPULL-UP
ꢀSUPPLꢁ
APPLICATIONS
It is strongly recommended that an external bypass capacitor be
connected (in close proximity to the Hall element) between the
supply and ground of the device to guarantee correct performance
under harsh environmental conditions and to reduce noise from
internal circuitry. As is shown in Figure 1: Typical Application
Circuit, a 0.1 µF capacitor is typical. In applications where maxi-
mum robustness is required, such as long-life industrial motors,
additional measures may be taken. In Figure 4: Enhanced Protec-
tion Circuit, a resistor in series with the VCC pin and a capacitor
on the VOUT pin enhance the EMC immunity of the device. It is
up to the user to fully qualify the Allegro sensor IC in their end
system to ensure they achieve their system requirements.
A
RLꢂAꢉ
1 ꢊΩ
ꢆ
RS ꢆ
100 Ω
APS1329ꢀ
ꢀꢂUꢃ
1
ꢄ
ꢀCC
ꢀꢂUꢃ
A
ꢍNꢉ
3
CꢅꢁP
0.1 ꢇꢈ
ꢆ
CꢂUꢃ
ꢆ
ꢋ.ꢌ nꢈ
A
RS and CꢂUꢃ are recommended ꢎor maꢏimꢐm
roꢑꢐstness in an aꢐtomotiꢒe enꢒironment.
Figure 4: Enhanced Protection Circuit
These devices are sensitive in the direction perpendicular to the
branded face, as depicted in Figure 5. For further information,
extensive applications information on magnets and Hall-effect
sensors is available in:
• Hall-Effect IC Applications Guide, AN27701,
• Hall-Effect Devices: Guidelines for Designing Subassemblies
Using Hall-Effect Devices AN27703.1
• Soldering Methods for Allegro’s Products – SMD and
Through-Hole, AN26009
All are provided on the Allegro website:
www.allegromicro.com
Figure 5: Sensing Configurations
10
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
The subsequent demodulation acts as a modulation process for
CHOPPER STABILIZATION
the offset, causing the magnetically induced signal to recover
its original spectrum at baseband while the DC offset becomes
a high-frequency signal. Then, using a low-pass filter, the signal
passes while the modulated DC offset is suppressed. Allegro’s
innovative chopper stabilization technique uses a high-frequency
clock. The high-frequency operation allows a greater sampling
rate that produces higher accuracy, reduced jitter, and faster sig-
nal processing. Additionally, filtering is more effective and results
in a lower noise analog signal at the sensor output. Devices such
as the APS13290 and APS13291 that use this approach have an
extremely stable quiescent Hall output voltage, are immune to
thermal stress, and have precise recoverability after temperature
cycling. This technique is made possible through the use of a
BiCMOS process which allows the use of low offset and low
noise amplifiers in combination with high-density logic and
sample-and-hold circuits.
A limiting factor for switchpoint accuracy when using Hall-effect
technology is the small signal voltage developed across the Hall
plate. This voltage is proportionally small relative to the offset
that can be produced at the output of the Hall sensor. This makes
it difficult to process the signal and maintain an accurate, reliable
output over the specified temperature and voltage range. Chopper
stabilization is a proven approach used to minimize Hall offset.
The Allegro technique, dynamic quadrature offset cancellation,
removes key sources of the output drift induced by temperature
and package stress. This offset reduction technique is based on a
signal modulation-demodulation process. Figure 6 illustrates how
it is implemented.
The undesired offset signal is separated from the magnetically
induced signal in the frequency domain through modulation.
Regulator
Clock/Logic
Low-Pass
Filter
Hall Element
Amp
Figure 6: Model of Chopper Stabilization
(Dynamic Offset Cancellation)
11
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
For example, given common conditions such as: TA= 25°C,
POWER DERATING
The device must be operated below the maximum junction tem-
perature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the appli-
cation. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro MicroSystems website.)
VCC = 12 V, ICC = 2 mA, VOUT = 200 mV, IOUT = 20 mA (output
on), and RθJA = 165°C/W, then:
PD = (VCC × ICC) + (VOUT × IOUT) =
(12 V × 2 mA) + (200 mV × 20 mA) =
24 mW + 4 mW = 28 mW
ΔT = PD × RθJA = 28 mW × 165°C/W = 4.6°C
TJ = TA + ΔT = 25°C + 4.6°C = 29.6°C
The Package Thermal Resistance, RθJA, is a figure of merit sum-
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity, K,
of the printed circuit board, including adjacent devices and traces.
Radiation from the die through the device case, RθJC, is a relatively
small component of RθJA. Ambient air temperature, TA, and air
motion are significant external factors, damped by overmolding.
A worst-case estimate, PD(max), represents the maximum allow-
able power level (VCC(max), ICC(max)), without exceeding
TJ(max), at a selected RθJA
.
For example, given the conditions RθJA = 228°C/W, TJ(max) =
175°C, VCC(max) = 24 V, ICC(max) = 3.25 mA, VOUT = 500 mV,
and IOUT = 30 mA (output on), the maximum allowable operating
ambient temperature can be determined.
The resulting power dissipation capability directly reflects upon
the ability of the device to withstand extreme operating condi-
tions. The junction temperature mission profile specified in the
Absolute Maximum Ratings table designates a total operating life
capability based on qualification for the most extreme conditions,
where TJ may reach 175°C.
The power dissipation required for the output is shown below:
PD(VOUT) = VOUT × IOUT = 500 mV × 30 mA = 15 mW
The power dissipation required for the IC supply is shown below:
PD(VCC) = VCC × ICC = 24 V × 3.25 mA = 78 mW
Next, by inverting using equation 2:
The silicon IC is heated internally when current is flowing into
the VCC terminal. When the output is on, current sinking into the
VOUT terminal generates additional heat. This may increase the
junction temperature, TJ, above the surrounding ambient tempe-
rature. The APS13290 and APS13291 are permitted to operate
up to TJ = 175°C. As mentioned above, an operating device will
increase TJ according to equations 1, 2, and 3 below. This allows
an estimation of the maximum ambient operating temperature.
ΔT = PD × RθJA = [PD(VOUT) + PD(VCC)] × 228°C/W =
(15 mW + 78 mW) × 228°C/W =
93 mW × 228°C/W = 21.2°C
Finally, by inverting equation 3 with respect to voltage:
TA(est) = TJ(max) – ΔT = 175°C – 21.2°C = 153.8°C
In the above case, there is sufficient power dissipation capability
to operate up to TA(est). The example indicates that TA(max)
can be as high as 153.8°C without exceeding TJ(max). However,
the TA(max) rating of the devices is 125°C; the APS13290 and
APS13291 performance is not guaranteed above TA = 125°C.
PD = VIN
I
(1)
(2)
(3)
×
IN
ꢀ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀΔT = PD
R
θJA
×
TJ = TA + ΔT
12
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
Package LH, 3-Pin (SOT-23W)
+0.12
–0.08
2.98
3
D
1.49
4°±4°
A
+0.020
0.180
–0.053
D
0.96
D
+0.10
2.90
+0.19
–0.06
2.40
1.91
–0.20
0.70
0.25 MIN
1.00
2
1
0.55 REF
0.25 BSC
0.95
PCB Layout Reference View
Seating Plane
Gauge Plane
B
Branded Face
8X 10° REF
C
Standard Branding Reference View
1.00 ±0.13
+0.10
0.05
A25
–0.05
0.95 BSC
0.40 ±0.10
1
For Reference Only; not for tooling use (reference dwg. 802840)
Dimensions in millimeters
APS13290KLHA
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Active Area Depth, 0.28 mm REF
A
B
A27
Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
C
D
1
Branding scale and appearance at supplier discretion
Hall element, not to scale
APS13291KLHA
13
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
Package UA, 3-Pin SIP
For Reference Only – Not for Tooling Use
(Reference DWG-0000406, Rev. 1)
NOT TO SCALE
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
+0.08
–0.05
4.09
45°
B
C
E
2.04
1.52 ±0.05
10°
1.44
E
E
Mold Ejector
Pin Indent
+0.08
3.02
–0.05
45°
Branded
Face
D
Standard Branding Reference View
0.51 REF
0.79 REF
1.02
MAX
A26
A
1
1
2
3
APS13290KUAA
A28
14.99 ±0.25
+0.03
–0.06
0.41
1
APS13291KUAA
+0.05
–0.07
0.43
Dambar removal protrusion (6×)
Gate and tie bar burr area
A
B
C
D
Active Area Depth, 0.50 mm ±0.08
Branding scale and appearance at supplier discretion
Hall element, not to scale
E
1.27 NOM
14
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
APS13290 and
APS13291
Precision Hall-Effect Latches
for Consumer and Industrial Applications
Revision History
Number
Date
Description
–
1
March 6, 2018
Initial release
February 11, 2019
Minor editorial updates
Copyright ©2019, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.
For the latest version of this document, visit our website:
www.allegromicro.com
15
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
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