AS80M2184-08TT [ALSC]
Clock Generator;型号: | AS80M2184-08TT |
厂家: | ALLIANCE SEMICONDUCTOR CORPORATION |
描述: | Clock Generator |
文件: | 总5页 (文件大小:296K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
®
Product Proposal
AS80M2183/84
EMI Reduction IC
Alliance Semiconductor
FEATURES
•
2 spread % selections:
AS80M2183: - 1.25% or – 3.75%
•
•
•
FCC approved method of EMI attenuation
Provides up to 15 dB EMI reduction
AS80M2184: +/- 0.625% or +/- 1.875%
3.3V operating voltage
•
•
•
•
Generates a 1X low EMI spread spectrum
CMOS/TTL compatible inputs and outputs
Low power CMOS design
clock from the input frequency
•
•
•
•
Optimized for frequency range:
AS80M2183/84: 6 MHz to 70 MHz
Supports notebook VGA and other LCD timing
controller applications
Internal loop filter minimizes external
components and board space
•
•
Products are available for industrial
temperature range.
AS80M2183: Down Spread
AS80M2184: Center Spread
Available in 8 pin SOIC and TSSOP
Low inherent cycle-to-cycle jitter
PRODUCT DESCRIPTION
The AS80M2183/84 modulates the output of a
single PLL in order to “spread” the bandwidth of a
synthesized clock, thereby decreasing the peak
amplitudes of its harmonics. This results in
significantly lower system EMI compared to the
typical narrow band signal produced by oscillators
and most clock generators. Lowering EMI by
increasing a signal’s bandwidth is called “spread
spectrum clock generation”.
The AS80M2183/84 is a versatile spread spectrum
frequency modulator designed specifically for a
wide range of input clock frequencies from 6 to 70
MHz (see Table 1). The AS80M2183/84
can
generate an EMI reduced clock from an OSC or a
system generated clock.
The AS80M2183/84 reduces electromagnetic
interference (EMI) at the clock source, allowing a
system wide EMI reduction for all the down stream
The AS80M2183/84 uses the most efficient and
optimized modulation profile approved by the FCC
and is implemented by using a proprietary all-
digital method.
clocks and data dependent signals.
The
AS80M2183/84 allows significant system cost
savings by reducing the number of circuit board
layers, ferrite beads, shielding, and other passive
components that are traditionally required to pass
EMI regulations.
APPLICATIONS
The AS80M2183/84 is targeted towards EMI
management for memory and LVDS interfaces in
mobile graphic chipsets and high-speed digital
applications such as PC peripheral devices,
consumer electronics, and embedded controller
systems.
Jul., 2003
Revision A
PulseCore – A Division of Alliance Semiconductor
3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054
Tel (408) 748-6988 • Fax (408) 748-0009
http://www.alsc.com
1 of 5
®
Product Proposal
AS80M2183/84
Alliance Semiconductor
Figure 1 – AS80M2183/84 Pin Diagrams
XIN
FS1
XOUT
GND
FS0
VDD
SS%
MODOUT
AS80M2183/84
Figure 2 – AS80M2183/84 Block Diagram
Jun., 2003
Revision A
PulseCore – A Division of Alliance Semiconductor
3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054
Tel (408) 748-6988 • Fax (408) 748-0009
http://www.alsc.com
2 of 5
®
Product Proposal
AS80M2183/84
Alliance Semiconductor
Table 1- Input Frequency and Modulation Rate
Part Number
FS1 (pin 8)
FS0 (pin 7)
Frequency Range
6 MHz to 13 MHz
12 MHz to 25 MHz
18 MHz to 35 MHz
40 MHz to 70 MHz
0
0
1
1
0
1
0
1
AS80M2183/84
Table 2 - Spread Deviation Selections
Part Number
SS% (pin 4)
Spread Deviation
0
1
0
1
- 1.25%
- 3.75%
AS80M2183
+/- 0.625%
+/- 1.875%
AS80M2184
PIN DESCRIPTION
PIN # Name
Type Description
1
2
3
4
XIN
I
I
Connect to externally generated clock signal.
Crystal Connection.
XOUT
GND
SS%
P
I
Ground.
Spread Range Select. Digital logic input used to select frequency deviation
(see Table 2). This pin has an internal pull-up resistor.
Spread Spectrum low EMI output
5
6
7
ModOut
VDD
FS0
O
P
I
Connect to +3.3V.
Frequency range select. Digital Logic input used to select frequency range
(see Table 1). This pin has an internal pull-up resistor.
Frequency range select. Digital Logic input used to select frequency range
(see Table 1). This pin has an internal pull-up resistor.
8
FS1
I
Jun., 2003
Revision A
PulseCore – A Division of Alliance Semiconductor
3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054
Tel (408) 748-6988 • Fax (408) 748-0009
http://www.alsc.com
3 of 5
®
Product Proposal
AS80M2183/84
Alliance Semiconductor
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Rating
Unit
VDD, VIN
TSTG
TA
Voltage on any pin with respect to GND
Storage Temperature
Operating Temperature
-0.5 to +7.0
-65 to +125
0 to +70
V
ºC
ºC
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Min
Typ
Max
Unit
VIL
VIH
Input Low Voltage
Input High Voltage
GND – 0.3
2.0
-
-
-
-
0.8
VDD+0.3
V
V
IIL
Input Low Current
-
-
-
-35
35
-
µA
IIH
Input High Current
µA
IXOL
XOUT Output Low Current
(@ 0.4V, VDD = 3.3V)
TBD
mA
IXOH
VOL
VOH
IDD
XOUT Output High Current
(@ 2.5V, VDD = 3.3V)
-
-
TBD
-
-
mA
V
Output Low Voltage
0.4
(VDD=3.3V, IOL = 20 mA)
Output High Voltage
2.5
-
-
-
-
V
(VDD=3.3V, IOH = 20 mA)
Static Supply Current
Standby Mode
0.6
12
mA
mA
ICC
Dynamic Supply Current
Normal Mode (3.3V and 10 pF loading)
Operating Voltage
8.46
17.78
VDD
tON
2.7
-
3.3
3.7
-
V
Power Up Time
0.18
mS
(First locked clock cycle after power up)
Clock Output Impedance
ZOUT
-
50
-
Ω
AC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Min
Typ
-
Max
Unit
fIN
Input Frequency
6
70
MHz
MHz
ns
fOUT
Output Frequency
6
0.7
70
1.1
-
tLH
Output Rise Time
0.9
Note 1
tHL
(measured at 0.8V to 2.0V)
Output Fall Time
0.6
0.8
1.0
ns
Note 1
tJC
(measured at 2.0V to 0.8V)
Jitter (cycle to cycle)
-
45
-
50
200
ps
%
tD
Output Duty Cycle
55
Note1: tLH and tHL are measured into a capacitive load of 15pF
Jun., 2003
Revision A
PulseCore – A Division of Alliance Semiconductor
3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054
Tel (408) 748-6988 • Fax (408) 748-0009
http://www.alsc.com
4 of 5
®
Product Proposal
AS80M2183/84
Alliance Semiconductor
Figure 3 - Mechanical Package Outline (8 Pin SOIC)
INCHES
MILLIMETERS
NOR MAX MIN NOR MAX
SYMBOL MIN
0.057 0.064 0.071 1.45 1.63 1.80
0.004 0.007 0.010 0.10 0.18 0.25
0.053 0.061 0.069 1.35 1.55 1.75
0.012 0.016 0.020 0.31 0.41 0.51
0.004 0.006 0.001 0.10 0.15 0.25
0.186 0.194 0.202 4.72 4.92 5.12
0.148 0.156 0.164 3.75 3.95 4.15
A
A1
A2
B
C
D
E
0.050 BSC
1.27 BSC
e
0.224 0.236 0.248 5.70 6.00 6.30
0.012 0.020 0.028 0.30 0.50 0.70
H
L
0°
5°
8°
0°
5°
8°
a
Note: Controlling dimensions are millimeters.
SOIC - 0.074 grams unit weight
Figure 4 - Mechanical Package Outline (8 Pin TSSOP)
INCHES
MILLIMETERS
SYMBOL MIN
NOR MAX MIN NOR MAX
-
-
-
0.047
-
-
-
1.10
0.15
A
A1
A2
B
0.002
0.006 0.05
0.031 0.039 0.041 0.80 1.00 1.05
0.007
0.004
-
-
0.012 0.19
0.008 0.09
-
-
0.30
0.20
C
0.114 0.118 0.122 2.90 3.00 3.10
0.169 0.173 0.177 4.30 4.40 4.50
D
E
0.026 BSC
0.65 BSC
e
0.244 0.252 0.260 6.20 6.40 6.60
0.018 0.024 0.030 0.45 0.60 0.75
H
L
0°
-
8°
0°
-
8°
a
Note: Controlling dimensions are millimeters.
TSSOP - 0.034 grams unit weight
Jun., 2003
Revision A
PulseCore – A Division of Alliance Semiconductor
3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054
Tel (408) 748-6988 • Fax (408) 748-0009
http://www.alsc.com
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