I1819G-08TT [ALSC]
Low Power Mobile VGA EMI Reduction IC; 低功耗移动VGA EMI降低IC
| 型号： | I1819G-08TT |
| 厂家： | 
ALLIANCE SEMICONDUCTOR CORPORATION |
| 描述： | Low Power Mobile VGA EMI Reduction IC |
| 文件： | 总8页 (文件大小：61K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Production
March 2003
P1818/19/20/21/22
®
Low Power Mobile VGA EMI Reduction IC
Features
•
•
•
FCC approved method of EMI attenuation
•
Selectable spread options: Down Spread and Cen-
ter Spread
Low inherent cycle-to-cycle jitter
Eight spread % selections: +/-0.625% to –3.5%
3.3V operating voltage
CMOS/TTL compatible inputs and outputs
Low power CMOS design
Supports notebook VGA and other LCD timing
controller applications
Provides up to 15 dB EMI reduction
Generates a low EMI spread spectrum clock and a
non-spread reference clock of the input frequency
Optimized for frequency range from 10 MHz to 160
MHz
P1818: 10 to 20 MHz
P1819: 20 to 40 MHz
P1820: 40 to 80 MHz
•
•
•
•
•
•
•
P1821: 10 to 40 MHz
P1822: 80 to 160 MHz
Internal loop filter minimizes external components
and board space
•
•
Power down function for mobile application
Products are available for industrial temperature
range.
•
•
Available in 8-pin SOIC and TSSOP
Product Description
The P18xx is a versatile spread spectrum frequency
modulator designed specifically for a wide range of input
clock frequencies from 10 to 160 MHz (see Input Fre-
quency and Modulation Rate Selections). The P18xx
can generate an EMI reduced clock from crystal,
ceramic resonator, or system clock. The P18xx-A to
P18xx-H offer various combinations of spread options
and percentage deviations (see Spread Deviation Selec-
tions). These combinations include Down Spread,
Center Spread and percentage deviation range from
±0.625% to -3.50%.
The P18xx modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
thereby decreasing the peak amplitudes of its
harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal
produced by oscillators and most clock generators.
Lowering EMI by increasing a signal’s bandwidth is
called “spread spectrum clock generation”.
The P18xx uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all-digital method.
The P18xx reduces electromagnetic interference (EMI)
at the clock source, allowing a system wide EMI
reduction for all the down stream clocks and data
dependent signals. The P18xx allows significant system
cost savings by reducing the number of circuit board
layers, ferrite beads, shielding, and other passive
components that are traditionally required to pass EMI
regulations.
Applications
The P18xx is targeted toward EMI management for
memory and LVDS interfaces in mobile graphic
chipsets and high-speed digital applications such as
PC peripheral devices, consumer electronics, and
embedded controller systems.
Alliance Semiconductor
2575 Augustine Drive • Santa Clara, CA 95054 • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
P1818/19/20/21/22
®
Pin Diagrams
1
2
3
4
8
7
6
5
X IN
V S S
X O U T
V D D
F R S
1
8
7
6
5
X IN
X O U T
V D D
P D #
2
3
4
V S S
S R S
S R S
M o d O u t
P 1 8 1 8 A /B /C /D
P 1 8 1 9 A /B /C /D
P 1 8 2 0 A /B /C /D
R E F
M o d O u t
R E F
P 1 8 2 1 A /B /C /D
1
8
7
6
5
1
2
3
4
8
X IN
X O U T
V D D
P D #
X IN
M R S
2
3
4
7
6
5
V S S
D _ C
V S S
V D D
S S O N #
S R 0
S R S
P 1 8 1 8 E /F /G /H
P 1 8 1 9 E /F /G /H
P 1 8 2 0 E /F /G /H
M o d O u t
R E F
M o d O u t
P 1 8 2 2 A
Block Diagram
VDD
D_C PD# MRS FRS SRS
PLL
Modulation
XIN
Crystal
Oscillator
Frequency
Divider
Output
Divider
Phase
Detector
Loop
Filter
XOUT
VCO
Feedback
Divider
ModOUT
REF
P1818/19/20/21/22 Block Diagram
VSS
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Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
P1818/19/20/21/22
®
Input Frequency and Modulation Rate
Input
frequency range
Output
frequency range
Part number
Modulation rate
P1818
P1819
P1820
10 MHz to 20 MHz
20 MHz to 40 MHz
40 MHz to 80 MHz
10 MHz to 20 MHz
20 MHz to 40 MHz
80 MHz to 160 MHz
10 MHz to 20 MHz
20 MHz to 40 MHz
40 MHz to 80 MHz
10 MHz to 20 MHz
20 MHz to 40 MHz
80 MHz to 160 MHz
Input frequency / 256
Input frequency / 512
Input frequency / 2048
Input frequency / 256
Input frequency / 512
Input frequency / 3584
FRS=0
FRS=1
P1821
P1822
Spread Deviation Selections
1
SRS
SR0
D_C
Spread deviation
Part number
2
0
1
N/A
N/A
-2.50% (Down)
-3.50% (Down)
-1.25% (Down)
-1.75% (Down)
+/-1.25% (Center)
+/-1.75% (Center)
P1818 /19/20/21A
P1818/19/20/21B
P1818/19/20/21C
P1818/19/20/21D
P1818/19/20E
0
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1
0
1
0
N/A
+/-0.625% (Center)
+/-0.875% (Center)
-1.25% (Down)
1
N/A
0
1
+/-0.625% (Center)
-2.5% (Down)
P1818/19/20F
N/A
N/A
N/A
0
1
+/-1.25% (Center)
-1.75% (Down)
P1818/19/20G
0
1
+/-0.875% (Center)
-3.5% (Down)
2
0
P1818 /19/20H
1
+/-1.75% (Center)
-1.25% (Down)
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
N/A
-2.50% (Down)
P1822A
P1822B
-1.75% (Down)
-3.50% (Down)
N/A
+/-0.625% (Center)
+/-1.25% (Center)
+/-0.875% (Center)
+/-1.75% (Center)
1. A through H represents various combinations of spread deviations, options, and modulation rates.
2. Refer to Frequency vs. Deviation (P1818A and P1818H).
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Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
P1818/19/20/21/22
®
Frequency vs. Deviation (P1818A and P1818H)
Deviation in P1818A
Deviation in P1818H
Frequency
SRS = 1
SRS = 0
D_C = 1
D_C = 0
10 MHz
15 MHz
20 MHz
-4.4%
-1.8%
-0.8%
-3.3%
-1.26%
-0.6%
-4.4%
-1.8%
-0.8%
±2.2%
±0.9%
±0.4%
Pin Description
Pin
number
Name
Type
Description
1
2
3
XIN
VSS
SRS
I
P
I
Connect to externally generated clock signal or crystal.
Ground Connection. Connect to system ground.
Spread Range Select. Digital logic input used to select frequency devi-
ation (see Spread Deviation Selections). This pin has an internal pull-
up resistor.
1
D_C
I
Digital logic input used to select Down (LOW) or Center (HIGH) Spread
Options (see Spread Deviation Selections). This pin has an internal
pull-up resistor.
3
4
5
ModOut
O
Spread Spectrum clock output (see Input Frequency and Modulation
Rate Selections and Spread Deviation Selections).
REF
FRS
O
I
Non-modulated reference output clock of the input frequency.
1
Frequency Range Select. Digital logic input used to select input fre-
quency range (see Input Frequency and Modulation Rate Selections).
This pin has an internal pull-up resistor.
5/6
1
PD#
I
Power-Down control pin. Pull LOW to enable Power-Down mode. This
pin has an internal pull-up resistor.
6
7
8
VDD
P
I
Connect to +3.3V
XOUT
Connect to crystal. No connect if externally generated clock signal is
used.
1
MRS
I
Modulation Rate Select. Digital logic input used to select Modulation
Rate (see Spread Deviation Selections). This pin has an internal pull-
up resistor.
8
1. Please refer to Figure 1 for pin assignment.
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Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
P1818/19/20/21/22
®
Absolute Maximum Ratings
Symbol
Parameter
Rating
-0.5 to +7.0
-65 to +125
0 to +70
Unit
V
V
, V
Voltage on any pin with respect to GND
Storage temperature
DD
IN
T
º C
º C
STG
T
Operating temperature
A
DC Electrical Characteristics
3.3 V, 25° C
Symbol
Parameter
Min
GND – 0.3
2.00
Typ
–
Max
Unit
V
V
Input low voltage
Input high voltage
0.8
IL
IH
IL
V
–
V
+ 0.3
V
DD
I
Input low current (inputs D_C,
PD#, MRS, FRS, SRS)
-60.0
–
-20.00
µA
I
Input high current
–
–
–
1.00
µA
IH
I
XOUT output low current
2.00
12.00
mA
XOL
(@ 0.4 V, V = 3.3 V)
DD
I
XOUT output high current
–
–
–
–
–
–
12.00
0.4
mA
V
XOH
(@ 2.5 V, V = 3.3 V)
DD
V
Output low voltage
OL
(V =3.3 V, I = 20 mA)
DD
OL
V
Output high voltage
(V =3.3 V, I = 20 mA)
2.8
V
OH
DD
OH
I
I
Static supply current
Standby mode
–
4.5
–
–
mA
mA
DD
CC
Dynamic supply current
Normal mode (3.3 V and 25 pF
probe loading)
7.1
26.9
f
f
IN-min
IN-max
V
Operating voltage
–
–
3.3
–
–
V
DD
t
Power up time
(first locked clock cycle after
power up)
0.18
mS
ON
Z
Clock output impedance
–
50
–
Ω
OUT
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Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
P1818/19/20/21/22
®
AC Electrical Characteristics
3.3 V, 25° C
Symbol
Parameter
Input frequency
Min
10
10
–
Typ
–
Max
160
160
–
Unit
MHz
MHz
ns
f
IN
f
Output frequency
–
OUT
1
Output rise time
(measured at 0.8 V to 2.0 V)
0.66
t
LH
HL
1
Output fall time
(measured at 2.0 V to 0.8 V)
–
0.65
–
ns
t
t
Jitter (cycle to cycle) at 20 MHz
Output duty cycle
-200
45
–
200
55
ps
%
JC
t
50
D
1. tLH and tHL are measured into a capacitive load of 15 pF
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Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
P1818/19/20/21/22
®
Mechanical Package Outline (8-Pin SOIC)
Inches
Nor
Millimeters
Symbol
C
Min
Max
Min
Nor
Max
L
A
A1
A2
B
0.057 0.064 0.071 1.45
0.004 0.007 0.010 0.10
0.053 0.061 0.069 1.35
0.012 0.016 0.020 0.31
1.63
0.18
1.80
0.25
1.75
0.51
0.25
5.12
4.15
P18xxx
LOT NUMBER
E
H
1.55
YYWW
0.41
C
D
E
0.004 0.006 0.01
0.10
0.15
a
0.186 0.194 0.202 4.72
0.148 0.156 0.164 3.75
0.050 BSC
4.92
D
3.95
e
1.27 BSC
6.00
A
A2
A1
H
L
0.224 0.236 0.248 5.70
0.012 0.020 0.028 0.30
6.30
0.70
8°
0.50
B
e
a
0°
5°
8°
0°
5°
Note: Controlling dimensions are millimeters.
SOIC: 0.074 grams unit weight.
Mechanical Package Outline (8-Pin TSSOP)
Inches
Millimeters
Nor
Symbol
C
Min
Nor
Max
Min
Max
A
A1
A2
B
–
–
–
0.047
–
–
–
1.10
0.15
1.05
0.30
0.20
3.10
4.50
L
0.002
0.006 0.05
H
E
0.031 0.039 0.041 0.80
1.00
–
0.007
0.004
–
–
0.012 0.19
0.008 0.09
C
D
E
–
a
0.114 0.118 0.122 2.90
0.169 0.173 0.177 4.30
0.026 BSC
3.00
4.40
0.65 BSC
6.40
0.60
–
D
e
A
A2
A1
H
L
0.244 0.252 0.260 6.20
0.018 0.024 0.030 0.45
6.60
0.75
8°
B
e
a
0°
–
8°
0°
Note: Controlling dimensions are millimeters.
TSSOP: 0.034 grams unit weight.
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Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
P1818/19/20/21/22
®
Ordering Information
X
18XX
X
-08
XX
1
2
3
4
5
1. Flow prefix:
I = industrial temperature range (-40° C to 85° C)
P = commercial temperature range (0° C to 70° C)
2. Device number
3. Deviation (%) and spread option identifier
4. Device pin count
5. Package identifier:
ST = SOIC in tube
SR = SOIC in tape and reel
TT = TSSOP in tube
TR = TSSOP in tape and reel
Example:
Input
frequency
(MHz)
Frequency
deviation
(%)
Ordering
number
Package
type
Qty. /
reel
1
Marking
Temp
P1818A-08ST
P1818A-08SR
P1818A
P1818A
10 – 20
10 – 20
-2.5, -3.5
-2.5, -3.5
8 PIN SOIC, TUBE
0°C to 70°C
8 PIN SOIC, TAPE &
REEL
2,500 0°C to 70°C
P1818A-08TT
P1818A-08TR
P1818A
P1818A
10 – 20
10 – 20
-2.5, -3.5
-2.5, -3.5
8 PIN TSSOP, TUBE
0°C to 70°C
8 PIN TSSOP, TAPE &
REEL
2,500 0°C to 70°C
1. Products are available for industrial temperature range operation. Please contact factory for more information.
Licensed under U.S. patent numbers 5,488,627 and 5,631,920.
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product
names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility
for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this
data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to
be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any
responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including
liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale
(which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a
license under any patent rights, copyrights, mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical
components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting
systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.
March 2003
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Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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