P2042A [ALSC]
LCD Panel EMI Reduction IC; 液晶面板降低EMI IC型号: | P2042A |
厂家: | ALLIANCE SEMICONDUCTOR CORPORATION |
描述: | LCD Panel EMI Reduction IC |
文件: | 总8页 (文件大小:352K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
August 2005
rev 1.3
P2042A
LCD Panel EMI Reduction IC
Features
wide reduction of EMI of down stream clock and data
dependent signals. The P2042A allows significant system
cost savings by reducing the number of circuit board
FCC approved method of EMI attenuation.
Provides up to 15dB of EMI suppression.
Generates a low EMI spread spectrum clock of the
input frequency.
layers ferrite beads,
shielding and other passive
components that are traditionally required to pass EMI
regulations.
Input frequency range: 30MHz to 110MHz.
Optimized for 32.5MHz, 54MHz, 65MHz and
108MHz pixel clock frequencies.
The P2042A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
Internal loop filter minimizes external components
and board space.
Eight selectable high spread ranges up to ± 1.9%.
SSON# control pin for spread spectrum enable and
disable options.
Low cycle-to-cycle jitter.
3.3V ± 0.3V operating range.
Low power CMOS design.
Supports most mobile graphic accelerator and LCD
timing controller specifications.
The P2042A modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Available in 8-pin SOIC and TSSOP Packages.
Applications
Product Description
The P2042A is targeted towards digital flat panel
applications for notebook PCs, palm-size PCs, office
automation equipments and LCD monitors.
The P2042A is a versatile spread spectrum frequency
modulator designed specifically for digital flat panel
applications. The P2042A reduces electromagnetic
interference (EMI) at the clock source, allowing system
Block Diagram
VDD
SSON#
SR0 CP1 CP0
PLL
Modulation
CLKIN
Frequency
Divider
Output
Divider
Phase
Loop
Filter
VCO
Detector
Feedback
Divider
ModOUT
VSS
Alliance Semiconductor
2575 Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
August 2005
P2042A
rev 1.3
Pin Configuration
CLKIN
CP0
1
2
3
4
8
7
6
5
SR0
P2042A
ModOUT
SSON#
Pin Description
Pin
Pin#
Type
Description
Name
1
2
CLKIN
I
I
External reference frequency input. Connect to externally generated reference signal.
Digital logic input used to select charge pump current. This pin has an internal pull-up
CP0
resistor. Refer Modulation Selection Table.
Digital logic input used to select charge pump current. This pin has an internal pull-up
resistor. Refer Modulation Selection Table.
3
4
CP1
VSS
I
P
Ground to entire chip. Connect to system ground.
Digital logic input used to enable Spread Spectrum function (Active LOW). Spread
Spectrum function enabled when LOW, disabled when HIGH.
This pin has an internal pull-low resistor.
5
SSON#
I
6
7
8
ModOUT
SR0
O
I
Spread spectrum clock output.
Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.
Power supply for the entire chip
VDD
P
Modulation Selection
CP0 CP1 SR0
Spreading Range (±%)
Modulation Rate
(KHz)
32.5MHz
0.56
54MHz
65MHz
1.00
1.56
1.00
1.56
0.66
1.02
0.34
0.54
81MHz
108MHz
0.80
1.22
0.67
1.06
0.27
0.43
0.15
0.21
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1.05
1.68
1.05
1.68
0.81
1.29
0.45
0.71
0.98
1.48
0.92
1.48
0.40
0.74
0.05
0.36
1.94
1.36
1.92
1.24
1.91
0.91
1.47
(FIN /40) * 62.49
KHz
LCD Panel EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
August 2005
P2042A
rev 1.3
Spread Spectrum Selection
The Modulation Selection Table defines the possible spread spectrum options. The optimal setting should minimize system
EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center
frequency. (Note: The center frequency is the frequency of the external reference input on CLKIN, pin1).
For example, P2042A is designed for high-resolution, flat panel applications and is able to support an XGA (1024 x 768) flat
panel operating at 65MHz (FIN) clock speed. A spreading selection of CP0=0, CP1=1 and SR0=0 provides a percentage
deviation of ±1.00% from FIN. This results in the frequency on ModOUT being swept from 65.65 to 64.35MHz at a modulation
rate of 101.54KHz. Refer Modulation Selection Table. The example in the following illustration is a common EMI reduction
method for a notebook LCD panel and has already been implemented by most of the leading OEM and mobile graphic
accelerator manufacturers.
Application Schematic for Mobile LCD Graphics Controllers
Modulated 65MHz signal with
±1.00% deviation and
65MHz from graphics accelerator
modulation rate of 101.54KHz.
1
2
3
4
8
VDD
CLKIN
This signal is connected back to
the spread spectrum input pin
(SSIN) of the graphics
accelerator.
SR0
7
6
CP0
CP1
VSS
+3.3V
0.1µF
ModOUT
SSON#
5
Digital control for the SS enable
or disable
P2042A
LCD Panel EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
August 2005
P2042A
rev 1.3
Absolute Maximum Ratings
Symbol
Parameter
Voltage on any pin with respect to Ground
Rating
-0.5 to +7.0
-65 to +125
-40 to +85
260
Unit
V
°C
°C
°C
°C
VDD, VIN
TSTG
TA
Storage temperature
Operating temperature
Ts
TJ
Max. Soldering Temperature (10 sec)
Junction Temperature
150
Static Discharge Voltage
TDV
2
KV
(As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
DC Electrical Characteristics
Symbol
VIL
Parameter
Min
VSS - 0.3
2.0
Typ
-
-
Max
0.8
VDD + 0.3
Unit
V
V
Input low voltage
Input high voltage
Input low current
VIH
IIL
-
-
-35
µA
(pull-up resistor on inputs CP0, CP1 and SR0)
IIH
VOL
VOH
IDD
ICC
VDD
tON
Input high current (pull-down resistor on input SSON#)
-
-
-
-
-
35
0.4
-
µA
V
V
mA
mA
V
mS
Ω
Output low voltage (VDD = 3.3 V, IOL = 20 mA)
Output high voltage (VDD = 3.3 V, IOL = 20 mA)
Static supply current standby mode
Dynamic supply current (3.3V and 10pF loading)
Operating voltage
2.5
-
9
3.0
-
-
0.6
16
3.3
0.18
50
-
22
3.6
-
Power-up time (first locked cycle after power up)
Clock output impedance
ZOUT
-
AC Electrical Characteristics
Symbol
Parameter
Min
30
30
0.7
0.6
-
Typ
Max
110
110
1.1
Unit
MHz
MHz
nS
fIN
Input frequency
65
65
0.9
0.8
-
fOUT
tLH*
tHL*
tJC
Output frequency
Output rise time (measured at 0.8V to 2.0V)
Output fall time (measured at 2.0V to 0.8V)
Jitter (cycle to cycle)
1.0
nS
360
55
pS
tD
Output duty cycle
45
50
%
*tLH and tHL are measured into a capacitive load of 15pF
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Notice: The information in this document is subject to change without notice.
August 2005
P2042A
rev 1.3
Package Information
8-lead SOIC Package
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Symbol
Inches
Millimeters
Min
Max
0.010
0.069
0.059
0.020
0.010
Min
0.10
1.35
1.25
0.31
0.18
Max
0.25
1.75
1.50
0.51
0.25
A1
A
0.004
0.053
0.049
0.012
0.007
A2
B
C
D
E
0.193 BSC
0.154 BSC
0.050 BSC
0.236 BSC
4.90 BSC
3.91 BSC
1.27 BSC
6.00 BSC
e
H
L
0.016
0°
0.050
8°
0.41
0°
1.27
8°
θ
LCD Panel EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
August 2005
rev 1.3
P2042A
8-lead TSSOP Package
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Inches
Symbol
Millimeters
Min
Max
Min
Max
A
A1
A2
B
0.043
1.10
0.002
0.033
0.008
0.004
0.114
0.169
0.006
0.037
0.012
0.008
0.122
0.177
0.05
0.85
0.19
0.09
2.90
4.30
0.15
0.95
0.30
0.20
3.10
4.50
c
D
E
e
0.026 BSC
0.252 BSC
0.65 BSC
6.40 BSC
H
L
0.020
0°
0.028
8°
0.50
0°
0.70
8°
θ
LCD Panel EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
August 2005
P2042A
rev 1.3
Ordering Information
Part Number
P2042A-08ST
P2042A-08SR
P2042A-08TT
P2042A-08TR
P2042AF-08ST
P2042AF-08SR
P2042AF-08TT
P2042AF-08TR
P2042AG-08ST
P2042AG-08SR
P2042AG-08TT
P2042AG-08TR
Marking
P2042A
P2042A
P2042A
Package Type
8-Pin SOIC, TUBE
8-Pin SOIC, TAPE & REEL
8-Pin TSSOP, TUBE
8-Pin TSSOP, TAPE & REEL
8-Pin SOIC, TUBE, Pb Free
8-Pin SOIC, TAPE & REEL, Pb Free
8-Pin TSSOP, TUBE, Pb Free
8-Pin TSSOP, TAPE & REEL, Pb Free
8-Pin SOIC, TUBE, Green
8-Pin SOIC, TAPE & REEL, Green
8-Pin TSSOP, TUBE, Green
8-Pin TSSOP, TAPE & REEL, Green
Qty/reel
2500
Temperature
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
P2042A
2500
P2042AF
P2042AF
P2042AF
P2042AF
P2042AG
P2042AG
P2042AG
P2042AG
2500
2500
2500
2500
Device Ordering Information
P 2 0 4 2 A F - 0 8
X X
SR - SOIC, T/R
TT – TSSOP, TUBE
TR - TSSOP, T/R
ST – SOIC, TUBE
Pin Count
F =Lead Free and and RoHS compliant part
G = Green
Deviation (%) and Spread option Identifier
DEVICE NUMBER
Flow:
P = Commercial Temperature Range (0°C to 70°C)
I = Industrial Temperature Range (-40°C to 85°C)
Licensed under U.S Patent Nos 5,488,627 and 5,631,921
LCD Panel EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
August 2005
rev 1.3
P2042A
Alliance Semiconductor Corporation
2575 Augustine Drive,
Santa Clara, CA 95054
Tel# 408-855-4900
Copyright © Alliance Semiconductor
All Rights Reserved
Preliminary Information
Part Number: P2042A
Document Version: v1.3
Fax: 408-855-4999
www.alsc.com
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are
trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective
companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance
assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's
best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time,
without notice. If the product described herein is under development, significant changes to these specifications are possible.
The information in this product data sheet is intended to be general descriptive information for potential customers and users,
and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume
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LCD Panel EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
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