EY1602SI-ADJ [ALTERA]
40V, Low Quiescent Current, 150mA Linear Regulator;
| 型号： | EY1602SI-ADJ |
| 厂家： | 
ALTERA CORPORATION |
| 描述： | 40V, Low Quiescent Current, 150mA Linear Regulator |
| 文件： | 总10页 (文件大小：824K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Enpirion Power Datasheet
EY1603 40V, Low Quiescent Current,
150mA Linear Regulator
Datasheet
DS-1047
The Altera® Enpirion® EY1603 is a wide input voltage
range, low quiescent current linear regulator ideally
suited for “always-on” and “keep alive” applications.
The EY1603 operates from an input voltage of +6V to
+40V under normal operating conditions and consumes
only 18µA of quiescent current at no load.
Features
• Wide VIN Range of 6V to 40V
• Adjustable Output Voltage from 2.5V to 12V
• Guaranteed 150mA Output Current
• Ultra Low 18µA Typical Quiescent Current
• Low 2µA of Typical Shutdown Current
The EY1603 has an adjustable output voltage range from
2.5 to 12 V. The EY1603 features an EN pin that can be
used to put the device into a low-quiescent current
shutdown mode where it draws only 2µA of supply
current. The device features automatic thermal
shutdown and current limit protection.
•
1% Accurate Voltage Reference
• Low Dropout Voltage of 295mV at 150mA
• 40V Tolerant Logic Level (TTL/CMOS) Enable Input
• Stable Operation with 10µF Output Capacitor
• 5kV ESD HBM Rated
The EY1603 is rated over the -40°C to +125°C
temperature range and is available in a 14 lead HTSSOP
with an exposed pad package.
• Thermal Shutdown and Current Limit Protection
TABLE 1. KEY DIFFERENCES IN FAMILY OF 40V LDO PARTS
• Thermally Enhanced 14 Ld Exposed Pad HTSSOP
Package
PART NUMBER
EY1602SI-ADJ
EY1603TI-ADJ
MINIMUM IOUT
50mA
ADJ OR FIXED VOUT
ADJ
ADJ
Applications
• Industrial
150mA
• Telecommunications
25
20
15
10
5
VIN = 14V
CIN
VOUT = 12V
VOUT
R1
VIN
EN
COUT
10µF
EPAD
0.1µF
(GND) VFB
R2
GND
0
-50
0
50
100
150
TEMPERATURE (°C)
FIGURE 1. TYPICAL APPLICATION
FIGURE 2. QUIESCENT CURRENT vs TEMPERATURE (AT UNITY
GAIN). VIN = 14V
© 2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, HARDCOPY, MAX, MEGACORE,
NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and
Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of
their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor
products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use
of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are
advised to obtain the latest version of device specifications before relying on any published information and before placing orders
for products or services.
ISO
9001:2008
Registered
101 Innovation Drive
San Jose, CA 95134
www.altera.com
February 2014 Altera Corporation
Subscribe
09619
March 14, 2014
Rev A
Page 2
•
Ordering Information
PART NUMBER
(Notes 1, 2)
PART
TEMP. RANGE
(°C)
ENABLE
PIN
OUTPUT
VOLTAGE (V)
PACKAGE
(Pb-Free)
PKG.
DWG. #
MARKING
EY1603TI-ADJ
1603AT
-40 to +125
Yes
Adjustable
14 Ld HTSSOP
M14.173B
EVB-EY1603TI-ADJ Evaluation Platform
NOTES:
1. Add “-T*” suffix for tape and reel.
2. These Altera Enpirion Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb
and Pb-free soldering operations). Altera Enpirion Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pin Configuration
EY1603TI-ADJ (14 LD HTSSOP)
TOP VIEW
NC
VIN
NC
NC
NC
NC
EN
1
2
3
4
5
6
7
14 VOUT
13 NC
12 VFB
11 NC
THERMAL
PAD
(GND)
10 NC
9
8
NC
GND
Pin Descriptions
PIN NUMBER
PIN NAME
DESCRIPTION
1, 3, 4, 5, 6, 9,
10, 11, 13
NC
Pins have internal termination and can be left unconnected. Connection to ground is optional.
2
7
VIN
EN
Input voltage pin. A minimum 0.1µF ceramic capacitor is required for proper operation. Range 6V to 40V.
Enable pin. High on this pin enables the device. Range 0V to VIN.
Ground pin.
8
GND
VFB
12
This pin is connected to the external feedback resistor divider which sets the LDO output voltage. Range 0V to
3V.
14
-
VOUT
EPAD
Regulated output voltage. A 10µF ceramic capacitor is required for stability. Range 0V to 12V.
It is recommended to solder the EPAD to the ground plane.
EY1603 40V, Low Quiescent Current, 150mA Linear Regulator
February 2014 Altera Corporation
09619
March 14, 2014
Rev A
Page 3
Absolute Maximum Ratings
Thermal Information
VIN Pin to GND Voltage. . . . . . . . . . . . . . . GND - 0.3V to +45V
VOUT Pin to GND Voltage. . . . . . . . . . . .. . .GND - 0.3V to 16V
VFB Pin to GND Voltage. . . . . . . . . . . . . . .. . .GND - 0.3V to 3V
EN Pin to GND Voltage. . . . . . . . . . . . . . . . . GND - 0.3V to VIN
Output Short-circuit Duration . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating
Thermal Resistance (Typical)
14 Ld HTSSOP Package (Notes 3, 4)
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . .-65°C to +175°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .—
JA (°C/W)
JC (°C/W)
37
5
Human Body Model (Tested per JESD22-A114E) . . . . . . 5kV
Machine Model (Tested per JESD-A115-A) . . . . . . . . . . 200V
Charge Device Model (Tested per JESD22-C101C) . . . 2.2kV
Latch Up (Tested per JESD78B; Class II, Level A). . . . . 100mA
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . -40°C to +125°C
VIN pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . .+6V to +40V
VOUT pin to GND Voltage . . . . . . . . . . . . . . . . . . +2.5V to +12V
EN pin to GND Voltage. . . . . . . . . . . . . . . . . . . . . . . .0V to +40V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air.
4. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, unless otherwise noted. VIN = 14V, IOUT = 1mA, CIN = 0.1µF, COUT = 10µF,
TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C. Boldface limits apply over the operating temperature
range, -40°C to +125°C.
MIN
MAX
PARAMETER
SYMBOL
VIN
TEST CONDITIONS
(Note 7) TYP (Note 7) UNIT
Input Voltage Range
6
40
V
Guaranteed Output
Current
IOUT
VIN = VOUT + VDO
150
mA
VFB Reference Voltage
Line Regulation
VOUT
EN = High, VIN = 14V, IOUT = 0.1mA to 150mA
1.211
1.223
0.04
0.3
7
1.235
0.15
0.6
33
V
VOUT/VIN 3V VIN 40V, IOUT = 1mA
%
Load Regulation
VOUT/IOUT VIN = VOUT +VDO, IOUT = 100µA to 150mA
%
Dropout Voltage
(Note 5)
VDO
IOUT = 1mA, VOUT = 3.3V
IOUT = 150mA, VOUT = 3.3V
IOUT = 1mA, VOUT = 5V
mV
mV
mV
mV
µA
µA
µA
µA
µA
dB
380
7
525
33
IOUT = 150mA, VOUT = 5V
EN = LOW
295
2
460
3.64
24
Shutdown Current
Quiescent Current
ISHDN
IQ
EN = HIGH, IOUT = 0mA
EN = HIGH, IOUT = 1mA
EN = HIGH, IOUT = 10mA
EN = HIGH, IOUT = 150mA
f = 100Hz; VIN_RIPPLE = 500mVP-P; Load = 150mA
18
22
42
34
60
90
125
Power Supply Rejection
Ratio
PSRR
66
EN FUNCTION
EN Threshold Voltage
VEN_H
VEN_L
IEN
VOUT = Off to On
VOUT = On to Off
VOUT = 0V
1.485
1.93
V
V
0.975
EN Pin Current
0.026
1.65
µA
ms
EN to Regulation Time
(Note 6)
tEN
February 2014 Altera Corporation
EY1603 40V, Low Quiescent Current, 150mA Linear Regulator
09619
March 14, 2014
Rev A
Page 4
Electrical Specifications Recommended Operating Conditions, unless otherwise noted. VIN = 14V, IOUT = 1mA, CIN = 0.1µF, COUT = 10µF,
TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C. Boldface limits apply over the operating temperature
range, -40°C to +125°C. (Continued)
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(Note 7) TYP (Note 7) UNIT
PROTECTION FEATURES
Output Current Limit
Thermal Shutdown
ILIMIT
TSHDN
THYST
VOUT = 0V
Junction Temperature Rising
175
410
+165
+20
mA
°C
Thermal Shutdown
Hysteresis
°C
NOTES:
5. Dropout voltage is defined as (VIN - VOUT) when VOUT is 2% below the value of VOUT when VIN = VOUT + 3V.
6. Enable to Regulation is the time the output takes to reach 95% of its final value with VIN = 14V and EN is taken from VIL to VIH in
5ns. For the adjustable versions, the output voltage is set at 5V.
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
EY1603 40V, Low Quiescent Current, 150mA Linear Regulator
February 2014 Altera Corporation
09619
March 14, 2014
Rev A
Page 5
Typical Performance Curves VIN = 14V, IOUT = 1mA, VOUT = 5V, TJ = +25°C, unless otherwise specified.
120
100
80
60
40
20
0
30
25
20
15
10
5
+125°C
+125°C
-40°C
+25°C
-40°C
+25°C
0
0
10
20
INPUT VOLTAGE (V)
30
40
0
50
100
150
LOAD CURRENT (mA)
FIGURE 3. QUIESCENT CURRENT vs LOAD CURRENT
FIGURE 4. QUIESCENT CURRENT vs INPUT VOLTAGE (NO LOAD)
3.0
2.5
2.0
1.5
1.0
0.5
0
0.010
0.005
0
VIN = 40V
VOUT = 5V
V
IN = 14V
VOUT = 3.3V
-0.005
-0.010
-50
0
50
TEMPERATURE (°C)
100
150
-50
0
50
100
150
TEMPERATURE (°C)
FIGURE 5. SHUTDOWN CURRENT vs TEMPERATURE (EN = 0)
FIGURE 6. OUTPUT VOLTAGE vs TEMPERATURE (LOAD = 50mA)
February 2014 Altera Corporation
EY1603 40V, Low Quiescent Current, 150mA Linear Regulator
09619
March 14, 2014
Rev A
Page 6
Typical Performance Curves VIN = 14V, IOUT = 1mA, VOUT = 5V, TJ = +25°C, unless otherwise specified. (Continued)
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
500mV/DIV
1V/DIV
EN
+125°C
+25°C
VOUT
-40°C
TIME = 500µs/DIV
0
50
100
150
LOAD CURRENT (mA)
FIGURE 7. OUTPUT VOLTAGE vs LOAD CURRENT
FIGURE 8. START-UP WAVEFORM
70
60
50
40
30
20
10
0
TIME = 5ms/DIV
VOUT = 3.3V
VOUT
100mV/DIV
VOUT = 5V
IOUT 0mA
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 9. POWER SUPPLY REJECTION RATIO (LOAD = 150mA)
FIGURE 10. LOAD TRANSIENT RESPONSE
EY1603 40V, Low Quiescent Current, 150mA Linear Regulator
February 2014 Altera Corporation
09619
March 14, 2014
Rev A
Page 7
Block Diagram
VIN
EN
CONTROL
LOGIC
FET DRIVER
WITH CURRENT
LIMIT
+
-
EA
VOUT
VFB
REFERENCE
+
SOFT-START
THERMAL
SENSOR
GND
February 2014 Altera Corporation
EY1603 40V, Low Quiescent Current, 150mA Linear Regulator
09619
March 14, 2014
Rev A
Page 8
Functional Description
Functional Overview
The EY1603 is a high performance, high voltage, low-dropout regulator (LDO) with 150mA sourcing capability. The
part is rated to operate over the -40°C to +125°C temperature range. Featuring ultra-low quiescent current, it is an ideal
choice for “always-on” applications. It works well under a “load dump condition” where the input voltage could rise
up to 40V. This LDO device also features current limit and thermal shutdown protection.
Enable Control
The EY1603 has an enable pin, which turns the device on when pulled high. When EN is low, the IC goes into
shutdown mode and draws less than 2µA. In “always-on” applications, EN can be tied to IN.
Current Limit Protection
The EY1603 has internal current limiting functionality to protect the regulator during fault conditions. During current
limit, the output sources a fixed amount of current largely independent of the output voltage. If the short or overload
is removed from VOUT, the output returns to normal voltage regulation mode.
Thermal Fault Protection
In the event that the die temperature exceeds a typical value of +165°C, the output of the LDO will shut down until the
die temperature cools down to a typical +145°C. The level of power dissipated, combined with the ambient
temperature and the thermal impedance of the package, determines if the junction temperature exceeds the thermal
shutdown temperature. See the “Power Dissipation” section on page 8 for more details.
Application Information
Input and Output Capacitors
A minimum 0.1µF ceramic capacitor is recommended at the input for proper operation. For the output, a ceramic
capacitor with a capacitance of 10µF is recommended for the EY1603 to maintain stability. The ground connection of
the output capacitor should be routed directly to the GND pin of the device and also placed close to the IC.
Output Voltage Setting
The EY1603TI-ADJ output voltage is programmed using an external resistor divider as shown in Figure 11.
VOUT
VIN
EN
CIN
0.1µF
COUT
10µF
R1
R2
VFB
GND
FIGURE 11. OUTPUT VOLTAGE SETTING
The output voltage is calculated using Equation 1:
R
1
(EQ. 1)
------
V
= 1.223V
+ 1
OUT
R
2
Power Dissipation
The junction temperature must not exceed the range specified in “Recommended Operating Conditions” on page 3.
The power dissipation can be calculated using Equation 2:
The maximum allowable junction temperature, TJ(MAX) and the maximum expected ambient temperature, TA(MAX) will
determine the maximum allowable junction temperature rise (TJ), as shown in Equation 2:
(EQ. 2)
T = T
– T
AMAX
J
JMAX
EY1603 40V, Low Quiescent Current, 150mA Linear Regulator
February 2014 Altera Corporation
09619
March 14, 2014
Rev A
Page 9
To calculate the maximum ambient operating temperature, use the junction-to-ambient thermal resistance (JA) as
shown in Equation 3:
(EQ. 3)
T
= P
x + T
DMAX JA A
JMAX
Board Layout Recommendations
A good PCB layout is important to achieve expected performance. Consideration should be taken when placing the
components and routing the trace to minimize the ground impedance and keep the parasitic inductance low. The
input and output capacitors should have a good ground connection and be placed as close to the IC as possible. The
feedback trace in the adjustable version should be away from other noisy traces.
The 14 Ld HTSSOP package uses the copper area on the PCB as a heat-sink. The EPAD of this package must be
soldered to the copper plane (GND plane) for effective heat dissipation. Figure 12 shows a curve for JA of the package
for different copper area sizes.
38
36
34
32
30
28
26
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160
EPAD-MOUNT COPPER LAND AREA ON PCB, mm2
FIGURE 12. JA vs EPAD-MOUNT COPPER LAND AREA ON PCB
Document Revision History
The table lists the revision history for this document.
Date
Version
Changes
February 2014
1.0
Initial release.
February 2014 Altera Corporation
EY1603 40V, Low Quiescent Current, 150mA Linear Regulator
09619
March 14, 2014
Rev A
Page 10
Package Outline Drawing
M14.173B
14 LEAD HEAT-SINK THIN SHRINK SMALL OUTLINE PACKAGE (HTSSOP)
Rev 1, 1/10
A
1
3
3.10 ±0.10
5.00 ±0.10
8
14
SEE
DETAIL "X"
6.40
PIN #1
I.D. MARK
3.00 ±0.10
4.40 ±0.10
2
3
0.20 C B A
1
7
B
EXPOSED THERMAL PAD
BOTTOM VIEW
0.65
0.15 +0.05/-0.06
END VIEW
TOP VIEW
1.00 REF
H
0.05
C
0.90 +0.15/-0.10
1.20 MAX
5
SEATING
PLANE
GAUGE
PLANE
0.25
0.25 +0.05/-0.06
0.10 CBA
0.10 C
0°-8°
0.05 MIN
0.15 MAX
0.60 ±0.15
SIDE VIEW
(3.10)
DETAIL "X"
(1.45)
(3.00)
NOTES:
1. Dimension does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
(5.65)
3. Dimensions are measured at datum plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion.
Allowable protrusion shall be 0.80mm total in excess of dimension at
maximum material condition.
Minimum space between protrusion and adjacent lead is 0.07mm.
6. Dimension in ( ) are for reference only.
(0.65 TYP)
(0.35 TYP)
TYPICAL RECOMMENDED LAND PATTERN
7. Conforms to JEDEC MO-153, variation ABT-1.
EY1603 40V, Low Quiescent Current, 150mA Linear Regulator
February 2014 Altera Corporation
09619
March 14, 2014
Rev A
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