AM27X010-200PI [AMD]

1 Megabit (128 K x 8-Bit) CMOS ExpressROM Device; 1兆位（ 128千×8位）的CMOS ExpressROM设备


型号：	AM27X010-200PI
厂家：	AMD
描述：	1 Megabit (128 K x 8-Bit) CMOS ExpressROM Device 1兆位（ 128千×8位）的CMOS ExpressROM设备内存集成电路光电二极管 OTP只读存储器有原始数据的样本ROM
文件：	总10页 (文件大小：133K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FINAL

Am27X010

1 Megabit (128 K x 8-Bit) CMOS ExpressROM Device

DISTINCTIVE CHARACTERISTICS

■ As an OTP EPROM alternative:

— Factory optimized programming

— Fully tested and guaranteed

■ ±10% power supply tolerance

■ High noise immunity

■ Low power dissipation

— 100 µA maximum CMOS standby current

■ As a Mask ROM alternative:

— Shorter leadtime

■ Available in Plastic Dual-In-line Package (PDIP)

and Plastic Leaded Chip Carrier (PLCC)

— Lower volume per code

■ Latch-up protected to 100 mA from –1 V to

■ Fast access time

— 55 ns

V_CC+ 1 V

■ Versatile features for simple interfacing

— Both CMOS and TTL input/output compatibility

— Two line control functions

■ Single +5 V power supply

■ Compatible with JEDEC-approved EPROM

pinout

GENERAL DESCRIPTION

The Am27X010 is a factory programmed and tested

OTP EPROM. It is programmed after packaging prior to

final test. Every device is rigorously tested under AC

and DC operating conditions to your stable code. It is

organized as 128 Kwords by 8 bits per word and is

available in plastic dual in-line packages (PDIP), as

well as plastic leaded chip carrier (PLCC) packages.

ExpressROM devices provide a board-ready memory

solution for medium to high volume codes with short

leadtimes. This offers manufacturers a cost-effective

and flexible alternative to OTP EPROMs and mask pro-

grammed ROMs.

Data can be accessed as fast as 55 ns, allowing

high-performance microprocessors to operate with re-

duced WAIT states. The device offers separate Output

Enable (OE#) and Chip Enable (CE#) controls, thus

eliminating bus contention in a multiple bus micropro-

cessor system.

AMD’s CMOS process technology provides high

speed, low power, and high noise immunity. Typical

power consumption is only 100 mW in active mode,

and 100 µW in standby mode.

BLOCK DIAGRAM

Data Outputs DQ0–DQ7

Output Enable

Chip Enable

and

OE#

CE#

Output

Buffers

Prog Logic

Gating

Decoder

A0–A16

Address

Inputs

1,048,576

Bit Cell

Matrix

Decoder

12080F-1

Publication# 12080 Rev: F Amendment/0

Issue Date: May 1998

PRODUCT SELECTOR GUIDE

Family Part Number

Am27X010

= 5.0 V ± 5%

= 5.0 V ± 10%

-255

Speed Options

-55

-70

-90

-120

120

-150

150

-200

200

Max Access Time (ns)

CE# (E#) Access (ns)

OE# (G#) Access (ns)

250

100

CONNECTION DIAGRAMS

Top View

DIP

PLCC

V_CC

V_PP

A16

A15

A12

PGM# (P#)

A14

1 32 31 30

A13

A14

A13

A11

OE# (G#)

A10

A11

OE# (G#)

A10

CE# (E#)

DQ7

CE# (E#)

DQ7

DQ0

DQ6

16 17

19 20

DQ1

DQ2

V_SS

DQ5

DQ4

12080F-3

DQ3

12080F-2

Notes:.

1. JEDEC nomenclature is in parenthesis.

2. Don’t use (DU) for PLCC.

PIN DESIGNATIONS

LOGIC SYMBOL

A0–A16

= Address Inputs

CE# (E#)

= Chip Enable Input

DQ0–DQ7 = Data Input/Outputs

OE# (G#) = Output Enable Input

PGM# (P#) = Program Enable Input

A0–A16

DQ0–DQ7

CE# (E#)

OE# (G#)

V_CC

V_PP

V_SS

= V_CCSupply Voltage

= Program Voltage Input

= Ground

12080F-4

= No Internal Connection

Am27X010

ORDERING INFORMATION

Standard Products

AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed

by a combination of the following:

AM27X010

XXXXX

-55

CODE DESIGNATION

Assigned by AMD

TEMPERATURE RANGE

= Commercial (0°C to +70°C)

= Industrial (–40°C to +85°C)

PACKAGE TYPE

= 32-Pin Plastic Dual In-Line Package (PD 032)

= 32-Pin Plastic Leaded Chip Carrier (PL 032)

SPEED OPTION

See Product Selector Guide and Valid Combinations

DEVICE NUMBER/DESCRIPTION

Am27X010

1 Megabit (128 K x 8-Bit) CMOS ExpressROM Device

Valid Combinations

AM27X010-55

Valid Combinations list configurations planned to be sup-

ported in volume for this device. Consult the local AMD sales

office to confirm availability of specific valid combinations and

to check on newly released combinations.

AM27X010-70

AM27X010-90

AM27X010-120

AM27X010-150

AM27X010-200

AM27X010-255

PC, JC, PI, JI

= 5.0 V ± 5%

Am27X010

FUNCTIONAL DESCRIPTION

Read Mode

CE# should be decoded and used as the primary de-

vice-selecting function, while OE# be made a common

connection to all devices in the array and connected to

the READ line from the system control bus. This as-

sures that all deselected memory devices are in their

low-power standby mode and that the output pins are

only active when data is desired from a particular mem-

ory device.

To obtain data at the device outputs, Chip Enable (CE#)

and Output Enable (OE#) must be driven low. CE# con-

trols the power to the device and is typically used to se-

lect the device. OE# enables the device to output data,

independent of device selection. Addresses must be

stable for at least t_ACC–t_OE. Refer to the Switching

Waveforms section for the timing diagram.

System Applications

Standby Mode

During the switch between active and standby condi-

tions, transient current peaks are produced on the ris-

ing and falling edges of Chip Enable. The magnitude of

these transient current peaks is dependent on the out-

put capacitance loading of the device. At a minimum, a

0.1 µF ceramic capacitor (high frequency, low inherent

inductance) should be used on each device between

V_CCand V_SSto minimize transient effects. In addition,

to overcome the voltage drop caused by the inductive

effects of the printed circuit board traces on Express-

ROM device arrays, a 4.7 µF bulk electrolytic capacitor

should be used between V_CCand V_SSfor each eight

devices. The location of the capacitor should be close

to where the power supply is connected to the array.

The device enters the CMOS standby mode when CE#

is at V_CC± 0.3 V. Maximum V_CCcurrent is reduced to

100 µA. The device enters the TTL-standby mode

when CE# is at V_IH. Maximum V_CCcurrent is reduced

to 1.0 mA. When in either standby mode, the device

places its outputs in a high-impedance state, indepen-

dent of the OE# input.

Output OR-Tieing

To accommodate multiple memory connections, a

two-line control function provides:

■ Low memory power dissipation, and

■ Assurance that output bus contention will not occur.

MODE SELECT TABLE

Mode

CE#

OE#

PGM#

Outputs

Read

OUT

Output Disable

Standby (TTL)

Standby (CMOS)

High Z

± 0.3 V

Note:

X = Either V or V .

Am27X010

ABSOLUTE MAXIMUM RATINGS

OPERATING RANGES

Storage Temperature

Commercial (C) Devices

OTP Products. . . . . . . . . . . . . . . . . . –65°C to +125°C

Ambient Temperature

with Power Applied. . . . . . . . . . . . . . –55°C to +125°C

Ambient Temperature (T_A) . . . . . . . . . . .0°C to +70°C

Industrial (I) Devices

Ambient Temperature (T_A) . . . . . . . . .–40°C to +85°C

Supply Read Voltages

Voltage with Respect to V_SS

All pins except V_CC. . . . . . . . . –0.6 V to V_CC+ 0.6 V

V_CC(Note 1). . . . . . . . . . . . . . . . . . . . .–0.6 V to 7.0 V

Note:

V_CCfor ± 5% devices . . . . . . . . . . +4.75 V to +5.25 V

V_CCfor ± 10% devices . . . . . . . . . +4.50 V to +5.50 V

Operating ranges define those limits between which the func-

tionality of the device is guaranteed.

1. Minimum DC voltage on input or I/O pins –0.5 V. During

voltage transitions, the input may overshoot V to –2.0 V

for periods of up to 20 ns. Maximum DC voltage on input

and I/O pins is V + 5 V. During voltage transitions, input

and I/O pins may overshoot to V + 2.0 V for periods up

to 20 ns.

Stresses above those listed under “Absolute Maximum Rat-

ings” may cause permanent damage to the device. This is a

stress rating only; functional operation of the device at these

or any other conditions above those indicated in the opera-

tional sections of this specification is not implied. Exposure of

the device to absolute maximum ratings for extended periods

may affect device reliability.

Am27X010

DC CHARACTERISTICS over operating range (unless otherwise specified)

Parameter

Symbol

Parameter Description

Output HIGH Voltage

Output LOW Voltage

Input HIGH Voltage

Test Conditions

= –400 µA

Min

Max

Unit

2.4

= 2.1 mA

0.45

2.0

+ 0.5

Input LOW Voltage

–0.5

+0.8

1.0

Input Load Current

= 0 V to V

µA

Output Leakage Current

= 0 V to V

OUT CC

Active Current (Note 2)

CE# = V , f = 10 MHz,

CC1

= 0 mA

OUT

TTL Standby Current

CE# = V

1.0

µA

CC2

CC3

CMOS Standby Current

CE# = V ± 0.3 V

100

Caution: The device must not be removed from (or inserted into) a socket when V or V is applied.

Notes:

1. V must be applied simultaneously or before V , and removed simultaneously or after V ..

2. I

is tested with OE# = V to simulate open outputs.

CC1

3. Minimum DC Input Voltage is –0.5 V. During transitions, the inputs may overshoot to –2.0 V for periods less than 20 ns.

Maximum DC Voltage on output pins is V + 0.5 V, which may overshoot to V + 2.0 V for periods less than 20 ns.

–75 –50 –55

25 50 75 100 125 150

Temperature in °C

Frequency in MHz

12080F-5

12080F-6

Figure 1. Typical Supply Current vs. Frequency

Figure 2. Typical Supply Current vs. Temperature

V_CC= 5.5 V, f = 10 MHz

V_CC= 5.5 V, T = 25°C

Am27X010

TEST CONDITIONS

5.0 V

Table 1. Test Specifications

Test Condition All

Output Load 1 TTL gate

Unit

2.7 kΩ

Device

Under

Test

Output Load Capacitance, C

(including jig capacitance)

100

6.2 kΩ

Input Rise and Fall Times

Input Pulse Levels

≤ 20

0.45–2.4

Input timing measurement reference

levels

0.8, 2.0

Note:

Output timing measurement

reference levels

Diodes are IN3064 or equivalents.

12080F-7

Figure 3. Test Setup

SWITCHING TEST WAVEFORM

2.4 V

2.0 V

0.8 V

2.0 V

0.8 V

Test Points

0.45 V

Input

Output

Note: For C = 100 pF.

12080F-8

KEY TO SWITCHING WAVEFORMS

WAVEFORM

INPUTS

OUTPUTS

Steady

Changing from H to L

Changing from L to H

Don’t Care, Any Change Permitted

Does Not Apply

Changing, State Unknown

Center Line is High Impedance State (High Z)

KS000010-PAL

Am27X010

AC CHARACTERISTICS

Parameter Symbols

Am27X010

JEDEC Standard

Description

Address to Output Delay

Test Setup

-55

-70

-90 -120 -150 -200 -255 Unit

CE#,

OE# = V

Max 55

120 150 200 250

AVQV

ACC

Chip Enable to Output Delay OE# = V Max 55

ELQV

GLQV

Output Enable to Output Delay CE# = V Max 35

Chip Enable High or Output

Enable High to Output High Z,

Whichever Occurs First

EHQZ

GHQZ

Max 25

(Note 2)

Output Hold Time from

Addresses, CE# or OE#,

Whichever Occurs First

Min

AXQX

Caution: Do not remove the device from (or insert it into) a socket or board that has V or V applied.

Notes:

1. V must be applied simultaneously or before V , and removed simultaneously or after V .

2. This parameter is sampled and not 100% tested.

3. Switching characteristics are over operating range, unless otherwise specified.

4. See Figure 3 and Table 1 for test specifications.

SWITCHING WAVEFORMS

2.4

Addresses

0.45

2.0

0.8

2.0

0.8

Addresses Valid

CE#

OE#

(Note 2)

ACC

(Note 1)

High Z

Output

Valid Output

12080F-9

Notes:

1. OE# may be delayed up to t

– t after the falling edge of the addresses without impact on t .

ACC

2. t is specified from OE# or CE#, whichever occurs first.

PACKAGE CAPACITANCE

PD 032

PL 032

Parameter

Symbol

Parameter Description

Input Capacitance

Test Conditions

Typ

Max

Typ

Max

Unit

= 0

Output Capacitance

= 0

OUT

Notes:

1. This parameter is only sampled and not 100% tested.

2. T = +25°C, f = 1 MHz.

Am27X010

PHYSICAL DIMENSIONS

PD 032—32-Pin Plastic Dual In-Line Package (measured in inches)

1.640

1.670

.600

.625

.009

.015

.530

.580

Pin 1 I.D.

.630

.700

.045

.065

0°

10°

.005 MIN

.140

.225

16-038-S_AG

PD 032

EC75

SEATING PLANE

.090

.110

.015

.060

.016

.022

5-28-97 lv

.120

.160

PL 032—32-Pin Plastic Leaded Chip Carrier (measured in inches)

.485

.495

.447

.453

.009

.015

.042

.056

.125

.140

.585

.595

Pin 1 I.D.

.080

.095

.547

.553

SEATING

PLANE

.400

REF.

.490

.530

.013

.021

.050 REF.

16-038FPO-5

PL 032

DA79

.026

.032

TOP VIEW

SIDE VIEW

6-28-94 ae

Am27X010

REVISION SUMMARY FOR AM27X010

Revision F

Global

Changed formatting to match current data sheets.

Distinctive Characteristics

Fast access time: Changed 70 ns to 55 ns.

General Description

Changed “Data can be accessed as fast as 70 ns” to

“Data can be accessed as fast as 55 ns”.

Product Selector Guide

Added the -55 speed option.

Ordering Information

Package Type: Corrected “P = 28-Pin Plastic Dual In-Line

Package (PD 028)” to “P = 32-Pin Plastic Dual In-Line Pack-

age (PD 032)”.

Speed Option: Changed -70 to -55.

Valid Combinations: Added Am27X010-55.

AC Characterisitics

Added the -55 speed option.

Trademarks

AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc.

Flashrite is a trademark of Advanced Micro Devices, Inc.

Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.

Am27X010

AM27X010-200PI [AMD]

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