AM79M535-1JC [AMD]
Metering Subscriber Line Interface Circuit; 计量用户线接口电路
| 型号： | AM79M535-1JC |
| 厂家： | 
AMD |
| 描述： | Metering Subscriber Line Interface Circuit |
| 文件： | 总18页 (文件大小：252K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Am79M535
Metering Subscriber Line Interface Circuit
DISTINCTIVE CHARACTERISTICS
■ Programmable constant-current feed
■ Ground-key detect
■ Line-feed characteristics independent of
■ Two-wire impedance set by single external
battery variations
impedance
■ Programmable loop-detect threshold
■ Performs polarity reversal
■ On-chip switching regulator for low-power
■ Tip Open state for ground-start lines
■ Supports 2.2 Vrms metering (12 and 16 kHz)
■ On-hook transmission
dissipation
■ Pin for external ground-key noise filter
capacitor available
BLOCK DIAGRAM
Ring Relay Driver
RINGOUT
A(TIP)
C1
C2
Ground-Key
Detector
C3
HPA
HPB
Input Decoder
and Control
E1
E0
Two-Wire
Interface
DET
GKFIL
VTX
Signal Transmission
RSN
Off-Hook Detector
Ring-Trip Detector
RD
Power-Feed
Controller
B(RING)
RDC
DA
DB
VREG
L
Switching Regulator
VBAT
BGND
16856B-001
CHS QBAT CHCLK
VCC VEE AGND
Notes:
1. Am79M535—E0 and E1 inputs; ring relay driver sourced internally to BGND; ground-key filter pin.
2. Current gain (K1) = 1000.
Publication# 16856 Rev: E Amendment: /0
Issue Date: October 1999
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed
by a combination of the elements below.
Am79M535
J
C
TEMPERATURE RANGE
C = Commercial (0°C to 70°C)*
PACKAGE TYPE
J = 32-Pin Plastic Leaded Chip Carrier (PL 032)
PERFORMANCE GRADE
Blank = Standard Specification
–1 = Performance Grading
–2 = Performance Grading
DEVICE NAME/DESCRIPTION
Am79M535
Subscriber Line Interface Circuit
Valid Combinations
Valid Combinations
Valid Combinations list configurations planned to
be supported in volume for this device. Consult
the local AMD sales office to confirm availability
of specific valid combinations, to check on newly
released combinations, and to obtain additional
data on AMD’s standard military grade products.
–1
Am79M535
JC
–2
Note:
* Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C
is guaranteed by characterizations and periodic sampling of production units.
2
Am79M535 Data Sheet
CONNECTION DIAGRAM
Top View
4
3
2
1
32 31 30
TP
GKFIL
L
TP
DA
RD
5
6
29
28
7
27
26
VBAT
QBAT
8
HPB
HPA
9
25
24
10
CHS
VTX
CHCLK
RSVD
E1
11
12
VEE
23
22
21
RSN
13
AGND
14 15 16 17 18 19 20
Notes:
1. Pin 1 is marked for orientation.
2. TP is a thermal conduction pin tied to substrate (QBAT).
3. RSVD = Reserved. Do not connect to this pin.
SLIC Products
3
PIN DESCRIPTIONS
Pin Names
AGND
Type
Description
Gnd
Analog (quiet) ground
DGND
A(TIP)
BGND
B(RING)
C3–C1
CHCLK
CHS
Gnd
Digital ground
Output
Gnd
Output of A(TIP) power amplifier
Battery (power) ground
Output of B(RING) power amplifier
Output
Input
Input
Input
Input
Input
Output
Decoder. TTL compatible. C3 is MSB and C1 is LSB.
Chopper Clock. Input to switching regulator (TTL compatible). Freq = 256 kHz (Nominal).
Chopper stabilization. Connection for external stabilization components.
Ring-trip negative. Negative input to ring-trip comparator
DA
DB
Ring-trip positive. Positive input to ring-trip comparator
DET
Detector. When enabled, logic Low indicates that the selected detector is tripped. Logic
inputs C3–C1, E1, and E0 select the detector. Open-collector with a built-in 15 kΩ pull-
up resistor.
E0
E1
Input
Input
Read Enable. A logic Low disables DET. A logic High enables DET.
Ground-Key Enable. When E0 is High, E1 = High connects the ground-key detector to
DET, and E1 = Low connects the off-hook or ring-trip detector to DET.
GKFIL
Capacitor
Ground-Key Filter Capacitor Connection. An external capacitor for filtering out high-
frequency noise from the ground-key loop can be connected to this pin. An internal
36 kΩ –20%, +40% resistor is provided to form an RC filter with the external capacitor.
In versions which have a GKFIL pin, a 3.3 nF minimum capacitance must be
connected from the GKFIL pin to ground.
HPA
HPB
L
Capacitor
Capacitor
Output
High-Pass Filter Capacitor. A(TIP) side of high-pass filter capacitor.
High-Pass Filter Capacitor. B(RING) side of high-pass filter capacitor.
Switching Regulator Power Transistor. Connection point for filter inductor and anode of
catch diode. Has up to 60 V of pulse waveform on it and must be isolated from sensitive
circuits. Keep the diode connections short because of the high currents and high di/dt
QBAT
RD
Battery
Quiet Battery. Filtered battery supply for the signal processing circuits.
Resistor
Resistor
Detector resistor. Threshold modification and filter point for the off-hook detector.
RDC
DC feed resistor. Connection point for the DC feed current programming network. The
other end of the network connects to the Receiver Summing Node (RSN). VRDC is
negative for normal polarity and positive for reverse polarity.
RINGOUT
RSN
Output
Input
Ring Relay Driver. Sourcing from BGND with internal diode to QBAT.
The metallic current (AC and DC) between A(TIP) and B(RING) is equal to 1000 x the
current into this pin. The networks that program receive gain, two-wire impedance, and
feed current all connect to this node. This node is extremely sensitive. Route the 256 kHz
chopper clock and switch lines away from the RSN node.
TP
Thermal
Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT).
Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to
an area of copper on the board to enhance heat dissipation.
VBAT
VCC
Battery
Power
Power
Input
Connected to office battery supply through an external protection diode.
+5 V power supply
VEE
–5 V power supply
VREG
Regulated Voltage. Provides negative power supply for power amplifiers, connection
point for inductor, filter capacitor, and chopper stabilization.
VTX
Output
Transmit Audio. This output is 0.510 times the A(TIP) and B(RING) metallic voltage. VTX
also sources the two-wire input impedance programming network.
4
Am79M535 Data Sheet
ABSOLUTE MAXIMUM RATINGS
OPERATING RANGES
Storage temperature . . . . . . . . . . . . –55°C to +150°C
Commercial (C) Devices
V
CC with respect to AGND/DGND . . .–0.4 V to +7.0 V
Ambient temperature . . . . . . . . . . . . . . 0°C to +70°C*
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75 V to 5.25 V
VEE . . . . . . . . . . . . . . . . . . . . . . . . –4.75 V to –5.25 V
VEE with respect to AGND/DGND . . .+0.4 V to –7.0 V
VBAT with respect to AGND/DGND. . . +0.4 V to –70 V
Note: Rise time of V
(dv/dt) must be limited to 27 V/µs
V
BAT. . . . . . . . . . . . . . . . . . . . . . . . . . . –40 V to –58 V
BAT
or less when Q
bypass = 0.33 µF.
BAT
AGND/DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V
BGND with respect to
BGND with respect to
AGND/DGND . . . . . . . . . . . . . . . .+1.0 V to –3.0 V
AGND/DGND . . . . . . . . . . . –100 mV to +100 mV
A(TIP) or B(RING) to BGND:
Load resistance on VTX to ground . . . . . . . 10 kΩ min
Continuous. . . . . . . . . . . . . . . . . . –70 V to +1.0 V
10 ms (f = 0.1 Hz) . . . . . . . . . . . . –70 V to +5.0 V
1 µs (f = 0.1 Hz) . . . . . . . . . . . . . . .–90 V to +10 V
250 ns (f = 0.1 Hz) . . . . . . . . . . . .–120 V to +15 V
Operating Ranges define those limits between which the
functionality of the device is guaranteed.
* Functionality of the device from 0°C to +70°C is guaranteed
by production testing. Performance from –40°C to +85°C is
guaranteed by characterizations and periodic sampling of
production units.
Current from A(TIP) or B(RING). . . . . . . . . . . .±150 mA
Voltage on RINGOUT . . . .BGND to 70 V above QBAT
Current through relay driver . . . . . . . . . . . . . . . 60 mA
Voltage on ring-trip input
(DA and DB). . . . . . . . . . . . . . . . . . . . . VBAT to 0 V
Current into ring-trip inputs . . . . . . . . . . . . . . . . .±10 mA
Peak current into regulator
switch (L pin) . . . . . . . . . . . . . . . . . . . . . . 150 mA
Switcher transient peak off
voltage on L pin . . . . . . . . . . . . . . . . . . . . . +1.0 V
C3–C1, E0, E1, CHCLK to
AGND/DGND . . . . . . . . . . .–0.4 V to VCC + 0.4 V
Maximum power dissipation, (see note) . . .TA = 70°C
In 32-pin PLCC package . . . . . . . . . . . . . . 1.74 W
Note: Thermal limiting circuitry on chip will shut down the
circuit at a junction temperature of about 165°C. The de-
vice should never be exposed to this temperature. Opera-
tion above 145°C junction temperature may degrade
device reliability. See the SLIC Packaging Considerations
for more information.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to Absolute Maximum
Ratings for extended periods may affect device reliability.
SLIC Products
5
ELECTRICAL CHARACTERISTICS
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Analog (VTX) output impedance
Analog (VTX) output offset
3
Ω
4
0°C to 70°C
–35
–30
–40
–35
+35
+30
+40
+35
—
—
4
–1*
–1
mV
–40°C to +85°C
4
Analog (RSN) input impedance
Longitudinal impedance at A or B
Overload level
300 Hz to 3.4 kHz
1
20
35
Ω
4
4-wire
2-wire
–3.1
–6.0
+3.1
+6.0
Vpk
dB
Z2WIN = 600 to 900 Ω
2
Transmission Performance, 2-Wire Impedance
2-wire return loss
(See Test Circuit D)
300 Hz to 500 Hz
500 Hz to 2500 Hz
2500 Hz to 3400 Hz
26
26
20
4, 13
Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C)
RL = 600 Ω, Longitudinal to metallic 300 Hz to 3400 Hz
L-T, L-4 (normalized to unity gain)
48
52
–1*
Longitudinal to metallic L-T, L-4
200 Hz to 1 kHz
—
—
4
normal polarity 0°C to +70°C
normal polarity –40°C to +85°C
reverse polarity
–2*
–2
–2
63
58
54
—
dB
1 kHz to 3.4 kHz
—
—
4
normal polarity 0°C to +70°C
normal polarity –40°C to +85°C
reverse polarity
–2*
–2
–2
58
54
54
—
Longitudinal signal generation 4-L
300 Hz to 800 Hz
300 Hz to 800 Hz
40
42
–1*
Longitudinal current capability per wire Active state
OHT state
25
18
mArms
4
4
Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B)
Gain accuracy 2- to 4-wire
2- to 4-wire
0 dBm, 1 kHz,
0 dBm, 1 kHz, –40°C to +85°C
0 dBm, 1 kHz, 0°C to +70°C
0 dBm, 1 kHz, –40°C to +85°C
0°C to +70°C
5.75
5.65
5.75
5.70
5.85
5.85
5.85
5.85
6.00
6.05
5.95
6.00
—
4
—
4
2- to 4-wire
2- to 4-wire
–1*
–1
Gain accuracy 4- to 2-wire
4- to 2-wire
0 dBm, 1 kHz, 0°C to +70°C
0 dBm, 1 kHz, –40°C to +85°C
0 dBm, 1 kHz, 0°C to +70°C
–0.15
–0.20
–0.1
+0.15
+0.20
+0.1
—
4
—
4
4- to 2-wire
4- to 2-wire
–1*
–1
0 dBm, 1 kHz, –40°C to +85°C
–0.15
+0.15
dB
Variation with frequency
300 Hz to 3400 Hz
Relative to 1 kHz
0°C to +70°C
—
—
—
4
–0.1
–0.15
+0.1
+0.15
–40°C to +85°C
Gain tracking
+7 dBm to –55 dBm, ref 0 dBm
0°C to +70°C
–40°C to +85°C
—
—
4
–0.1
–0.15
+0.1
+0.15
Notes:
* P.G. = Performance Grade
–2 grade performance parameters are equivalent to –1 performance parameters except where indicated.
6
Am79M535 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Balance Return Signal (4- to 4-Wire; See Test Circuit B)
Gain accuracy
0 dBm, 1 kHz,
0 dBm, 1 kHz, –40°C to +85°C
0 dBm, 1 kHz, 0°C to +70°C
0°C to +70°C
–6.00
–6.05
–5.95
–6.00
–5.85
–5.85
–5.85
–5.85
–5.75
–5.65
–5.75
–5.70
3
3, 4
3
–1*
–1
0 dBm, 1 kHz, –40°C to +85°C
3, 4
Variation with frequency
300 Hz to 3400 Hz
Relative to 1 kHz
0°C to +70°C
—
—
3, 4
3, 4
dB
–0.10
–0.15
+0.10
+0.15
–40°C to +85°C
Gain tracking
Group delay
+7 dBm to –55 dBm, ref 0 dBm
0°C to +70°C
–40°C to +85°C
—
—
4
–0.10
–0.15
+0.10
+0.15
f = 1 kHz
5.3
4, 15
µs
Total Harmonic Distortion (2- to 4-Wire or 4- to 2-Wire, See Test Circuits A and B)
Total harmonic distortion
0 dBm, 300 Hz to 3.4 kHz
+9 dBm, 300 Hz to 3.4 kHz
–64
–55
–50
–40
dB
Total harmonic distortion with
metering
–35
4, 10
Idle Channel Noise
C-message weighted noise
2-wire,
2-wire,
2-wire,
0°C to +70°C
0°C to +70°C
–40°C to +85°C
+7
+7
+7
+15
+12
+15
—
—
4
–1*
–1*
–1*
–1*
dBrnC
dBmp
4-wire,
4-wire,
4-wire,
0°C to +70°C
0°C to +70°C
–40°C to +85°C
+7
+7
+7
+15
+12
+15
—
—
4
Psophometric weighted noise
2-wire,
2-wire,
2-wire,
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–83
–83
–83
–75
–78
–75
7
—
4, 7
4-wire,
4-wire,
4-wire,
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–83
–83
–83
–75
–78
–75
7
—
4, 7
Psophometric idle channel noise
with metering
2-wire
4-wire
–46
–52
4, 11
Signal Frequency Out-of-Band Noise (See Test Circuit E)
Metallic
4 kHz to 9 kHz
9 kHz to 1 MHz
256 kHz and harmonics
–76
–76
–57
4, 5, 9
4, 5, 9
4, 5
dBm
Longitudinal
1 kHz to 15 kHz
Above 15 kHz
256 kHz and harmonics
–70
–85
–57
4, 5, 9
4, 5, 9
4, 5
DC Feed Currents (See Figure 1a, 1b, 1c) Battery = –48 V
Active state loop-current accuracy
OHT state
ILOOP (nominal) = 40 mA
RL = 600 Ω
–7.5
+7.5
22
%
18
20
Tip Open state
RL = 600 Ω
1.0
1.0
130
mA
mA
Open Circuit state
RL = 0 Ω
Fault current limit, ILLIM (IAX + IBX
)
A and B shorted to GND
SLIC Products
7
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Power Dissipation Battery = –48 V, Normal Polarity
On-hook Open Circuit state
35
35
120
80
–1*
–1*
–1*
On-hook OHT state
On-hook Active state
135
135
250
200
mW
200
200
400
300
Off-hook OHT state
Off-hook Active state
RL = 600 Ω
RL = 600 Ω
500
650
750
1000
Supply Currents
VCC on-hook supply current
Open Circuit state
OHT state
Active state
3.0
6.0
7.5
4.5
10.0
12.0
VEE on-hook supply current
VBAT on-hook supply current
Open Circuit state
OHT state
Active state
1.0
2.2
2.7
2.3
3.5
6.0
mA
Open Circuit state
OHT state
Active state
0.4
3.0
4.0
1.0
5.0
6.0
Power Supply Rejection Ratio (VRIPPLE = 50 mVrms)
VCC
50 Hz to 3400 Hz
3.4 kHz to 50 kHz
50 Hz to 3400 Hz
3.4 kHz to 50 kHz
25
30
45
45
–1*
–1*
–1*
–1*
22
25
35
35
VEE
20
25
40
40
dB
6, 7
10
10
25
25
VBAT
50 Hz to 3400 Hz
–1
27
30
45
45
3.4 kHz to 50 kHz
20
25
40
40
–1*
Off-Hook Detector
Current threshold accuracy
IDET = 365/RD Nominal
–20
+20
%
Ground-Key Detector Thresholds, Active state, Battery = –48 V (See Test Circuit F)
Ground-key resistance threshold
Ground-key current threshold
B(RING) to GND
B(RING) to GND
Midpoint to GND
2.0
5.0
9
10.0
kΩ
mA
8
9
Ring-Trip Detector Input
Bias current
–5
–0.05
µA
Offset voltage
Source resistance 0 to 2 MΩ
–50
0
+50
mV
12
Logic Inputs (C4–C1, E0, E1, and CHCLK)
Input High voltage
2.0
V
Input Low voltage
0.80
40
Input High current
Input High current
Input Low current
All inputs except E1
Input E1
–75
–75
µA
45
–0.40
mA
8
Am79M535 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description
Logic Output (DET)
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Output Low voltage
IOUT = 0.8 mA
0.40
V
Output High voltage
IOUT = –0.1 mA
2.4
Relay Driver Outputs (RINGOUT)
BGND
–2
BGND
–0.95
On voltage
50 mA source
50 mA sink
V
µA
V
Off leakage
Clamp voltage
0.5
100
QBAT
–2
RELAY DRIVER SCHEMATIC
BGND
RINGOUT
16856B-002
QBAT
SWITCHING CHARACTERISTICS
Temperatures
Symbol
Parameter
Test Conditions
Ranges
Min Typ
Max
Unit Note
0°C to +70°C
–40°C to +85°C
3.8
4.0
E1 Low to DET High (E0 = 1)
tgkde
0°C to +70°C
–40°C to +85°C
1.1
1.6
Ground-Key Detect state
RL open, RG connected
E1 Low to DET Low (E0 = 1)
tgkdd
tgkd0
E0 High to DET Low (E1 = 0) (See Figure H)
0°C to +70°C
–40°C to +85°C
1.1
1.6
E0 Low to DET High (E1 = 0)
0°C to +70°C
–40°C to +85°C
3.8
4.0
µs
4
0°C to +70°C
–40°C to +85°C
1.2
1.7
E1 High to DET Low (E0 = 1)
tshde
0°C to +70°C
–40°C to +85°C
3.8
4.0
Switchhook Detect state
RL = 600 Ω, RG open
E1 High to DET High (E0 = 1)
tshdd
tshd0
E0 High to DET Low (E1 = 1) (See Figure G)
0°C to +70°C
–40°C to +85°C
1.1
1.6
E0 Low to DET High (E1 = 1)
0°C to +70°C
–40°C to +85°C
3.8
4.0
SLIC Products
9
SWITCHING WAVEFORMS
E1 to DET
E1
DET
tgkde
tshde
tgkde
tshde
E0 to DET
E1
E0
DET
tgkdd
tshdd
tshd0
tgkd0
16856B-003
Note:
All delays measured at 1.4 V level.
10
Am79M535 Data Sheet
Notes:
1. Unless otherwise noted, test conditions are BAT = –48 V, VCC = +5 V, VEE = –5 V, RL = 600 Ω, CHP = 0.22 µF,
R
DC1 = RDC2 = 31.25 kΩ, CDC = 0.1 µF, Rd = 51.1 kΩ, no fuse resistors, two-wire AC output impedance, programming
impedance (ZT)= 306 kΩ resistive, receive input summing impedance (ZRX) = 300 kΩ resistive. (See Table 2 for compo-
nent formulas.)
2. Overload level is defined when THD = 1%.
3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance
matches the impedance programmed by ZT.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. These tests are performed with a longitudinal impedance of 90 Ω and metallic impedance of 300 Ω for frequencies below
12 kHz and 135 Ω for frequencies greater than 12 kHz. These tests are extremely sensitive to circuit board layout.
6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
7. When the SLIC is in the Anti-sat 2 operating region, this parameter is degraded. The exact degradation depends on system
design. The Anti-sat 2 region occurs at high loop resistances when VBAT
– VAX – VBX is less than approximately 17 V.
8. “Midpoint” is defined as the connection point between two 300 Ω series resistors connected between A(TIP) and B(RING).
9. Fundamental and harmonics from 256 kHz switch-regulator chopper are not included.
10. Total harmonic distortion with metering as specified with a metering signal of 2.2 Vrms at the two-wire output, and a transmit
signal of +3 dBm or receive signal of –4 dBm. The transmit or receive signals are single-frequency inputs, and the distortion
is measured as the highest in-band harmonic at the two-wire or the four-wire output relative to the input signal.
11. Noise with metering is measured by applying a 2.2 Vrms metering signal (measured at the two-wire output) and measuring
the psophometric noise at the two-wire and four-wire outputs over a 200 ms time interval.
12. Tested with 0 Ω source impedance. 2 MΩ is specified for system design purposes only.
13. Assumes the following ZT network:
RSN
VTX
153 kΩ
153 kΩ
56 pF
14. Group delay can be considerably reduced by using a ZT network such as that shown in Note 13 above. The network reduces
the group delay to less than 2 µs. The effect of group delay on linecard performance may be compensated for by using the
QSLAC™ or DSLAC™ devices.
Table 1. SLIC Decoding
DET Output
E0 = 1*
E1 = 0
E0 = 1*
E1 = 1
State
C3 C2 C1
Two-Wire Status
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Open Circuit
Ring trip
Ring trip
Ringing
Ring trip
Ring trip
Ground key
Ground key
—
Active
Loop detector
Loop detector
Loop detector
Loop detector
Loop detector
Loop detector
On-hook TX (OHT)
Tip Open
Reserved
—
Active Polarity Reversal
OHT Polarity Reversal
Ground key
Ground key
Note:
* A logic Low on E0 disables the DET output into the open-collector state.
SLIC Products
11
Table 2. User-Programmable Components
ZT is connected between the VTX and RSN pins. The fuse
ZT = 510(Z2WIN – 2RF)
resistors are RF, and Z2WIN is the desired 2-wire AC input
impedance. When computing ZT, the internal current amplifier
pole and any external stray capacitance between VTX and
RSN must be taken into account.
ZL
1000 • ZT
ZRX is connected from VRX to the RSN pin, ZT is defined
above, and G42L is the desired receive gain.
----------- -------------------------------------------------
ZRX
=
•
G42L ZT + 510(ZL + 2RF)
RDC1, RDC2, and CDC form the network connected to the
RDC pin. RDC1 and RDC2 are approximately equal.
2500
IFEED
-------------
=
RDCI + RDC2
R
DC1 + RDC2
-------------------------------
RDC1 • RDC2
CDC = 1.5 ms •
RD and CD form the network connected from RD to –5 V and
IT is the threshold current between on hook and off hook.
365
IT
0.5 ms
--------
----------------
RD
RD
ZM
=
=
,
CD =
ZM is connected from VMG (metering source) to the RSN pin,
VM2W is the desired magnitude of the metering signal at the
2-wire output (usually 2.2 Vrms) and K1 (ω ) is defined below.
VMG
K1(ω) • ZL • ZT
-------------- ------------------------------------------------------------------------
•
VM2W ZT + 0.51 • K1(ω)(2RF + ZL)
1000
-------------------------------------------------------------------------------------------------------------
K1(ω) =
1 + jω(11.5 • 10–9 + CX ⁄ 2)(36 + ZL + 2RF)
where: CX = The values of the identical capacitors from
A and B to GND
ω = 2π • metering frequency
12
Am79M535 Data Sheet
DC FEED CHARACTERISTICS
3
4
2
4
2
5
5
V
= 60 V
BAT
V
V
= 47.3 V
= 43 V
BAT
BAT
1
1
Active state
OHT state
RDC = 62.5 kΩ
Notes:
1. Constant-current region:
Active state,
2500
-----------
IL
=
=
RDC
1 2500
-- -----------
OHT state,
IL
2 RDC
2. Anti-sat turn-on;
VAB = 1.02 |VBAT| – 14,
AB = 29.95 V,
|VBAT| < 43.1 V (Anti-sat –2)
|VBAT| ≥ 43.1 V (Anti-sat –1)
V
3. Open Circuit voltage;
VAB = 0.55 |VBAT| + 11.4, |VBAT| ≤ 53 V (Anti-sat –2)
VAB = 40 V, |VBAT| > 53 V (Anti-sat –1)
4. Anti-sat –1 region
5. Anti-sat –2 region
a. VA–VB (VAB) Voltage vs. Loop Current (Typical)
SLIC Products
13
0
1000
2000
3000
4000
Load Resistance (Ω)
RDC = 62.5 kΩ
VBAT = 47.3 V
b. Loop Current vs. Load Resistance (Typical)
A
a
b
RL
IL
RSN
SLIC
RDC1
RDC2
CDC
B
RDC
Current programmed by RDC1 and RDC
c. Feed Programming
16856B-004
Figure 1. DC Feed Characteristics
Am79M535 Data Sheet
14
TEST CIRCUITS
VTX
VTX
A(TIP)
A(TIP)
RL
2
RT
RT
RTMG
VMG
SLIC
SLIC
AGND
AGND
RSN
VL
VAB
VAB
RL
RL
2
RRX
RRX
RSN
B(RING)
B(RING)
VRX
I
L4-2 = –20 log (VAB / VRX)
IL2-4 = –20 log (VTX / VAB
)
BRS = 20 log (VTX / VRX
)
A. Two- to Four-Wire Insertion Loss
B. Four- to Two-Wire Insertion Loss and Balance Return Signal
RL
2
VTX
A(TIP)
1/ωC << RL
S1 Closed, S2 Open
L-T Long. Bal. = –20 log (VAB / VL)
RT
SLIC
L-4 Long. Bal. = –20 log (VTX / GTX • VL)
C
AGND
VL
S1
VL
S2 Closed, S1 Open
4-L Long. Sig. Gen. = –20 log (VL / VRX
)
S2 RRX
RSN
B(RING)
VRX
RL
2
C. Longitudinal Balance
ZD
A(TIP) VTX
Note:
ZD is the desired impedance (e.g., the charac-
teristic impedance of the line.)
R
RT
VS
VM
SLIC
R
RL = 20 log (2 VM / VS)
RSN
B(RING)
RRX
ZIN
D. Two-Wire Return Loss Test Circuit
SLIC Products
15
TESTS CIRCUITS (continued)
RL
A(TIP)
C
68 Ω
1/ωC << 90 Ω
A(TIP)
SM
56 Ω
RL
IDC
B(RING)
SLIC
RG
C
68 Ω
SE
B(RING)
Current Feed and Ground Key
E. Single-Frequency Noise
F. Ground-Key Detection
VCC
6.2 kΩ
A(TIP)
A(TIP)
DET
15 pF
RL = 600 Ω
B(RING)
E0
E1
RG = 2 kΩ
B(RING)
G. Ground-Key Switching
H. Loop-Detector Switching
16
Am79M535 Data Sheet
PHYSICAL DIMENSION
PL032
.485
.495
.447
.453
.009
.015
.042
.056
.125
.140
.585
.595
Pin 1 I.D.
.080
.095
.547
.553
SEATING
PLANE
.400
REF.
.490
.530
.013
.021
.050 REF.
16-038FPO-5
PL 032
DA79
.026
.032
TOP VIEW
SIDE VIEW
6-28-94 ae
REVISION SUMMARY
Revision B to C
•
Minor changes were made to the data sheet style and format to conform to AMD standards.
Revision C to D
•
•
In the Pin Description table, inserted/changed TP pin description to: “Thermal pin. Connection for heat
dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both
cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation.”
Minor changes were made to the data sheet style and format to conform to AMD standards.
Revision D to E
•
•
•
The physical dimension (PL032) was added to the Physical Dimension section.
Deleted the Ceramic DIP and Plastic DIP part (Am79M531) and references to it.
Updated the Pin Description table to correct inconsistencies.
SLIC Products
17
The contents of this document are provided in connection with Advanced Micro Devices, Inc. ("AMD") products. AMD makes no representations
or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to speci-
fications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any in-
tellectual property rights is granted by this publication. Except as set forth in AMD’s Standard Terms and Conditions of Sale, AMD assumes no
liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of
merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
AMD’s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the
body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD’s product could create a
situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make
changes to its products at any time without notice.
© 1999 Advanced Micro Devices, Inc.
All rights reserved.
Trademarks
AMD, the AMD logo, and combinations thereof, and DSLAC and QSLAC are trademarks of Advanced Micro Devices, Inc.
Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
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