AS5047P-ATSM_技术文档

AS5047P

14-bit On-Axis Magnetic Rotary

Position Sensor with 12-Bit Decimal &

Binary Incremental Pulse Count for

28krpm high speed capability

The AS5047P is a high-resolution rotary position sensor for high

speed (up to 28krpm) angle measurement over a full 360 degree

range. This new position sensor is equipped with revolutionary

integrated dynamic angle error compensation (DAEC™) with

almost 0 latency and offers a robust design that suppresses the

influence of any homogenous external stray magnetic field.

General Description

A standard 4-wire SPI serial interface allows a host

microcontroller to read 14-bit absolute angle position data

from the AS5047P and to program non-volatile settings without

a dedicated programmer.

Incremental movements are indicated on a set of ABI signals

with a maximum resolution of 4000 steps / 1000 pulses per

revolution in decimal mode and 4096 steps / 1024 pulses per

revolution in binary mode. The resolution of the ABI signal is

programmable and can be reduced to 100 steps per revolution,

or 25 pulses per revolution.

Brushless DC (BLDC) motors are controlled through a standard

UVW commutation interface with a programmable number of

pole pairs from 1 to 7. The absolute angle position is also

provided as PWM-encoded output signal

The AS5047P is available as a single die in a compact 14-pin

TSSOP package.

Ordering Information and Content Guide appear at end of

datasheet.

Key Benefits & Features

The benefits and features of AS5047P, 14-bit On-Axis Magnetic

Rotary Position Sensor with 12-Bit Decimal & Binary

Incremental Pulse Count for 28krpm high speed capability are

listed below:

Figure 1:

Added Value of using the AS5047P

Benefits

High speed application

Features

Up to 28krpm

Easy to use – saving costs on DSP

Good resolution for motor & position control

DAEC™ Dynamic angle error compensation

14-bit core resolution

ams Datasheet

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AS5047P − General Description

Benefits

Features

ABI programmable decimal and binary pulse-count:

1000,500,400,300,200,100,50,25,1024,512,256 ppr

Simple optical encoder replacement

No programmer needed (via SPI command)

Versatile choice of the interface

Zero position, configuration programmable

Independent output interfaces: SPI, ABI, UVW, PWM

Immune to external stray field

Lower system costs (no shielding)

Applications

The AS5047P is ideally suited to support BLDC motor

commutation for the most challenging industrial applications

such as factory automation, building automation, robotics,

PMSM (permanent magnet synchronous motor) and stepper

motors closed loop in as well optical encoder replacement.

Block Diagram

The functional blocks of this device for reference are

shown below:

Figure 2:

AS5047P Block Diagram

VDD3V3

Volatile Memory

CSn

SCL

SPI

MISO

MOSI

OTP

LDO

VDD

A

B

ABI

Hall

Sensors

Analog

Front-End

I/PWM

U

V

Dynamic Angle

Error

Compensation

ATAN

(CORDIC)

INTERPOLATOR

A/D

UWV

W / PWM

PWM Decoder

Selectable

on I or W

AGC

GND

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AS5047P − Pin Assignment

Pin Assignment

Figure 3:

TSSOP-14 Pin Assignment

CSn

CLK

I / PWM

GND

MISO

VDD3V

MOSI

TEST

B

VDD

U

V

A

W / PWM

Figure 4:

Pin Description

Pin Number Pin Name

Pin Type

Description

1

2

3

4

5

6

7

CSn

CLK

MISO

MOSI

Test

B

Digital input

Digital output

Digital input

SPI chip select (active low)

SPI clock

SPI master data input, slave output

SPI master data output, slave input

Test pin (connect to ground)

Incremental signal B

Digital output

A

Incremental signal A

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AS5047P − Pin Assignment

Pin Number Pin Name

Pin Type

Digital output

Power supply

Description

8

9

W/PWM

Commutation signal W or PWM

Commutation signal V

V

U

10

11

Commutation signal U

VDD

5V power supply voltage for on-chip regulator

3.3V on-chip low-dropout (LDO) output. Requires an

external decoupling capacitor (1uF)

12

VDD3V3

Power supply

13

14

GND

I

Power supply

Digital output

Ground

Incremental signal I (index) or PWM

Note(s) and/or Footnote(s):

1. Floating state of a digital input is not allowed.

2. If SPI is not used, an Pull up resistor on CSn is required.

3. If SPI is not used, an Pull down resistor on CLK is required.

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AS5047P − Absolute Maximum Ratings

Stresses beyond those listed under

Absolute Maximum Ratings

“Absolute Maximum Ratings” may cause permanent damage to

the device. These are stress ratings only. Functional operation

of the device at these or any other conditions beyond those

indicated under “Electrical Characteristics” is not implied.

Exposure to absolute maximum rating conditions for extended

periods may affect device reliability.

Figure 5:

Absolute Maximum Ratings

Symbol

Parameter

Min

Max

Units

Note

VDD5

DC supply voltage at VDD pin

-0.3

7.0

V

DC supply voltage at VDD3V3

VDD3

-0.3

5.0

V

DC supply voltage at GND pin

Input pin voltage

0.3

V

SS

V

VDD+0.3

in

Input current

(latch-up immunity)

I

-100

2

100

mA

kV

Norm: AEC-Q100-004

Norm: AEC-Q100-002

scr

ESD

Electrostatic discharge

Total power dissipation

(all supplies and outputs)

P

150

125

45

mW

t

In the 5.0V power supply mode

only

Ta5V0

Ta3V3

TaProg

Ambient temperature 5V0

Ambient temperature 3V3

Programming Temperature

-40

°C

In the 3.3V power supply mode if

NOISESET = 0

Programming @ Room

temperature (25°C 20°C)

5

T

Storage temperature

-55

150

260

85

°C

%

strg

T

Package body temperature

Humidity non-condensing

Norm: IPC/JEDEC J-STD-020

body

5

Represents a maximum floor

lifetime of 168h

Moisture sensitivity level

3

ams Datasheet

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AS5047P − Electrical Characteristics

All limits are guaranteed. The parameters with min and max

values are guaranteed with production tests or SQC (Statistical

Quality Control) methods.

Electrical Characteristics

Figure 6:

Electrical Characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Units

VDD

Positive supply voltage 5.0V operation mode

4.5

5.0

5.5

V

3.3V operation mode; only

Positive supply voltage

VDD3V3

3.0

3.3

3.6

3.5

V

from -40 to 125°C

Supply voltage required

VDD_Burn Positive supply voltage for programming in 3.3V

operation

Voltage at VDD3V3 pin if

VDD ≠ VDD3V3

V

Regulated Voltage

3.2

2.3

3.4

3.6

V

REG

3V operation. Pin VDD5 &

VDD3 shorted

V

Internal POR-ON level

Internal POR-OFF level

2.85

2.65

porON

3V operation. Pin VDD5 &

VDD3 shorted

V

2.05

150

porOFF

V

Internal POR hysteresis

Supply current

300

15

mV

mA

porh

I

DD

High-level input

voltage

V

0.7×VDD

V

IH

V

Low-level input voltage

0.3×VDD

IL

High-level output

voltage

V

VDD-0.5

OH

Low-level output

voltage

V

+0.4

1

V

OL

SS

Current on digital

output

I_Out

C_L

mA

pf

Capacitive load on

digital output

50

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AS5047P − Magnetic Characteristics

Magnetic Characteristics

Figure 7:

Magnetic Specifications

Symbol

Parameter

Conditions

Min Max Unit

Orthogonal magnetic field

Required orthogonal component of the

Bz

strength, normal operating magnetic field strength measured at the

mode die's surface along a circle of 1.1mm

35

70

mT

Note(s) and/or Footnote(s):

1. it is possible to operate the AS5047P below 35mT with reduced noise performance.

System Characteristics

Figure 8:

System Specifications

Symbol

Parameter

Conditions

Min Typ Max

Units

RES

Core resolution

14

bit

Resolution of the ABI

interface

Programmable with register

setting (ABIRES)

Steps per

revolution

RES_ABI

100

4096

0.8

Non-linearity, optimum

placement of the

magnet

INL

@

OPT

Deg

25°C

Non-linearity optimum

placement of the

magnet over the full

Temperature Range

INL

1

1.2

Deg

OPT+TEMP

Non-linearity @

displacement of

magnet and

temperature -40°C to

150°C

Assuming N35H Magnet

(D=8mm, H=3mm) 500um

displacement in x and y

z-distance @ 2000um

INL

DIS+TEMP

Orthogonal component for

the magnetic field within the

specified range (Bz),

RMS output noise

(1 sigma). Not tested,

guaranteed by design.

ONL

0.068

degree

NOISESET = 0

RMS output noise

(1 sigma) on PWM

interface

Orthogonal component for

the magnetic field within the

specified range (Bz)

ON_PWM

0.068

110

degree

μs

System propagation

delay –core

t

Reading angle via SPI

90

delay

ams Datasheet

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AS5047P − Timing Characteristics

Symbol

Parameter

Conditions

Min Typ Max

Units

System propagation

delay after dynamic

angle error correction.

t

delay_

DAEC

At ABI and UVW interfaces

1.5

1.9

μs

t

Sampling rate

Refresh rate at SPI

202

222

247

ns

sampl

DAE

Dynamic angle error

At 1700 RPM constant speed

0.02

degree

1700

At 14500 RPM constant

speed

DAE

Dynamic angle error

0.18

degree

max

Dynamic angle error at

constant acceleration

(25krad/s²)

25k radians/s² constant

acceleration

DAE

0.175

degree

RPM

acc

MS

Maximum speed

28000

Reference magnet: N35H, 8mm diameter; 3mm thickness.

Timing Characteristics

Figure 9:

Timing Specifications

Symbol

Parameter

Conditions

Min

Typ

Max

Units

t

Power-on time

10

ms

pon

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AS5047P − Detailed Description

The AS5047P is a Hall-effect magnetic sensor using a CMOS

lateral technology. The lateral Hall sensors convert the

magnetic field component perpendicular to the surface of the

chip into a voltage.

Detailed Description

The signals from the Hall sensors are amplified and filtered by

the analog front-end (AFE) before being converted by the

analog-to-digital converter (ADC). The output of the ADC is

processed by the hardwired CORDIC (coordinate rotating

digital computer) block to compute the angle and magnitude

of the magnetic vector. The intensity of the magnetic field

(magnitude) is used by the automatic gain control (AGC) to

adjust the amplification level for compensation of the

temperature and magnetic field variations.

The internal 14-bit resolution is available by reading a register

through the SPI interface. The resolution on the ABI output can

be programmed from 4096 to 100 steps per revolution.

The Dynamic Angle Error Compensation block corrects the

calculated angle for latency using a linear prediction

calculation algorithm. At constant rotation speed the latency

time is internally compensated by the AS5047P, reducing the

dynamic angle error at the SPI, ABI and UVW outputs. The

AS5047P allows to switch OFF the UVW output interface to

display the absolute angle as PWM-encoded signal on the

pin W.

At higher speeds, the interpolator fills in missing ABI pulses and

generates the UVW signals with no loss of resolution. The

non-volatile settings in the AS5047P can be programmed

through the SPI interface without any dedicated programmer.

The AS5047P is built for high speed application up to 28krpm.

Power Management

The AS5047P can be either powered from a 5.0V supply using

the on-chip low-dropout regulator or from a 3.3V voltage

supply. The LDO regulator is not intended to power any other

loads, and it needs a 1 μF capacitor to ground located close to

the chip for decoupling as shown in Figure 10.

In 3.3V operation, VDD and VREG must be tied together.

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AS5047P − Detailed Description

Figure 10:

5.0V and 3.3V Power Supply Options

5.0V Operation

3.3V Operation

4.5 - 5.5V

3.0 – 3.6V

VDD

VDD3V3

1µF

VDD

VDD3V3

LDO

100nF

GND

AS5047P

After applying power to the chip, the power-on time (t ) must

pon

elapse before the AS5047P provides the first valid data.

Dynamic Angle Error Compensation

The AS5047P uses 4 integrated Hall sensors which produce a

voltage proportional to the orthogonal component of the

magnetic field to the die. These voltage signals are amplified,

filtered, and converted into the digital domain to allow the

CORDIC digital block to calculate the angle of the magnetic

vector. Propagation of these signals through the analog

front-end and digital back-end generates a fixed delay between

the time of measurement and the availability of the measured

angle at the outputs. This latency generates a dynamic angle

error represented by the product of the angular speed (ω)and

the system propagation delay (t

):

delay

DAE = ω x t

delay

The dynamic angle compensation block calculates the current

magnet rotation speed (ω) and multiplies it with the system

propagation delay (t

) to determine the correction angle to

delay

reduce this error. At constant speed, the residual system

propagation delay is t

.

delay_DAEC

The angle represented on the PWM interface is not

compensated by the Dynamic Angle Error Compensation

algorithm. it is also possible to disable the Dynamic Angle Error

Compensation with the setting DAECDIS. Disabling the

Dynamic Angle Error Compensation gives a noise benefit of

0.016 degree rms.This setting can be advantageous for low

speed (under 100rpm) respectively static positioning

applications.

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AS5047P − Detailed Description

SPI Interface (slave)

The SPI interface is used by a host microcontroller (master) to

read or write the volatile memory as well as to program the

non-volatile OTP registers. The AS5047P SPI only supports slave

operation mode. It communicates at clock rates up to 10 MHz.

The AS5047P SPI uses mode=1 (CPOL=0, CPHA=1) to exchange

data. As shown in Figure 11, a data transfer starts with the

falling edge of CSn (SCL is low). The AS5047P samples MOSI data

on the falling edge of SCL. SPI commands are executed at the

end of the frame (rising edge of CSn). The bit order is MSB first.

Data is protected by parity.

SPI Timing

The AS5047P SPI timing is shown in Figure 11.

Figure 11:

SPI Timing Diagram

t_CSn

CSn

(Input)

t_L

t_clk

t_clkL

t_clkH

t_H

CLK

(Input)

t_MISO

t_OZ

MISO

(Output)

Data[15]

Data[14]

Data[0]

t_OZ

t_MOSI

MOSI

(Input)

Data[15]

Data[14]

Data[0]

ams Datasheet

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AS5047P − Detailed Description

Figure 12:

SPI Timing

Parameter

Description

Time between CSn falling edge and CLK rising edge

Serial clock period

Min

350

100

50

Max

Units

ns

t

L

t

ns

clk

t

Low period of serial clock

ns

clkL

t

High period of serial clock

50

ns

clkH

Time between last falling edge of CLK and rising

edge of CSn

t

tclk / 2

ns

H

t

High time of CSn between two transmissions

Data input valid to falling clock edge

CLK edge to data output valid

350

20

ns

CSn

t

MOSI

t

51

10

MISO

t

Release bus time after CS rising edge.

OZ

SPI Transaction

An SPI transaction consists of a 16-bit command frame followed

by a 16-bit data frame. Figure 13 shows the structure of the

command frame.

Figure 13:

SPI Command Frame

Bit

Name

Description

15

PARC

Parity bit (even) calculated on the command frame

0: Write

1: Read

14

R/W

13:0

ADDR

Address to read or write

To increase the reliability of communication over the SPI, an

even parity bit PARC must be generated and sent. A wrong

setting of the parity bit causes the PARERR bit in the error flag

register to be set. The parity bit is calculated from the 16-bit

command frame. The 16-bit command specifies whether the

transaction is a read or a write and the address.

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AS5047P − Detailed Description

Figure 14 shows the read data frame.

Figure 14:

SPI Read Data Frame

Bit

Name

Description

15

PARD

Parity bit (even) for the data frame

0: No command frame error occurred

1: Error occurred

14

EF

13:0

DATA

Data

The data is sent on the MISO pin. The parity bit PARD is

calculated by the AS5047P for the 16-bit data frame. If an error

is detected in the previous SPI command frame, the EF bit is set

high. The SPI read is sampled on the rising edge of CSn and the

data is transmitted on MISO with the next read command, as

shown in Figure 15.

Figure 15:

SPI Read

CSn

Command

Read ADD[n]

Read ADD[k]

Read ADD[p]

Read ADD[m]

MOSI

MISO

Data

Data ADD[n]

Data ADD[k]

Data ADD[p]

Figure 16:

SPI Write Data Frame

Bit

15

Name

Description

PARD

0

Parity bit (even)

Always low

Data

14

13:0

DATA

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AS5047P − Detailed Description

The parity bit PARD must be calculated from the 16-bit data.

In an SPI write transaction, the write command frame (e.g. Write

ADD[n]) is followed by a data frame (e.g. DATA [x]). In addition

to writing an address in the AS5047P, a write command frame

causes the old contents of the addressed register (e.g. DATA [y])

to be sent on MISO in the following frame. This is followed by

the new contents of the addressed register (DATA [x]) as shown

in Figure 18.

Figure 17:

SPI Write Transaction

CSn

Command

Data to write into ADD[n]

DATA (y)

Command

Data to write into ADD[n]

DATA (x)

MOSI

MISO

Write ADD[n]

Write (ADDm)

Next command

New Data content

of ADD[n]

New Data content

of ADD[m]

Data content of ADD[n]

DATA (y)

Data content of ADD[m]

DATA (p)

DATA (x)

DATA (y)

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AS5047P − Detailed Description

Volatile Registers

The volatile registers are shown in Figure 18. Each register has

a 14-bit address.

Figure 18:

Volatile Register Table

Address

0x0000

0x0001

0x0003

0x3FFC

0x3FFD

Name

NOP

Default

0x0000

0x0180

0x0000

Description

No operation

Error register

ERRFL

PROG

DIAAGC

MAG

Programming register

Diagnostic and AGC

CORDIC magnitude

Measured angle without dynamic angle

error compensation

0x3FFE

0x3FFF

ANGLEUNC

ANGLECOM

0x0000

Measured angle with dynamic angle error

compensation

Reading the NOP register is equivalent to a nop (no operation)

instruction for the AS5047P.

Figure 19:

ERRFL (0x0001)

Name

Read/Write

Bit Position

Description

PARERR

R

2

1

Parity error

Invalid command error: set to 1 by reading or writing

an invalid register address

INVCOMM

FRERR

Framing error: is set to 1 when a non-compliant SPI

frame is detected

R

0

Reading the ERRFL register automatically clears its contents

(ERRFL=0x0000).

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AS5047P − Detailed Description

Figure 20:

PROG (0x0003)

Name

PROGVER

PROGOTP

OTPREF

Read/Write

R/W

Bit Position

Description

Program verify: must be set to 1 for verifying the

correctness of the OTP programming

6

3

2

R/W

Start OTP programming cycle

Refreshes the non-volatile memory content with the

OTP programmed content

R/W

Program OTP enable: enables programming the entire

OTP memory

PROGEN

R/W

0

The PROG register is used for programming the OTP memory.

(See programming the zero position.)

Figure 21:

DIAAGC (0x3FFC)

Name

MAGH

MAGL

COF

Read/Write Bit Position

Description

R

11

10

9

Diagnostics: Magnetic field strength too low; AGC=0xFF

Diagnostics: Magnetic field strength too high; AGC=0x00

Diagnostics: CORDIC overflow

Diagnostics: Offset compensation

LF=0:internal offset loops not ready regulated

LF=1:internal offset loop finished

LF

R

8

AGC

7:0

Automatic gain control value

Figure 22:

MAG (0x3FFD)

Description

Name

Read/Write

Bit Position

CMAG

R

13:0

CORDIC magnitude information

Figure 23:

ANGLE (0x3FFE)

Name

Read/Write

Bit Position

Description

Angle information without dynamic angle error

compensation

CORDICANG

R

13:0

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AS5047P − Detailed Description

Figure 24:

ANGLECOM (0x3FFF)

Name

Read/Write

Bit Position

Description

Angle information with dynamic angle error

compensation

DAECANG

R

13:0

Non-Volatile Registers (OTP)

A nonvolatile memory (One-Time Programmable) is used store

the zero position of the magnet and custom settings.

Figure 25:

Non-Volatile Register Table

Address

0x0016

0x0017

0x0018

0x0019

0x001A

Name

Default

0x0000

Description

ZPOSM

ZPOSL

Zero position MSB

Zero position LSB /MAG diagnostic

Custom setting register 1

Custom setting register 2

Redundancy register

SETTINGS1

SETTINGS2

RED

Figure 26:

ZPOSM (0x0016)

Description

Name

Read/Write/Program Bit Position

ZPOSM

R/W/P

7:0

8 most significant bits of the zero position

Figure 27:

ZPOSL (0x0017)

Name

Read/Write/Program Bit Position

Description

ZPOSL

R/W/P

5:0

6 least significant bits of the zero position

This bit enables the contribution of

MAGH (Magnetic field strength too high)

to the system_error

comp_l_error_en

comp_h_error_en

R/W/P

6

This bit enables the contribution of MAGL

(Magnetic field strength too low) to the

system_error

R/W/P

7

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AS5047P − Detailed Description

Figure 28:

SETTINGS1 (0x0018)

Name

Read/Write/Program Bit Position

Description

Factory

Setting

R

0

Pre-Programmed to 1

NOISESET

DIR

R/W/P

1

2

Noise setting

Rotation direction

Defines the PWM Output

UVW_ABI

R/W/P

3

(0 = ABI is operating, W is used as PWM

1 = UVW is operating, I is used as PWM)

Disable Dynamic Angle Error Compensation

(0 = DAE compensation ON, 1 = DAE

compensation OFF)

DAECDIS

ABIBIN

R/W/P

4

5

ABI decimal or binary selection of the ABI

pulses per revolution

This bit defines which data can be read form

address 16383dec (3FFFhex).

0->DAECANG

Dataselect

PWMon

R/W/P

6

7

1->CORDICANG

enables PWM (setting of UVW_ABI Bit

necessary)

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AS5047P − Detailed Description

Figure 29:

SETTINGS2 (0x0019)

Name

Read/Write/Program Bit Position

Description

UVW number of pole pairs

UVWPP

R/W/P

2:0

(000 = 1, 001 = 2, 010 = 3, 011 = 4, 100 = 5, 101 =

6, 110 = 7, 111 = 7)

HYS

R/W/P

4:3

7:5

Hysteresis setting

Resolution of ABI

ABIRES

Figure 30:

RED (0x001A)

Name

Read/Write/Program

Bit Position

Description

Redundancy bits. This field enables with

force to high one bit of the Non-Volatile

register map after a non-successful

burning. For more details please refer to

the application note

REDUNDANCY

R/W/P

4:0

“AN5000 – AS5147_Redundancy_Bits”

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AS5047P − Detailed Description

ABI Incremental Interface

The AS5047P can send the angle position to the host

microcontroller through an incremental interface. This

interface is available simultaneously with the other interfaces.

By default, the incremental interface is set to work at the highest

resolution 4096 step per revolution, or 1024 pulses per

revolution (ppr). It is possible to select between a decimal and

binary pulses per revolution, respectively with the bit ABIBIN

and select the pulses per revolution with the bit ABIRES as

shown in Figure 31.

Figure 31:

ABI Resolution Setting

ABIRES

000

ABIBIN

Steps per revolution

Pulses per revolution

0

1

4000

2000

1600

1200

800

1000

500

400

300

200

100

50

001

010

011

100

101

400

110

200

111

100

25

000

4096

2048

1024

512

256

001

010

The phase shift between the signals A and B indicates the

rotation direction: e.g. DIR-Bit = 0, clockwise (A leads, B follows)

or counterclockwise (B leads, A follows). During the start-up

time, after power ON to the chip, all three ABI signals are high.

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amsDatasheet

[v1-00] 2014-Oct-31

AS5047P − Detailed Description

Figure 32:

ABI Signals at 11-Bit Resolution

A

B

I

Steps

N-7 N-6 N-5 N-4 N-3 N-2 N-1

0

1

2

3

4

5

6

7

8

7

6

5

4

3

2

1

0

N-1 N-2 N-3 N-4

Clockwise rotation

Counter-clockwise rotation

The Figure 32 shows the ABI signal flow if the magnet rotates

in clockwise direction, placing the magnet on the top of the

AS5047P and looking at the magnet from the top (DIR=0). With

the bit DIR, it is possible to invert the rotation direction.

ams Datasheet

Page 21

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Document Feedback

AS5047P − Detailed Description

UVW Commutation Interface

The AS5047P can emulate the UVW signals generated by the

three discrete Hall switches commonly used in BLDC motors.

The UVWPP field in the SETTINGS register selects the number

of pole pairs of the motor (from 1 to 7 pole pairs). The UVW

signals are generated with 14-bit resolution.

During the start-up time, after power ON of the chip, the UVW

signals are low.

Figure 33:

UVW Signals

U

V

W

Electrical

Angle

0°

60°

120°

180°

240°

300°

360°

The Figure 33 shows the UVW signal flow if the magnet rotates

in clockwise direction, placing the magnet on the top of the

AS5047P and looking at the magnet from the top (DIR=0). With

the bit DIR, it is possible to invert the rotation direction.

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AS5047P − Detailed Description

PWM

The PWM can be enabled with the bit setting PWMon. The PWM

encoded signal is displayed on the pin W or the pin I. The bit

setting UVW_ABI defines which output is used as PWM.The

PWM output consists of a frame of 4119 PWM clock periods, as

shown in Figure 34. The PWM frame has the following sections:

• 12 PWM Clocks for INIT

• 4 PWM Clocks for Error detection

• 16 PWM clock periods high

• 4095 PWM clock periods of data

• 8 PWM clock periods low

The angle is represented in the data part of the frame with a

12-bit resolution. One PWM clock period represents 0.088

degree and has a typical duration of 444 ns.

If the embedded diagnostic of the AS5047P detects any error

the PWM interface displays only 12 clock periods high

(0.3% duty-cycle).

Figure 34:

Pulse Width Modulation Encoded Signal

time

16 clock pulse

high

8 clock pulse

low

data

ams Datasheet

[v1-00] 2014-Oct-31

Page 23

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AS5047P − Detailed Description

Hysteresis

The hysteresis can be programmed in the HYS bits if the

SETTINGS2 register and depends on the chosen resolution of

the incremental interface (ABIRES), as shown in the Figure 35.

Figure 35:

Hysteresis Settings

Hysteresis related to 11 Bit

HYS

ABI Resolution

00

01

10

11

3

2

1

0

Automatic Gain Control (AGC) and CORDIC

Magnitude

The AS5047P uses AGC to compensate for variations in the

magnetic field strength due to changes of temperature, air gap

between the chip and the magnet, and demagnetization of the

magnet. The automatic gain control value can be read in the

AGC field of the DIAAGC register. Within the specified input

magnetic field strength (Bz), the Automatic Gain Control works

in a closed loop and keeps the CORDIC magnitude value (MAG)

constant. Below the minimum input magnetic field strength,

the CORDIC magnitude decreases and the MAGL bit is set.

Diagnostic Features

The AS5047P supports embedded self-diagnostics.

MAGL: magnetic field strength too high, set if AGC = 0xFF^.This

indicates the non-linearity error may be increased.

MAGH: magnetic field strength too low, set if AGC = 0x00^.This

indicates the output noise of the measured angle may be

increased.

COF: CORDIC overflow. This indicates the measured angle is not

reliable.

LF: offset compensation completed. At power-up, an internal

offset compensation procedure is started, and this bit is set

when the procedure is completed.

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AS5047P − Detailed Description

OCF Error / COF Error

In case of an OCF or COF error, all outputs are changing into a

safe state:

SPI Output: Information in the DIAAGC (0x3FFC) register. The

angle information is still valid.

PWM Output: PWM Clock Period 13 - 16 of the first 16 PWM Clock

Periods = low. Additional there is no angle information valid

(all 4096 clock periods = low)

ABI Output : The state of ABI is frozen to ABI = 111

UVW Output : The state of UVW is frozen to UVW = 000

MAGH Error /MAGL Error

Default diagnostic setting for MAGH error /MAGL error:

In case of a MAGH error or MAGL error, there is no safe state on

the PWM,ABI or UVW outputs if comp_h_error_en= 0 &

comp_h_error_en = 0. The device is operating with the

performance as explained.

The error flags can be read out with the DIAAGC (0x3FFC)

register.

Enhanced diagnosis setting for MAGH error / MAGL error:

In case of a MAGH error or MAGL error, the PWM,ABI or UVW

outputs are going into a safe state if comp_h_error_en= 1 &

comp_h_error_en = 1.

SPI Output: Information in the DIAAGC (0x3FFC) register. The

angle information is still valid, if the MAGH or MAGL error flag

is on.

PWM Output: PWM Clock Period 13 - 16 of the first 16 PWM Clock

Periods = low. Additional there is no angle information valid (all

4096 clock periods = low)

ABI Output : The state of ABI is frozen to ABI = 111

UVW Output : The state of UVW is frozen to UVW = 000

Important: When comp_(h/l)_error_en is enabled a marginal

magnetic field input can cause toggling of MAGH or MAGL

which will lead to toggling of the ABI/UVW outputs between

operational mode and failure mode.

ams Datasheet

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Document Feedback

AS5047P − Application Information

Application Information

Burn and Verification of the OTP Memory

Step-by-step procedure to permanently program the

non-volatile memory (OTP):

Figure 36:

Minimum Programming Diagram for the AS5047P in 5 V Operation

5V operation

VDD during programming 4.5 – 5.5V

VDD

I

CSn

CLK

GND

VDD3V

MISO

MOSI

VDD

U

TEST

Programmer

A

V

100nF

1μF

B

W

GND

Note(s) and/or Footnote(s):

1. In terms of EMC and for remote application, additional circuits are necessary.

Page 26

amsDatasheet

Document Feedback

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AS5047P − Application Information

Figure 37:

Minimum Programming Diagram for the AS5047P in 3.3V Operation

3.3V operation

VDD during programming: 3.3V – 3.5V

VDD

I

CSn

CLK

GND

VDD3V

MISO

MOSI

VDD

U

TEST

Programmer

A

V

100nF

B

W

GND

Note(s) and/or Footnote(s):

1. In terms of EMC and for remote application, additional circuits are necessary.

Figure 38:

Programming Parameter

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Programming @ Room

Temperature

(25°C +-20°C

Programming

temperature

T

5

45

°C

aProg

5 V operation mode. Supply

voltage during

programming

Positive supply

voltage

V

4.5

3.3

5

5.5

V

DD

3.3 V operation mode.

Supply voltage during

programming

Positive supply

voltage

V

3.5

V

DD

Current for

programming

max current during OTP burn

procedure.

I

100

mA

Prog

ams Datasheet

Page 27

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Document Feedback

AS5047P − Application Information

The programming can either be performed in 5V operation

using the internal LDO (1uF on regulator output pin), or in 3V

Operation but using a supply voltage between 3.3V and 3.5V.

1. Power ON cycle

2. Write the SETTINGS1 and SETTINGS2 registerswith the

Custom settings for this application (Bit0 of Settings1 is

a factory bit. For programming its mandatory to set this

bit to 0).

3. Position the magnet at the desired zero position

4. Read out the measured angle from the ANGLE register

5. Write ANGLE [5:0] into the ZPOSL register and ANGLE

[13:6] into the ZPOSM register

6. Read reg(0x0016) to reg(0x0019) → Read register step1

7. Comparison of written content (settings and angle) with

content of read register step1 (Removing of Bit0 of

Settings1 from the comparison is mandatory. Bit0 is

preprogrammed)

8. If point 7 is correct, enable OTP read / write by setting

PROGEN = 1 in the PROG register

9. Start the OTP burn procedure by setting PROGOTP = 1

in the PROG register

10. Read the PROG register until it reads 0x0000

(Programming procedure complete)

11. Clear the memory content writing 0x00 in the whole

non-volatile memory

12. Enable OTP read / write by setting PROGEN = 1 in the

PROG register

13. Set the PROGVER = 1 to set the Guard band for the guard

(1)

band test

.

14. Refresh the non-volatile memory content with the OTP

content by setting OTPREF = 1

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AS5047P − Application Information

15. Read reg(0x0016) to reg(0x0019) → Read register step2

16. Comparison of written content (settings and angle) with

content of read register step2.

Mandatory: guard band test (Removing of Bit0 of

Settings1 from the comparison is mandatory. Bit0 is

preprogrammed)

17. New power ON cycle, if point 16 is correct. If point 16

1

fails, the test with the guard band test was not

successful and the device is incorrectly programmed. A

reprogramming is not allowed!

18. Read reg(0x0016) to reg(0x0019) → Read register step3

19. Comparision of written content (settings and angle)

with content of read register step3(Removing of Bit0 of

Settings1 from the comparison is mandatory. Bit0 is

preprogrammed).

20. If point 19 is correct, the programming was successful.

If point 19 fails, device is incorrectly programmed. A

reprogramming is not allowed

1. Guard band test:

- Restricted to temperature range: 25 °C 20 °C

- Right after the programming procedure (max. 1 hour with same

Conditions 25°C 20 °C)

-

- Same VDD voltage

The guard band test is only for the verification of the burned OTP fuses during the programming sequence.

A use of the guard band in other cases is not allowed.

ams Datasheet

Page 29

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Document Feedback

AS5047P − Application Information

Figure 39:

OTP Memory Burn and Verification Flowchart

Write

Reg(0x0016)=0x00

Reg(0x0017)=0x00

Reg(0x0018=0x00

Reg(0x0019)=0x00

Power on cycle

START

Clear memory

Write

Reg(0x0003)=0x08

Write reg(0x0018)

Write reg(0x0019)

Unlock OTParea for read/write

(PROGEN=1)

AS5047P settings

Set the magnet to

the zero position

Write

Reg(0x0003)=0x40

Set Guardband

Position of the magnet to

the zero position

Not correct

Write

Reg(0003)=0x04

Refresh memory with OTP

content

Read ANGLE

Read reg(0x3FFF)

Read

Write

Reg(0x0016)

Reg(0x0017)

Reg(0x0018)

Reg(0x0016)

Write Angle into ZPOSL

and ZPOSM

Reg(0x0017(5:0))= reg(0x3FFF(5:0))

Reg(0x0016(7:0))= reg(0x3FFF(13:6))

Read Register step 2

Read

Comparison of written content (settings and

angle) with content of Read Register step 2*

Mandatory Guardband-Test

Reg(0x0016)

Reg(0x0017)

Reg(0x0018)

Reg(0x0019)

Verify 2

correct

Read Register step 1

Not correct

YES

Comparison of written content

(settings and angle) with content

of Read Register step 1*

Guardbandtest fails.

Wrong programming.

Reprogramming not allowed

Verify 1

correct

Power-on cycle

Read

Reg(0x0016)

Reg(0x0017)

Reg(0x0018)

Reg(0x0016)

Unlock OTParea for read/write

(PROGEN=1)

Write

Reg(0x0003)=0x01

Read Register step 3

Comparison of written content

(settings and angle) with content

of Read Register step 3*

Start OTP burning procedure

(PROGOTP=1)

Write

Reg(0x0003)=0x08

Verify 3

correct

Not correct

END

Correct

programming and

verification

END

Read

Reg(0x0003)

Read OTP_CTRL

Wrong programming

Reprogramming not

allowed

NO

OTP burning procedure

complete if Reg(0x0003) =0x00

Reg(0x0003)=0x00

* During the comparison the bit0 of settings1 has to be ignored. This bit is pre-programmed.

Page 30

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amsDatasheet

[v1-00] 2014-Oct-31

AS5047P − Application Information

Figure 40:

Minimum Circuit Diagram for the AS5047P

4.5 – 5.5V

VDD

I

CSn

CLK

GND

VDD3V

MISO

MOSI

TEST

A

VDD

U

MCU

V

100nF

1μF

B

W

GND

Note(s) and/or Footnote(s):

1. In terms of EMC and for remote application, additional circuits are necessary.

ams Datasheet

[v1-00] 2014-Oct-31

Page 31

Document Feedback

AS5047P − Package Drawings & Markings

The axis of the magnet must be aligned over the center of the

package.

Package Drawings & Markings

Figure 41:

Package Outline Drawing

Green

RoHS

Symbol

Min

-

Nom

Max

1.20

0.15

1.05

0.30

0.20

5.10

-

Symbol

R

Min

Nom

-

Max

A

A1

A2

b

-

0.09

-

0.05

0.80

0.19

0.09

4.90

-

R1

0.09

-

1.00

-

S

0.20

-

Θ1

0º

-

8º

-

c

-

Θ2

12 REF

0.10

0.05

0.20

14

D

5.00

6.40 BSC

4.40

0.65 BSC

0.60

1.00 REF

Θ3

-

E

aaa

bbb

ccc

ddd

N

-

E1

e

4.30

-

4.50

-

L

0.45

-

0.75

-

L1

Note(s) and/or Footnote(s):

1. Dimensioning and tolerancing conform to ASME Y14.5M - 1994.

2. All dimensions are in millimeters. Angles are in degrees.

3. N is the total number of terminals.

Page 32

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AS5047P − Package Drawings & Markings

Figure 42:

Packaging Code

YY

WW

M

ZZ

@

Last two digits of the

current year

Free choice /

traceability code

Manufacturing week

Plant identifier

Sublot identifier

Figure 43:

Package Marking

AS5047P

YYWWMZZ

@

ams Datasheet

[v1-00] 2014-Oct-31

Page 33

Document Feedback

AS5047P − Mechanical Data

Mechanical Data

Figure 44:

Angle Detection by Default (no zero position programmed)

90 Deg

0 Deg

S

N

270 Deg

180 Deg

N

S

Page 34

amsDatasheet

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AS5047P − Ordering & Contact Information

Ordering&ContactInformation

Figure 45:

Ordering Information

Ordering

Package

Code

Delivery

Quantity

Marking

Delivery Form

AS5047P-ATST

AS5047P-ATSM

TSSOP-14

AS5047P

13” Tape & Reel in dry pack

7” Tape & Reel in dry pack

4500

500

Buy our products or get free samples online at:

www.ams.com/ICdirect

Technical Support is available at:

www.ams.com/Technical-Support

Provide feedback about this document at:

www.ams.com/Document-Feedback

For further information and requests, e-mail us at:

ams_sales@ams.com

For sales offices, distributors and representatives, please visit:

www.ams.com/contact

Headquarters

ams AG

Tobelbaderstrasse 30

8141 Unterpremstaetten

Austria, Europe

Tel: +43 (0) 3136 500 0

Website: www.ams.com

ams Datasheet

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Document Feedback

AS5047P − RoHS Compliant & ams Green Statement

RoHS: The term RoHS compliant means that ams AG products

fully comply with current RoHS directives. Our semiconductor

products do not contain any chemicals for all 6 substance

categories, including the requirement that lead not exceed

0.1% by weight in homogeneous materials. Where designed to

be soldered at high temperatures, RoHS compliant products are

suitable for use in specified lead-free processes.

RoHS Compliant & ams Green

Statement

ams Green (RoHS compliant and no Sb/Br): ams Green

defines that in addition to RoHS compliance, our products are

free of Bromine (Br) and Antimony (Sb) based flame retardants

(Br or Sb do not exceed 0.1% by weight in homogeneous

material).

Important Information: The information provided in this

statement represents ams AG knowledge and belief as of the

date that it is provided. ams AG bases its knowledge and belief

on information provided by third parties, and makes no

representation or warranty as to the accuracy of such

information. Efforts are underway to better integrate

information from third parties. ams AG has taken and continues

to take reasonable steps to provide representative and accurate

information but may not have conducted destructive testing or

chemical analysis on incoming materials and chemicals. ams AG

and ams AG suppliers consider certain information to be

proprietary, and thus CAS numbers and other limited

information may not be available for release.

Page 36

amsDatasheet

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AS5047P − Copyrights & Disclaimer

Copyright ams AG, Tobelbader Strasse 30, 8141

Copyrights & Disclaimer

Unterpremstaetten, Austria-Europe. Trademarks Registered. All

rights reserved. The material herein may not be reproduced,

adapted, merged, translated, stored, or used without the prior

written consent of the copyright owner.

Devices sold by ams AG are covered by the warranty and patent

indemnification provisions appearing in its General Terms of

Trade. ams AG makes no warranty, express, statutory, implied,

or by description regarding the information set forth herein.

ams AG reserves the right to change specifications and prices

at any time and without notice. Therefore, prior to designing

this product into a system, it is necessary to check with ams AG

for current information. This product is intended for use in

commercial applications. Applications requiring extended

temperature range, unusual environmental requirements, or

high reliability applications, such as military, medical

life-support or life-sustaining equipment are specifically not

recommended without additional processing by ams AG for

each application. This product is provided by ams AG “AS IS”

and any express or implied warranties, including, but not

limited to the implied warranties of merchantability and fitness

for a particular purpose are disclaimed.

ams AG shall not be liable to recipient or any third party for any

damages, including but not limited to personal injury, property

damage, loss of profits, loss of use, interruption of business or

indirect, special, incidental or consequential damages, of any

kind, in connection with or arising out of the furnishing,

performance or use of the technical data herein. No obligation

or liability to recipient or any third party shall arise or flow out

of ams AG rendering of technical or other services.

ams Datasheet

Page 37

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Document Feedback

AS5047P − Document Status

Document Status

Product Status

Definition

Information in this datasheet is based on product ideas in

the planning phase of development. All specifications are

design goals without any warranty and are subject to

change without notice

Product Preview

Pre-Development

Information in this datasheet is based on products in the

design, validation or qualification phase of development.

The performance and parameters shown in this document

are preliminary without any warranty and are subject to

change without notice

Preliminary Datasheet

Datasheet

Pre-Production

Production

Information in this datasheet is based on products in

ramp-up to full production or full production which

conform to specifications in accordance with the terms of

ams AG standard warranty as given in the General Terms of

Trade

Information in this datasheet is based on products which

conform to specifications in accordance with the terms of

ams AG standard warranty as given in the General Terms of

Trade, but these products have been superseded and

should not be used for new designs

Datasheet (discontinued)

Discontinued

Page 38

amsDatasheet

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[v1-00] 2014-Oct-31

AS5047P − Revision Information

Revision Information

Changes from 0-02 (2014-Oct-30) to current revision 1-00 (2014-Oct-31)

Page

Initial version for release

Note(s) and/or Footnote(s):

1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision.

2. Correction of typographical errors is not explicitly mentioned.

ams Datasheet

[v1-00] 2014-Oct-31

Page 39

Document Feedback

AS5047P − Content Guide

1

2

General Description

Key Benefits & Features

Applications

Content Guide

Block Diagram

3

5

6

7

8

Pin Assignment

Absolute Maximum Ratings

Electrical Characteristics

Magnetic Characteristics

System Characteristics

Timing Characteristics

9

Detailed Description

Power Management

10 Dynamic Angle Error Compensation

11 SPI Interface (slave)

11 SPI Timing

12 SPI Transaction

15 Volatile Registers

17 Non-Volatile Registers (OTP)

20 ABI Incremental Interface

22 UVW Commutation Interface

23 PWM

24 Hysteresis

24 Automatic Gain Control (AGC) and CORDIC Magnitude

24 Diagnostic Features

25 OCF error / COF error

25 MAGH error /MAGL error

26 Application Information

26 Burn and Verification of the OTP Memory

32 Package Drawings & Markings

34 Mechanical Data

35 Ordering & Contact Information

36 RoHS Compliant & ams Green Statement

37 Copyrights & Disclaimer

38 Document Status

39 Revision Information

Page 40

amsDatasheet

Document Feedback

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型号：	AS5047P-ATSM
厂家：	AMS(艾迈斯)
描述：	14-bit On-Axis Magnetic Rotary Position Sensor with 12-Bit Decimal
文件：	总40页 (文件大小：539K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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