AS5047U [AMSCO]
14-Bit On-Axis Magnetic Rotary Position Sensor with Up to 14-Bit Binary Incremental Pulse Count;型号: | AS5047U |
厂家: | AMS(艾迈斯) |
描述: | 14-Bit On-Axis Magnetic Rotary Position Sensor with Up to 14-Bit Binary Incremental Pulse Count |
文件: | 总51页 (文件大小:788K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AS5047U
14-Bit On-Axis Magnetic Rotary
Position Sensor with Up to 14-Bit
Binary Incremental Pulse Count
The AS5047U is a high-resolution rotary position sensor for fast
absolute angle measurement over a full 360-degree range. This
new position sensor is equipped with a revolutionary
integrated dynamic angle error compensation (DAEC™) with
almost 0 latency at higher rotational speed. For increased signal
quality at lower rotational speed, the dynamic filter system
(DFS™) reduces transition noise.
General Description
The robust design of the device suppresses the influence of any
homogenous external stray magnetic field. A standard 4-wire
SPI serial interface with a CRC protection allows a host
microcontroller to read 14-bit absolute angle position data
from the AS5047U and to program non-volatile settings without
a dedicated programmer.
Incremental movements are indicated on a set of ABI signals
with a maximum resolution of 16989 steps / 4096 pulses per
revolution.
Brushless DC (BLDC) motors are controlled through a standard
UVW commutation interface with a programmable number of
pole pairs from 1 to 7. The absolute angle position is also
provided as PWM-encoded output signal.
AS5047U are single die sensors and are available in a TSSOP14
Package.
Ordering Information and Content Guide appear at end of
datasheet.
Key Benefits & Features
The benefits and features of this device are listed below:
Figure 1:
Added Value of Using the AS5047U
Benefits
Features
• DAEC ™ Dynamic angle error compensation
• DFS ™ Dynamic filter system
• Easy to use – saving costs on DSP
• Higher durability and lower system costs (no
shield needed)
• Magnetic stray field immunity
• Versatile choice of the interface
• Independent output interfaces: SPI, ABI, UVW, PWM
ams Datasheet
[v1-00] 2018-Oct-30
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AS5047U − General Description
Applications
The AS5047U supports BLDC motor commutation for the most
challenging industrial applications such as:
• Factory automation
• Building automation
• Robotics
• PMSM (permanent magnet synchronous motor)
• Stepper motor closed loop
• Optical encoder replacement
Block Diagram
The functional blocks of the AS5047U are shown below:
Figure 2:
AS5047U Block Diagram
VDD3V3
Volatile
CSn
Memory
SCL
SPI
MISO
MOSI
OTP
VDD
LDO
P2ram_err
or
CRC
A
ABI
B
OffCompN
otFinished
Cordic
Overflow
I/PWM
14-Bit ADC
14-Bit ADC
U
V
Adaptive
Filter
Interpolator
AFE
CORDIC
DAEC
UVW
PWM
W/PWM
Hall sensor
array
AGC
AGC-
warning
WDTST
Oscillator
AS5047U
GND
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AS5047U − Pin Assignment
Pin Assignment
Figure 3:
TSSOP-14 Pin Assignment
CSn
I/PWM
GND
VDD3V3
VDD
1
14
13
12
11
10
9
CLK
MISO
MOSI
TEST
B
2
3
4
5
6
7
U
V
A
8
W/PWM
Figure 4:
AS5047U Pin Description
Pin Number
Pin Name
Pin Type
Description
(1)
(1)
(2)
1
2
CSn
CLK
MISO
MOSI
TEST
B
Digital input
Digital input
SPI chip select (active low)
(3)
SPI clock
(4)
(3)
3
Digital output
SPI master data input, slave output
(1)
4
Digital input
SPI master data output, slave input
Test pin (connect to ground)
5
(5)
6
Digital output
Digital output
Digital output
Digital output
Digital output
Power supply
Incremental signal B
(5)
7
A
Incremental signal A
(5)
8
W/PWM
V
Commutation signal W or PWM-encoded output
(5)
9
Commutation signal V
(5)
10
11
U
Commutation signal U
VDD
5V power supply voltage for on-chip regulator
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AS5047U − Pin Assignment
Pin Number
Pin Name
Pin Type
Description
3.3V on-chip low-dropout (LDO) output. Requires an
external decoupling capacitor (1μF)
12
VDD3V3
Power supply
13
14
GND
Power supply
Digital output
Ground
(5)
I/PWM
Incremental signal I (index) or PWM
Note(s):
1. Floating state of a digital input is not allowed.
2. If SPI is not used, a pull-up resistor on CSn is required.
3. If SPI is not used, a pull-down resistor on CLK and MOSI is required.
4. If SPI is not used, the pin MISO can be left open.
5. If ABI, UVW or PWM is not used, the pins can be left open.
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AS5047U − Absolute Maximum Ratings
Stresses beyond those listed under Absolute Maximum Ratings
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress
ratings only. Functional operation of the device at these or any
other conditions beyond those indicated under Operational
Conditions is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device
reliability.
Figure 5:
Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Units
Comments
Electrical Parameters
VDD5
VDD3
DC Supply Voltage at VDD pin
-0.3
-0.3
7.0
5.0
V
V
Not operational
DC Supply Voltage at
VDD3V3 pin
Not operational
DC Supply Voltage at GND
pin
V
-0.3
0.3
VDD+0.3
100
V
V
SS
V
Input Pin Voltage
in
Input Current
(latch-up immunity)
I
-100
mA
AEC-Q100-004
scr
Total Power Dissipation
Total Power Dissipation
(all supplies and outputs)
P
150
mW
kV
T
Electrostatic Discharge
ESD
Electrostatic Discharge HBM
2
AEC-Q100-002
HBM
Temperature Ranges and Storage Conditions
Operating Temperature
Range
T
-40
150
45
°C
°C
Ambient temperature
AMB
Programming @ room
temperature (25°C 20°C)
T
Programming Temperature
5
aProg
T
Storage Temperature Range
Package Body Temperature
-55
150
260
°C
°C
STRG
T
IPC/JEDEC J-STD-020
BODY
Relative Humidity
(non-condensing)
RH
5
85
%
NC
Represents a maximum floor
lifetime of 168h
MSL
Moisture Sensitivity Level
3
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AS5047U − Electrical Characteristics
All in this datasheet defined tolerances for external
components need to be assured over the whole operation
conditions range and also over lifetime.
Electrical Characteristics
Overall condition: T
= -40°C to 150°C components spec;
AMB
unless otherwise noted.
Figure 6:
Operational Conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VDD5
Positive supply voltage 5.0V operation mode
3.3V operation mode;
4.5
5.0
5.5
V
from -40°C to 150°C
(NOISESET bit has to
set)
VDD3V3
Positive supply voltage
3.0
3.3
3.6
3.5
V
V
Supply voltage
required for
programming in 3.3V
operation
VDD_Burn
Positive supply voltage
3.3
3.2
Voltage at VDD3V3
Regulated voltage
V
3.4
3.6
16
V
mA
V
REG
pin if VDD ≠ VDD3V3
I
Supply current
DD
High-level input
voltage
V
0.7 × VDD
IH
V
Low-level input voltage
0.3 × VDD
V
IL
High-level output
voltage
V
VDD - 0.5
V
OH
Low-level output
voltage
V
V
+ 0.4
SS
V
OL
C_L
50
pF
Output current 5 V
I_Out_5V
4
2
mA
(1)
operation
Output current 3 V
I_Out_3V
mA
(1)
operation
Note(s):
1. Only applicable for digital output pins I/PWM, A, B, U, V, W/PWM, MISO.
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AS5047U − Electrical Characteristics
Magnetic Characteristics
Figure 7:
Magnetic Characteristics
Symbol
Parameter
Conditions
Min Typ Max Unit
Required orthogonal component of
the magnetic field strength
measured at the package surface
along a circle of 1.1mm
Orthogonal Magnetic
Field Strength
Bz
35
70
mT
System Specifications
Figure 8:
System Specifications
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Core and resolution on
SPI
RES
14
bit
Programmable with
register setting
(ABIRES)
Resolution of the ABI
interface
RES_ABI
25
4096
0.8
steps
Non-linearity, optimum
placement of the
magnet
INL
@ 25°C
0.4
0.6
degree
OPT
Non-linearity, optimum
placement of magnet
and temperature -40°C
to 150°C
INL
1
degree
degree
OPT+TEMP
Assuming N35H
Magnet
(D=8mm, H=3mm)
500μm displacement
in x and y
Non-linearity @
displacement of
magnet and
temperature -40°C to
150°C
INL
1.2
DIS+TEMP
z-distance = 2000μm
RMS output noise
Orthogonal
without filter (1 sigma)
on SPI, ABI, PWM and
UVW. Not tested,
component for the
magnetic field within
the specified range
(Bz), NOISESET= 0
ONL
ONH
0.034
0.041
0.068
degree
guaranteed by design
RMS output noise
Orthogonal
without filter (1 sigma)
on SPI, ABI, PWM and
UVW. Not tested,
component for the
magnetic field within
the specified range
(Bz), NOISESET = 1
0.082
110
degree
μs
guaranteed by design
System propagation
delay –core
t
Reading angle via SPI
90
delay
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AS5047U − Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Residual system
propagation delay after
dynamic angle error
correction
t
At ABI, UVW and SPI
-1.9
1.9
μs
delay_DAEC
Refresh time at
SPI(ANGLECOM), ABI,
UVW
Refresh time of DAEC
output
t
202
222
247
ns
refresh
At 1700 rpm constant
speed
DAE
Dynamic angle error
0.02
degree
1700
At 28000 rpm
constant speed
DAE
Dynamic angle error
Maximum speed
0.32
degree
rpm
max
MS
28000
Reference magnet: N35H, 8mm diameter; 3mm thickness.
Magnet in the Bz range.
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AS5047U − Timing Characteristics
Timing Characteristics
Figure 9:
Timing Specifications
Symbol
Parameter
Conditions
Min
Typ
Max Units
Guaranteed by design. Time between
t
VDD > VDD
and the first valid
Power-on time
10
ms
pon
min
outcome
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AS5047U − Detailed Description
The AS5047U is a Hall-effect magnetic sensor using a CMOS
technology. The Hall sensors convert the magnetic field
component perpendicular to the surface of the chip into
voltage.
Detailed Description
The signals from the Hall sensors are amplified and filtered by
the analog front-end (AFE) before being converted by the
analog-to-digital converter (ADC). The output of the ADC is
processed by the hardwired CORDIC (coordinate rotation
digital computer) block to compute the angle and magnitude
of the magnetic vector. The intensity of the magnetic field
(magnitude) used by the automatic gain control (AGC) to adjust
the amplification level for compensation of the temperature
and magnetic field variations.
The AS5047U generates continuously the angle information,
which can be requested by the different interfaces of the device.
The internal 14-bit resolution is available by readout register
via the SPI interface. The resolution on the ABI output can be
programmed for 10 to 14 bits.
The Dynamic Angle Error Compensation block corrects the
calculated angle regarding latency by using a linear prediction
calculation algorithm. At constant rotation speed the latency
time is internally compensated by the AS5047U, reducing the
dynamic angle error at the SPI, ABI and UVW outputs.
The adaptive filter block is implemented after the
compensation block and reduces the transition noise at low
rotation speed. The stable information is available on SPI, ABI
and UVW.
AS5047U allows selecting between a UVW output interface and
a PWM encoded interface on the W pin.
The non-volatile settings in the AS5047U is programmed
through the SPI interface without any dedicated programmer.
The AS5047U can support high-speed application up to
28krpm.
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AS5047U − Detailed Description
Power Management
The AS5047U can be either powered from a 5.0V supply using
the on-chip low-dropout regulator or from a 3.3V voltage
supply. The LDO regulator is not intended to power any other
loads, and it needs a 1μF capacitor to ground located close to
chip for decoupling as shown in Figure 11.
In 3.3.V operation, VDD and VREG shall connected together. In
this configuration, normal noise performance (ONL) is available
at reduced maximum temperature (125°C) by clearing
NOISESET to 0. When NOISESET is set to 1, the full temperature
range is available with reduced noise performance (ONH).
Figure 10:
Temperature Range and Output Noise Without Filtering in 3.3V and 5.0V Mode
VDD (V)
5.0
NOISESET
Temperature Range (°C)
-40 to 150
RMS Output Noise (degree)
0
0
1
0.068
0.068
0.082
3.3
-40 to 125
3.3
-40 to 150
Figure 11:
5.0V and 3.3V Power Supply Options
5.0V Operation
3.3 V Operation
VDD
GND
VDD3V3
3.0 – 3.6V
100nF
VDD
GND
LDO
VDD3V3
LDO
1uF
100nF
AS5ꢀ47U
AS5ꢀ47U
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AS5047U − Detailed Description
Dynamic Angle Error Compensation
The AS5047U uses 4 integrated Hall sensors which produce a
voltage proportional to the orthogonal component of the
magnetic field to the die. These voltage signals are amplified,
filtered, and converted into the digital domain to allow the
CORDIC digital block to calculate the angle of the magnetic
vector. The propagation of these signals through the analog
front-end and digital back-end generates a fixed delay between
the time of measurement and the availability of the measured
angle at the outputs. This latency generates a dynamic angle
error represented by the product of the angular speed (ω) and
the system propagation delay (t
):
delay
(EQ1)
DAE = ω x t
delay
The dynamic angle compensation block calculates the current
magnet rotation speed (ω) and multiplies it with the system
propagation delay (t
) to determine the correction angle to
delay
reduce this error. At constant speed, the residual system
propagation delay is t
.
delay_DAEC
The angle represented on the PWM interface is not
compensated by the Dynamic Angle Error Compensation
algorithm. It is also possible to disable the Dynamic Angle Error
Compensation with the DAECDIS setting. Disabling the
Dynamic Angle Error Compensation gives a noise benefit of
0.016 degree rms. This setting can be advantageous for low
speed (under 100 RPM) respectively static positioning
applications.
Adaptive Filter System
The AS5047U uses an implemented adaptive filter system,
which reduces the transition noise.
The filter works dynamically depending on acceleration
(positive and negative acceleration) of rotating system. It is able
to match the right filter coefficients automatically.
The filter coefficients (K value), which define also the limits in
which the filters is acting, can be set in the OTP (K_min= 0x00
and K_max=0x00 by default).In addition, there is the possibility
to turn off the filter in the OTP.
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AS5047U − Detailed Description
Figure 12:
Noise vs K Values
K_min
K_max
0
1
2
3
4
5
6
Filter coefficient (K values)
For detailed application information please refer to the
Application Note: AS5x47U_Adaptive_Filter.
Figure 13:
K Value Configuration
K_min [LSB]
Minimum K Value
K_max [LSB]
Maximum K Value
000
001
010
011
100
101
110
111
2
3
4
5
6
0
1
1
000
001
010
011
100
101
110
111
6
5
4
3
5
1
0
0
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AS5047U − Detailed Description
Figure 14:
Adaptive Filter System Setting
Symbol
Parameter
Min
Typ
Max
Unit
Notes
Depending on K setting
in the OTP
fcorner
Corner frequency
48
3059
Hz
RMS noise (depending
on the selected K
setting)
ONFdyn
ONFstat
Noise during rotation
0.019
0.011
0.086
0.084
°
°
Noise when stand
still
Depending on K setting
in the OTP
Figure 15:
Corner Frequency vs Noise
fcorner
ONFdyn
ONFstat
K Value
Filter corner
frequency [Hz]
Noise during
rotation [degree]
Noise when stand still
[degree]
0
1
2
3
4
5
6
48
97
0.019
0.028
0.036
0.048
0.062
0.077
0.086
0.011
0.017
0.032
0.044
0.059
0.077
0.084
194
387
773
1548
3095
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AS5047U − Detailed Description
Speed Measurements
Rotation Speed Measurement
The AS5047U features an average angular velocity calculation
algorithm with 14-bit resolution. This angular velocity
information is available over SPI and can be used without
further averaging in the ECU.
Figure 16:
Angular Velocity Measurement Parameter
Symbol
Parameter
Min
Typ
Max
Unit
Notes
Velocity signal
resolution
Two's complement
value
V
14
bit
Res
Measurement range
(default)
V
-28000
28000
rpm
º/s/bit
%
Range
Velocity sensitivity
(default)
V
24.141
68.4
14-bit resolution
Sens
Based on actual
rotation speed
V
Velocity total error
Cut off frequency
5
Error
Depending on K value
(see adaptive filter
system)
F
16.9
231
Hz
Cutoff
Figure 17:
Angular Velocity Measurement Filter Parameters
Filter Setting
Typ
5.8
Unit
Notes
K=0
K=1
K=2
K=3
K=4
K=5
K=6
6
8.4
19.8
51.8
121.9
244.9
°/s
RMS noise
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AS5047U − Detailed Description
SPI Interface (Slave)
The SPI interface shall connected to a host microcontroller
(master) to read or write the volatile memory as well as to
program the non-volatile OTP registers.
The AS5047U SPI only supports slave operation mode. It
communicates at clock rates up to 10 MHz.
The AS5047U SPI uses mode=1 (CPOL=0, CPHA=1) to exchange
data. As shown in Figure 18, a data transfer starts with the
falling edge of CSn (CLK is low). The AS5047U samples MOSI
data on the falling edge of CLK. SPI commands are executed at
the end of the frame (rising edge of CSn). The bit order is MSB
first.
A CRC is protecting the SPI Data.
SPI Timing
The AS5047U SPI timing is shown in Figure 18.
Figure 18:
SPI Timing Diagram
tCSn
CSn
(Input)
tclk
tclkH
tclkL
tL
tH
CLK
(Input)
tMISO
tOZ
MISO
(Output)
Data[23]
Data[22]
Data[0]
tOZ
tMOSI
MOSI
(Input)
Data[23]
Data[22]
Data[0]
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AS5047U − Detailed Description
Figure 19:
SPI Timing
Parameter
Description
Time between CSn falling edge and CLK rising edge
Serial clock period
Min
Max
Units
ns
(1)
t
350
L
t
100
ns
clk
t
t
Low period of serial clock
50
50
ns
clkL
High period of serial clock
ns
clkH
Time between last falling edge of CLK and rising
edge of CSn
t
t
clk/2
ns
H
(1)
t
High time of SS/ between two transmissions
Data input valid to clock edge
ns
ns
ns
ns
350
CSn
t
t
20
MOSI
MISO
CLK edge to data output valid
51
10
t
Time between CSn rising edge and MISO HiZ
OZ
Note(s):
1. Synchronization with the internal clock → 2 * tCLK_SYS + 10ns (e.g. at 9 MHz → 232ns)
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AS5047U − Detailed Description
SPI Transaction
AS5047U provides two different SPI transactions
• 16-bit SPI frame without CRC (for high throughput)
• 24-bit SPI frames with CRC
• 32-bit SPI frames with CRC. The 32-bit SPI frames includes
8-bit PAD word.
For high-throughput requirements, the AS5047U can handle
16-bit frames for read operations. This allows reading more than
400000 angle positions per second.
Figure 20:
16-Bit SPI Frame
CSn
15 14 13
0
0
R
ADDR[13:0]
MOSI
MSB
LSB
15 14 13
ER
0
RDATA[13:0]
MISO
MSB
LSB
Figure 21:
16-Bit Command Frame
Bit
15
Name
Description
0
Do not Care
1: Read
14
R
13:0
ADDR[13:0]
Address
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AS5047U − Detailed Description
Figure 22:
16-Bit Data Frame
Bit
15
Name
ER
Description
Warning Bit
Error Bit
Data
14
13:0
DATA[13:0]
24-Bit SPI frames and 32-Bit SPI frames have CRC for increased
reliability of communication over the SPI. A wrong setting of
the calculation / setting of the CRC causes a CRC error, which
sets the CRCERR bit in the error flag register.
Figure 23:
24-Bit SPI Frame
CSn
23
0
21
8 7
8 7
0
RW
ADDR[13:0]
CRC-8
CRC-8
MOSI
MISO
MSB
LSB
0
23 22 21
ER
RDATA[13:0]
MSB
LSB
Figure 24:
24-Bit Command Frame
Bit
Name
Description
23
0
Do not Care
0: Write
1: Read
22
RW
21:8
7:0
ADDR[13:0]
CRC
Address
Calculated CRC
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AS5047U − Detailed Description
Figure 25:
24-Bit Data Frame
Bit
23
Name
Description
Warning Bit
Error Bit
ER
22
21:8
7:0
DATA[13:0]
CRC
Data
Calculated CRC
The 32-Bit Frames have a PAD Word, which is applicable for
operation in daisy chain mode.
Figure 26:
32-Bit SPI Frame
CSn
31
23 22 21
8 7
8 7
0
0
RW
PAD[n-1:0]
ADDR[13:0]
CRC-8
MOSI
MSB
LSB
0
31 30 29
ER
16 15
RDATA[13:0]
CRC-8
PAD[n-1:0]
MISO
MSB
LSB
Figure 27:
32-Bit Command Frame
Bit
31:24
23
Name
PAD
0
Description
PAD Number
Do Not care
0: Write
1: Read
22
RW
21:8
7:0
ADDR[13:0]
CRC
Address
Calculated CRC
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AS5047U − Detailed Description
Figure 28:
32-Bit Data Frame
Bit
31
Name
Description
Warning Bit
Error Bit
ER
30
29:16
15:8
7:0
RW
ADDR[13:0]
CRC
Data
Calculated CRC
PAD Number
The data sent on the MISO pin. The CRC is calculated by the
AS5047U. If an error or a warning is detected in the previous SPI
command frame, the Error/Warning bit is set high. The SPI read
is synchronized on the rising edge of CSn and the data is
transmitted on MISO with the next read command, as shown in
Figure 29.
Figure 29:
SPI Read
CSn
Command
Command
Command
Command
Read ADD[m]
Read ADD[n]
Read ADD[o]
Read ADD[p]
MOSI
MISO
Data
Data
Data
DATA (ADD[m])
DATA (ADD[n])
DATA (ADD[o])
Recommended CRC calculation see chapter CRC Checksum
In an SPI write transaction, the write command frame is
followed by a write data frame at MOSI. The write data frame
consists of the new content of register which address is in the
command frame. During the new content is transmitted on
MOSI by the write data frame, the old content is send on MISO.
At the next command on MOSI the actual content of the register
is transmitted on MISO, as shown in Figure 30.
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AS5047U − Detailed Description
Figure 30:
SPI Write
CSn
Command
Data to write into ADD[n]
Command
Data to write into ADD[m]
Command
Next
Write ADD[n]
DATA (x)
Write ADD[m]
DATA (y)
MOSI
MISO
command
New Data content
of ADD[n]
New Data content
of ADD[m]
Data content ADD[n]
Data content ADD[m]
DATA (ADD[n])
DATA (x)
DATA (ADD[m])
DATA (y)
PAD Word
Any number of PAD [8*n-1:0] bits can precede the MOSI data.
The PAD word is used to allocate the data on MISO to the correct
device.
CRC Checksum
For secure and reliable data transmission, the 24-Bit and 32-Bit
frames have a CRC for verification of correct transmission. The
CRC is calculated out of the payload of SPI frames (e.g.: CRC is
calculated out of bit 23:8 from 24-bit command frame)
The calculation of the CRC is based on Irreducible polynomial
x^8+x^4+x^3+x^2+1 according to standard J1850.
The initialization CRC = 0xFF prevents that 0x000000 is a valid
SPI command. This command would clear all sticky error flags.
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AS5047U − Detailed Description
Volatile Registers
The volatile registers are shown in Figure 31. Each register has
a 14-bit address.
Figure 31:
Volatile Memory Register Description
Address
0x0000
Name
NOP
Default
0x0000
0x0000
0x0000
Description
No operation
0x0001
ERRFL
PROG
Error register
0x0003
Programming register
0xX3C2 or 0xXBC2 for
3.3V mode
0xX3C3 or 0xXBC3 for
5 V mode
0x3FF5
DIA
DIAGNOSTIC
0x3FF9
0x3FFA
0x3FFB
0x3FFC
0x3FFD
AGC
Sin-data
Cos-data
VEL
0x0000
0x0000
0x0000
0x0000
0x0000
AGC Value
Raw digital sine channel data
Raw digital cosine channel data
Velocity
MAG
CORDIC magnitude
Measured angle without dynamic
angle error compensation
0x3FFE
0x3FFF
0x00D1
ANGLEUNC
ANGLECOM
0x0000
0x0000
0x0000
Measured angle with dynamic angle
error compensation
ECC checksum calculated based on
actual register setting
ECC_Checksum
Figure 32:
ERRFL (0x0001)
Name
Read/Write
Bit Position
Description
CORDIC
Overflow
R
10
Reading the Overflow Bit of the CORDIC
OffCompNotFi
nished
In case the flag is 1 the internal offset compensation
is not finished
R
9
8
Not used
N/A
No function. Bit Setting: 0
Watchdog information. In case the flag sets to 1, the
internal oscillator or the watchdog is not working
correctly
WDTST
R
R
7
6
CRC error
CRC error during SPI communication
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AS5047U − Detailed Description
Name
Read/Write
Bit Position
Description
Command_
error
R
R
R
5
4
3
SPI invalid command received
Framing error
P2ram_error
Framing if SPI communication wrong
ECC has detected 2 uncorrectable errors in P2RAM in
customer area
P2ram_
warning
R
R
2
1
ECC is correcting one bit of P2RAM in customer area
This flag sets to 1 in case the AGC Value reaches 255
LSB and the magnitude value is the half of the of the
regulated magnitude value (between AGC = 0LSB
and AGC = 255LSB) which is typical 4800LSB.
MagHalf
Agc-warning=1. The flag sets to 1 in case the AGC
Value reaches 0LSB or 255LSB. The detailed
information which level is reached can be found in
the diagnostic register.
Agc-warning
R
0
Reading the ERRFL register automatically clears its contents
(ERRFL=0x0000).
In case of an error flag, a read of the DIA register is mandatory.
Figure 33:
PROG (0x0003)
Name
PROGVER
PROGOTP
OTPREF
Read/Write
R/W
Bit Position
Description
Program verify: Must be set to 1 for verifying the
correctness of the OTP programming
6
3
2
R/W
Start OTP programming cycle
Refreshes the non-volatile memory content with the
OTP programmed content
R/W
Program OTP enable: Enables reading / writing the OTP
memory
PROGEN
R/W
0
The PROG register is used for programming the OTP memory.
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AS5047U − Detailed Description
Figure 34:
DIA(0x3FF5)
Name
SPI_cnt
Read/Write
Bit Position
Description
R
N/A
R
11:12
10
SPI frame counter
Not used
No function. Bit Setting: 0
Initial AGC settling finished
AGC_finished
9
Off comp
finished
R
8
Error flag offset compensation finished
SinOff_fin
CosOff_fin
R
R
R
R
R
R
R
7
6
5
4
3
2
1
Sine offset compensation finished
Cosine offset compensation finished
Error flag magnitude is below half of target value
Warning flag AGC high
MagHalf_flag
Comp_h
Comp_l
Warning flag AGC low
Cordic_overflow
LoopsFinished
Error flag CORDIC overflow
All Magneto Core loops finished
VDD supply mode:
0: VDD 3.3 Mode
1: VDD 5.0 Mode
Vdd_mode
R
0
Figure 35:
AGC(0x3FF9)
Description
Name
Read/Write
Bit Position
AGC
R
7:0
8-Bit AGC value
Figure 36:
VEL(0x3FFC)
Description
Name
Read/Write
Bit Position
Vel
R
13:0
Velocity value (14-bit signed integer)
Figure 37:
MAG (0x3FFD)
Description
Name
Read/Write
Bit Position
Mag
R
13:0
CORDIC magnitude information
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AS5047U − Detailed Description
Figure 38:
ANGLEUNC (0x3FFE)
Name
Read/Write
Bit Position
Description
Angle information without dynamic angle error
compensation
ANGLEUNC
R
13:0
Figure 39:
ECC_s (0x3FD0)
Name
Read/Write
Bit Position
Description
ECC_s
R
6:0
Calculated ECC checksum
Figure 40:
ANGLECOM(0x3FFF)
Name
Read/Write
Bit Position
Description
Angle information with dynamic angle error
compensation
ANGLECOM
R
13:0
Non-Volatile Registers (OTP)
The OTP (One-Time Programmable) memory is used to store the
absolute zero position of the sensor and the customer settings
permanently in the sensor IC. SPI write/read access is possible
several times for all non-volatile registers (soft write). Soft
written register content will be lost after a hardware reset. The
programming itself can be done just once. Therefore the
content of the non-volatile registers is stored permanently in
the sensor. The register content is still present after a hardware
reset and cannot be overwritten. For a correct function of the
sensor the OTP programming is not required. If no
configuration or programming is done, the non-volatile
registers are in the default state 0x0000.
Figure 41:
Non-Volatile Register Table
Address
0x0015
0x0016
0x0017
0x0018
Name
Default
0x0000
0x0000
0x0000
0x0000
Description
Outputs and filter disable register
Zero position MSB
DISABLE
ZPOSM
ZPOSL
Zero position LSB/ MAG diagnostic
Custom setting register 1
SETTINGS1
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AS5047U − Detailed Description
Address
0x0019
Name
Default
0x0000
0x0000
0x0000
Description
SETTINGS2
SETTINGS3
ECC
Custom setting register 2
0x001A
0x001B
Custom setting register 3
ECC Settings
Figure 42:
DISABLE (0x0015)
Description
Name
Read/Write/Program
Bit Position
0: Normal mode (default)
1: Switch UVW output off (tristate)
UVW_off
RW
0
0: Normal mode (default)
1: Switch ABI output off (tristate)
ABI_off
na
RW
RW
RW
1
2:5
6
Default=0
0: Filter enabled (default)
1: Filter disabled
FILTER_disable
Figure 43:
ZPOSM (0x0016)
Description
Name
Read/Write/Program Bit Position
ZPOSM
R/W/P
7:0
8 most significant bits of the zero position
Figure 44:
ZPOSL (0x0017)
Name
Read/Write/Program Bit Position
Description
ZPOSL
R/W/P
R/W/P
5:0
6
6 least significant bits of the zero position
Default=0; only applicable for automotive
version AS5147U
Dia1_en
Dia2_en
Default=0; only applicable for automotive
version AS5147U
R/W/P
7
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AS5047U − Detailed Description
Figure 45:
SETTINGS1 (0x0018)
Name
K_max
K_min
Read/Write/Program Bit Position
Description
R/W/P
R/W/P
2:0
5:3
K max for adaptive filter setting
K min for adaptive filter setting
Default=0; only applicable for automotive
version AS5147U
Dia3_en
Dia4_en
R/W/P
R/W/P
6
7
Default=0; only applicable for automotive
version AS5147U
Figure 46:
SETTINGS2 (0x0019)
Name
Read/Write/Program Bit Position
Description
0: 3 pulses
1: 1 pulses
IWIDTH
R/W/P
0
NOISESET
DIR
R/W/P
R/W/P
1
2
Noise setting for 3.3V operation at 150°C
Rotation direction
Defines the PWM output
UVW_ABI
R/W/P
3
(0=ABI is operating, W is used as PWM)
(1=UVW is operating, I is used as PWM)
Disable dynamic angle error compensation
(0=DAE compensation ON,
1=DAE compensation OFF)
DAECDIS
ABI_DEC
R/W/P
R/W/P
4
5
ABI setting to decimal count
This bit defines which data can be read from
address 16383dec (3FFFhex)
0-> ANGLECOM
Data_select
PWMon
R/W/P
R/W/P
6
7
1-> ANGLEUNC
Enables PWM (setting of UVW_ABI bit
necessary)
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AS5047U − Detailed Description
Figure 47:
SETTINGS3 (0x001A)
Name
UVWPP
HYS
Read/Write/Program Bit Position
Description
R/W/P
R/W/P
R/W/P
2:0
4:3
7:5
UVW number of pole pairs
Hysteresis
ABIRES
Resolution of ABI
Figure 48:
ECC (0x001B)
Read/Write/
Program
Bit
Position
Name
Description
ECC_chsum
ECC_en
R/W/P
R/W/P
6:0
7
ECC checksum
Enables ECC
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AS5047U − Detailed Description
ABI Incremental Interface
The AS5047U can send the angle position to the host
microcontroller through an incremental interface. This
interface is available simultaneously with the other interfaces.
By default, the incremental interface is set to work at a 12-bit
resolution which corresponds to 4096 steps per revolution or
1024 pulses per revolution (ppr). This resolution can be
changed with the OTP bits ABIRES. The phase shift between the
A and B signals indicates the rotation direction: clockwise (A
leads, B follows) or counterclockwise (B leads, A follows). During
the start-up time, after power on to the chip, all three ABI signals
are high. The DIR bit can be used to invert the sense of the
rotation direction.
The IWIDTH setting programs the width of the index pulse from
3 LSB (default) to 1 LSB.
Figure 49:
ABI Signals
A
B
I
N-7 N-6 N-5 N-4 N-3 N-2 N-1
0
1
2
3
4
5
6
7
8
7
6
5
4
3
2
1
0 N-1 N-2 N-3 N-4
Steps
Clockwise rotation
Counter-clockwise rotation
N= 16384 for 14-Bit resolution, N = 4096 for 12-bit resolution
and N = 1024 for 10-bit resolution..
The Figure 49 shows the ABI signal flow if the magnet rotates
in clockwise direction and counter-clockwise direction (DIR=0).
The rotation direction of the magnet is defined as clockwise
(DIR=0) when the view is from the topside of AS5047U.
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AS5047U − Detailed Description
Figure 50:
ABI Settings
ABIRES [LSB]
SETTINGS3
(0x001A)
ABI_DEC
SETTINGS2
(0x0019)
ABI_Pulses
ABI Resolution [LSB]
100
011
000
001
010
000
001
010
011
100
101
110
111
0
0
0
0
0
1
1
1
1
1
1
1
1
4096
2048
1024
512
256
1000
500
400
300
200
100
50
16384
8192
4096 (default value)
2048
1024
4000
2000
1600
1200
800
400
200
25
100
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AS5047U − Detailed Description
UVW Commutation Interface
The AS5047U can emulate the UVW signals generated by the
three discrete Hall switches commonly used in BLDC motors.
The UVWPP field in the SETTINGS3 register selects the number
of pole pairs of the motor (from 1 to 7 pole pairs). The UVW
signals are generated based on14-bit core resolution.
During the start-up time, after power on of the chip, the UVW
signals are low.
Figure 51:
UVW Signals
U
V
W
angle 0°
60°
120°
180°
240°
300°
360°
360° 300°
240°
180°
120°
60°
0°
Clockwise rotation
Counter-clockwise rotation
The Figure 51 shows the UVW signal flow if the magnet rotates
in clockwise direction and counter-clockwise direction (DIR=0).
The rotation direction of the magnet is defined as clockwise
(DIR=0) when the view is from the topside of AS5047U. With the
bit DIR, it is possible to invert the rotation direction.
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AS5047U − Detailed Description
Figure 52:
UVW Settings
UVWPP [LSB]
Pole Pairs
1pp (default)
2pp
000
001
010
011
100
101
110
111
3pp
4pp
5pp
6pp
7pp
7pp
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AS5047U − Detailed Description
PWM
The PWM can be enabled with the bit setting PWMon. The PWM
encoded signal is displayed on the pin W or the pin I. The bit
setting UVW_ABI defines which output is used as PWM. The
PWM output consists of a frame of 4119 PWM clock periods, as
shown in Figure 53. The PWM frame has the following sections:
• 12 PWM clock periods for INIT
• 4 PWM clock periods for error detection
• 4095 PWM clock periods of data
• 8 PWM clock periods low
The angle is represented in the data part of the frame with a
12-bit resolution. One PWM clock period represents 0.088
degree and has a typical duration of 444 ns.
If the embedded diagnostic of the AS5047U detects any error
the PWM interface displays only 12 clock periods high
(0.3% duty-cycle). Respectively the 4 clocks for error detection
are forced to low.
Figure 53:
Pulse Width Modulation Encoded Signal
frame
4 clock
time
12 clock periods periods
4095 clock periods
data
8 clock periods
low
high
Error
detection
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AS5047U − Detailed Description
Hysteresis
The hysteresis can be programmed in the HYS bits of the
SETTINGS3 register. The hysteresis can be 1, 2, or 3 LSB bits,
based on 11-bit resolution.
Figure 54:
Hysteresis Settings
Hysteresis Related to 11-Bit
HYS
ABI Resolution
00
01
10
11
1
2
3
0
Automatic Gain Control (AGC) and CORDIC
Magnitude
The AS5047U uses AGC to compensate for variations in the
magnetic field strength due to changes of temperature, air gap
between the chip and the magnet, and demagnetization of the
magnet. The automatic gain control value can be read in the
AGC field of the AGC register. Within the specified input
magnetic field strength (Bz), the Automatic Gain Control keeps
the CORDIC magnitude value (MAG) constant.
If magnetic field strength is out of specifications, the AGC has
its limits reached and the Agc-warning bit is set. When the
magnetic field strength is decreasing more then AGC can
control, the CORDIC magnitude is also decreasing.
If the CORDIC magnitude decreases lower than half of the target
magnet, the error flag MagHalf_flag is set.
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AS5047U − Detailed Description
ECC
The ECC (Error Code Correction) is a mechanism which protects
the customer settings.
The ECC protection is active whenever ECC_en=1. ECC_en is the
error corrected counterpart of the P2RAM bit en and is found
in register ECC_STATUS. Whenever a bit error occurs, this is
reported by the status register ERRFL [2:3]. Single bit errors are
corrected immediately and do not influence the correct
operation of the sensor. If either a single or double errors are
detected, the next SPI MISO frame will report this to the
software by setting flags error=1 (double bit error) or
warning=1 (single bit error). Warning and error are sticky flags,
which guarantees that spurious P2RAM errors are certainly
reported.
The ECC Protection is activated with the following steps:
• Writing uses data into the register and set ECC_en to high.
• Reading ECC_s from register 0x3FD0 and set the value into
ECC_chsum. Do not overwrite the ECC_en
• Programming the part.
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AS5047U − Application Information
Application Information
Burn and Verification of the OTP Memory
Figure 55:
Minimum Programming Diagram for the AS5047U with 5V Supply Voltage
VDD during programming 4.5 – 5.5V
VDD
I
CSn
CLK
GND
MISO
VDD3V
MOSI
TEST
A
VDD
U
Programmer
V
100nF
1μF
B
W
GND
Note(s):
1. In terms of EMC and for remote application, additional circuits are necessary.
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AS5047U − Application Information
Figure 56:
Minimum Programming Diagram for the AS5047U with 3.3V Supply Voltage
VDD during programming: 3.3V – 3.5V
VDD
I
CSn
CLK
GND
VDD3V
MISO
MOSI
VDD
U
TEST
Programmer
A
V
100nF
B
W
GND
Note(s):
1. In terms of EMC and for remote application, additional circuits are necessary.
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AS5047U − Application Information
Figure 57:
Programming Parameter
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Programming @ Room
Temperature
(25°C 20°C)
Programming
temperature
T
5
45
°C
aProg
Positive supply
voltage
5 V operation mode. Supply
voltage during programming
V
4.5
3.3
5
5.5
3.5
V
V
DD
Positive supply
voltage
3.3 V operation mode. Supply
voltage during programming
V
DD
Current for
programming
Max current during OTP burn
procedure.
I
100
mA
Prog
Note(s):
1. Programming parameter valid for AS5047U.
Step-by-Step Procedure to Permanently
Program the Non-Volatile Memory (OTP):
The programming can either be performed in 5V operation
using the internal LDO (1μF on regulator output pin), or in 3V
Operation but using a supply voltage between 3.3V and 3.5V.
1. Power on cycle
2. Write the SETTINGS1 and SETTINGS2 and SETTINGS3
registers with the Custom settings for this application
3. Place the magnet at the desired zero position
4. Read out the measured angle from the ANGLECOM
register
5. Write ANGLECOM [5:0] into the ZPOSL register and
ANGLECOM[13:6] into the ZPOSM register
6. Read reg(0x0016) to reg(0x001A)
7. Set ECC_en in Register ECC to 1 (ECC protection
enabled)
8. Read ECC_s (0x3FD0) to get the correct ECC key
9. Write ECC_s key into ECC register
10. Read reg(0x0016) to reg(0x001B) → read register step1
11. Comparison of written content (settings and angle) with
content of read register step1
12. If point 11 is correct, enable OTP read / write by setting
PROGEN = 1 in the PROG register
13. Start the OTP burn procedure by setting PROGOTP = 1
in the PROG register
14. Read the PROG register until it reads 0x0001
(Programming procedure complete)
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AS5047U − Application Information
15. Clear the memory content by writing 0x00 in the whole
non-volatile memory
16. Set the PROGVER = 1 to set the Guard band for the guard
1
band test.
17. Refresh the non-volatile memory content with the OTP
content by setting OTPREF = 1
18. Read reg(0x0016) to reg(0x001B) → read register step2
19. Comparison of written content (settings and angle) with
content of read register step2. If a deviation in the
comparison occurs, the guard band test was not
successful. Reprogramming is not allowed!
Mandatory: guard band test
20. New power on cycle.
21. Read reg(0x0016) to Reg(0x001B) → read register step3
22. Comparison of written content (settings and angle) with
content of read register step3. If a deviation in the
comparison occurs, the power on test was not
successful. Reprogramming is not allowed!
23. If point 18 is correct, the programming was successful.
1. Guard band test:
Restricted to temperature range: 25 °C 20 °C
Right after the programming procedure (max. 1 hour with same conditions 25°C 20 °C), same VDD voltage.
The guard band test is only for the verification of the burned OTP fuses during the programming sequence.
A use of the guard band in other cases is not allowed.
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AS5047U − Application Information
Figure 58:
OTP Memory Burn and Verification Flowchart
Read
Reg(0x0003)
Read OTP_CTRL
Power on cycle
START
FAIL
Write
OTP burning procedure
complete if
Reg(0x0003)==0x01
Write
Reg(0x0015)
Reg(0x0018)
Reg(0x0019)
Reg(0x001A)
Reg(0x0003)==0x01
DISABLE,SETTINGS1,
SETTINGS2 and
SETTINGS3 register
Write
Reg(0x0015)=0x00
Reg(0x0016)=0x00
Reg(0x0017)=0x00
Reg(0x0018)=0x00
Reg(0x0019)=0x00
Reg(0x001A)=0x00
Reg(0x001B)=0x00
Turn magnet to the
Set magnet to the zero
position
Clear memory
Set Guardband
prospective Zero Position
Read
Reg(0x3FFF)
Write
Reg(0x0003)=0x40
Read ANGLECOM
Refresh memory with OTP
content
Write
Reg(0x0003)=0x04
Write
Write Angle into ZPOSL
and ZPOSM
Reg(0x0017(5:0))=Reg(0x3FFF(5:0))
Reg(0x0016(7:0))=Reg(0x3FFF(13:6))
Read
Reg(0x0015)
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0019)
Reg(0x001A)
Reg(0x001B)
Read
Reg(0x0015)
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0019)
Reg(0x001A)
Read Register step 2
Read Reg(0x0015) to
Reg(0x001A)
Comparison of written
content
Write
(DISABLE,SETTINGS1,
SETTINGS2, SETTINGS3,
ZPOSM, ZPOSL and ECC) with
content of Read Register
step 2.
Write ECC_EN
Reg(0x001B)=0x80
Verify 3
FAIL
Read
Reg(0x3FD0)
Read ECC Value
PASS
Mandatory Guardband-Test
Write ECC (do not
overwrite ECC-en)
Write
Reg(0x001B)
Power-on Reset
Read
Read
Reg(0x0015)
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0019)
Reg(0x001A)
Reg(0x001B)
Read Registers step 1
(DISABLE,SETTINGS1,
SETTINGS2, SETTINGS3,
ZPOSM, ZPOSL and ECC)
Reg(0x0015)
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0016)
Read Register step 3
Comparison of written
content
(DISABLE,SETTINGS1,
SETTINGS2, SETTINGS3,
ZPOSM, ZPOSL and ECC) with
content of Read Register
step 3
Comparison of written
content
(DISABLE,SETTINGS1,
SETTINGS2, SETTINGS3,
ZPOSM, ZPOSL and ECC)
with Read Register step 1
read content
Verify 4
FAIL
Verify 1
FAIL
PASS
PASS
END
Correct
programming
and verification.
END
Wrong
programming.
Reprogramming
not allowed!
Unlock OTP area for
burning
Write
Reg(0x0003)=0x01
(PROGEN=1)
Start OTP burning
procedure
Write
Reg(0x0003)=0x08
(PROGOTP=1)
Note(s):
1. Device with wrong programming must not be used. Scrapping mandatory.
ams Datasheet
[v1-00] 2018-Oct-30
Page 41
Document Feedback
AS5047U − Application Information
Circuit Diagram
Figure 59:
Minimum Circuit Diagram for the AS5047U
VDD during programming 4.5 – 5.5V
VDD
I
CSn
CLK
GND
VDD3V
MISO
MOSI
TEST
A
VDD
U
Programmer
V
100nF
1μF
B
W
GND
Note(s):
1. In terms of EMC and for remote application, additional protection circuit is necessary.
Page 42
amsDatasheet
Document Feedback
[v1-00] 2018-Oct-30
AS5047U − Package Drawings & Markings
Package Drawings & Markings
Figure 60:
Package Outline Drawing AS5047U
RoHS
Green
Symbol
Min
-
Nom
Max
1.20
0.15
1.05
0.30
0.20
5.10
-
Symbol
R
Min
Nom
-
Max
A
A1
A2
b
-
-
0.09
-
-
0.05
0.80
0.19
0.09
4.90
-
R1
0.09
-
1.00
-
S
0.20
-
-
Θ1
0º
-
-
8º
-
c
-
Θ2
12 REF
12 REF
0.10
0.10
0.05
0.20
14
D
5.00
6.40 BSC
4.40
0.65 BSC
0.60
1.00 REF
Θ3
-
-
E
aaa
bbb
ccc
ddd
N
-
-
E1
e
4.30
-
4.50
-
-
-
-
-
L
0.45
-
0.75
-
-
-
L1
Note(s):
1. Dimensioning and tolerancing conform to ASME Y14.5M - 1994.
2. All dimensions are in millimeters. Angles are in degrees.
3. N is the total number of terminals.
ams Datasheet
[v1-00] 2018-Oct-30
Page 43
Document Feedback
AS5047U − Package Drawings & Markings
Figure 61:
AS5047U Package Marking
AS5047U
YYWWMZZ
@
Figure 62:
Packaging Code
YY
WW
M
ZZ
@
Last two digits of the
manufacturing year
Free choice /
traceability code
Manufacturing week
Plant identifier
Sublot identifier
Page 44
amsDatasheet
Document Feedback
[v1-00] 2018-Oct-30
AS5047U − Mechanical Data
Mechanical Data
Figure 63:
TSSOP14 Die Placement and Hall Array Position
0.306 0.100
2.130 0.235
Hall radius
0.236 0.100
0.694 0.150
Note(s):
1. Dimensions are in mm.
2. The Hall array center is located in the center of the IC package. Hall array radius is 1.25mm.
3. Die thickness is 203ꢀm nominal.
ams Datasheet
Page 45
[v1-00] 2018-Oct-30
Document Feedback
AS5047U − Ordering & Contact Information
Ordering&ContactInformation
Figure 64:
Ordering Information
Ordering
Package
Code
Delivery
Marking
Delivery Form
Quantity
500 pcs/reel
4500 pcs/reel
AS5047U-HTSM
AS5047U-HTST
TSSOP14
TSSOP14
AS5047U
AS5047U
7” Tape & Reel in dry pack
13” Tape & Reel in dry pack
Buy our products or get free samples online at:
www.ams.com/Products
Technical Support is available at:
www.ams.com/Technical-Support
Provide feedback about this document at:
www.ams.com/Document-Feedback
For further information and requests, e-mail us at:
ams_sales@ams.com
For sales offices, distributors and representatives, please visit:
www.ams.com/Contact
Headquarters
ams AG
Tobelbader Strasse 30
8141 Premstaetten
Austria, Europe
Tel: +43 (0) 3136 500 0
Website: www.ams.com
Page 46
Document Feedback
amsDatasheet
[v1-00] 2018-Oct-30
AS5047U − RoHS Compliant & ams Green Statement
RoHS: The term RoHS compliant means that ams AG products
fully comply with current RoHS directives. Our semiconductor
products do not contain any chemicals for all 6 substance
categories, including the requirement that lead not exceed
0.1% by weight in homogeneous materials. Where designed to
be soldered at high temperatures, RoHS compliant products are
suitable for use in specified lead-free processes.
RoHS Compliant & ams Green
Statement
ams Green (RoHS compliant and no Sb/Br): ams Green
defines that in addition to RoHS compliance, our products are
free of Bromine (Br) and Antimony (Sb) based flame retardants
(Br or Sb do not exceed 0.1% by weight in homogeneous
material).
Important Information: The information provided in this
statement represents ams AG knowledge and belief as of the
date that it is provided. ams AG bases its knowledge and belief
on information provided by third parties, and makes no
representation or warranty as to the accuracy of such
information. Efforts are underway to better integrate
information from third parties. ams AG has taken and continues
to take reasonable steps to provide representative and accurate
information but may not have conducted destructive testing or
chemical analysis on incoming materials and chemicals. ams AG
and ams AG suppliers consider certain information to be
proprietary, and thus CAS numbers and other limited
information may not be available for release.
ams Datasheet
Page 47
[v1-00] 2018-Oct-30
Document Feedback
AS5047U − Copyrights & Disclaimer
Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten,
Austria-Europe. Trademarks Registered. All rights reserved. The
material herein may not be reproduced, adapted, merged,
translated, stored, or used without the prior written consent of
the copyright owner.
Copyrights & Disclaimer
Devices sold by ams AG are covered by the warranty and patent
indemnification provisions appearing in its General Terms of
Trade. ams AG makes no warranty, express, statutory, implied,
or by description regarding the information set forth herein.
ams AG reserves the right to change specifications and prices
at any time and without notice. Therefore, prior to designing
this product into a system, it is necessary to check with ams AG
for current information. This product is intended for use in
commercial applications. Applications requiring extended
temperature range, unusual environmental requirements, or
high reliability applications, such as military, medical
life-support or life-sustaining equipment are specifically not
recommended without additional processing by ams AG for
each application. This product is provided by ams AG “AS IS”
and any express or implied warranties, including, but not
limited to the implied warranties of merchantability and fitness
for a particular purpose are disclaimed.
ams AG shall not be liable to recipient or any third party for any
damages, including but not limited to personal injury, property
damage, loss of profits, loss of use, interruption of business or
indirect, special, incidental or consequential damages, of any
kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation
or liability to recipient or any third party shall arise or flow out
of ams AG rendering of technical or other services.
The Hardware was developed in the domain of SEooC (Safety
Element out of Context) using ams best system know how. The
final system or target application is not known to ams AG. This
implies, that ams AG does not guarantee for a system functional
safety concept. The final responsibility for achieving a certain
ASIL (Automotive Safety Integrity Level) in the target
application is the responsibility of the system integrator.
Page 48
amsDatasheet
Document Feedback
[v1-00] 2018-Oct-30
AS5047U − Document Status
Document Status
Document Status
Product Status
Definition
Information in this datasheet is based on product ideas in
the planning phase of development. All specifications are
design goals without any warranty and are subject to
change without notice
Product Preview
Pre-Development
Information in this datasheet is based on products in the
design, validation or qualification phase of development.
The performance and parameters shown in this document
are preliminary without any warranty and are subject to
change without notice
Preliminary Datasheet
Datasheet
Pre-Production
Production
Information in this datasheet is based on products in
ramp-up to full production or full production which
conform to specifications in accordance with the terms of
ams AG standard warranty as given in the General Terms of
Trade
Information in this datasheet is based on products which
conform to specifications in accordance with the terms of
ams AG standard warranty as given in the General Terms of
Trade, but these products have been superseded and
should not be used for new designs
Datasheet (discontinued)
Discontinued
ams Datasheet
Page 49
[v1-00] 2018-Oct-30
Document Feedback
AS5047U − Revision Information
Revision Information
Changes from 0-07 (2018-Sep-12) to current revision 1-00 (2018-Oct-30)
Page
Updated figure 27
20
Note(s):
1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision.
2. Correction of typographical errors is not explicitly mentioned.
Page 50
amsDatasheet
Document Feedback
[v1-00] 2018-Oct-30
AS5047U − Content Guide
1
1
2
2
General Description
Key Benefits & Features
Applications
Content Guide
Block Diagram
3
5
Pin Assignment
Absolute Maximum Ratings
6
7
7
Electrical Characteristics
Magnetic Characteristics
System Specifications
9
Timing Characteristics
10 Detailed Description
11 Power Management
12 Dynamic Angle Error Compensation
12 Adaptive Filter System
15 Speed Measurements
15 Rotation Speed Measurement
16 SPI Interface (Slave)
16 SPI Timing
18 SPI Transaction
22 PAD Word
22 CRC Checksum
23 Volatile Registers
26 Non-Volatile Registers (OTP)
30 ABI Incremental Interface
32 UVW Commutation Interface
34 PWM
35 Hysteresis
35 Automatic Gain Control (AGC) and CORDIC Magnitude
36 ECC
37 Application Information
37 Burn and Verification of the OTP Memory
39 Step-by-Step Procedure to Permanently Program the
Non-Volatile Memory (OTP):
42 Circuit Diagram
43 Package Drawings & Markings
45 Mechanical Data
46 Ordering & Contact Information
47 RoHS Compliant & ams Green Statement
48 Copyrights & Disclaimer
49 Document Status
50 Revision Information
ams Datasheet
Page 51
[v1-00] 2018-Oct-30
Document Feedback
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