AS7262-BLGT_技术文档

AS7262

6-Channel Visible Spectral_ID Device

with Electronic Shutter and Smart

Interface

The AS7262 is a cost-effective multi-spectral sensor-on-chip

solution designed to address spectral ID applications. This

highly integrated device delivers 6-channel multi-spectral

sensing in the visible wavelengths from approximately 430nm

to 670nm with full-width half-max (FWHM) of 40nm. An

integrated LED driver with programmable current is provided

for electronic shutter applications.

General Description

The AS7262 integrates Gaussian filters into standard CMOS

silicon via nano-optic deposited interference filter technology

and is packaged in an LGA package that provides a built in

aperture to control the light entering the sensor array.

Control and spectral data access is implemented through either

the I²C register set, or with a high level AT Spectral Command

set via a serial UART.

Ordering Information and Content Guide appear at end of

datasheet.

Key Benefits & Features

The benefits and features of AS7262, 6-Channel Visible

Spectral_ID Device with Electronic Shutter and Smart Interface

are listed below:

Figure 1:

Added Value of Using AS7262

Benefits

Features

• 6 visible channels: 450nm, 500nm, 550nm, 570nm,

600nm and 650nm, each with 40nm FWHM

• Compact 6-channel spectrometry solution

• Simple text-based command interface via

UART, or direct register read and write with

interrupt on sensor ready option on I²C

• UART or I²C slave digital Interface

• Lifetime-calibrated sensing with minimal drift

over time or temperature

• Visible filter set realized by silicon interference filters

• No additional signal conditioning required

• Electronic shutter control/synchronization

• Low voltage operation

• 16-bit ADC with digital access

• Programmable LED drivers

• 2.7V to 3.6V with I²C interface

• 20-pin LGA package 4.5mm x 4.7mm x 2.5mm

-40°C to 85°C temperature range

• Small, robust package, with built-in aperture

ams Datasheet

[v1-00] 2016-Dec-16

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AS7262 − General Description

Applications

The AS7262 applications include:

• Portable spectrometry

• Horticulture

• Color matching and identification

• Authentication and brand protection

• Precision color tuning/calibration

Block Diagram

The system blocks of this device are shown below.

Figure 2:

AS7262 Visible Spectral_ID System

3V

10μF

100nF

3V

VDD1

RX / SCL_S

VDD2

3V

μP

TX / SDA_S

INT

LED_IND

LED_DRV

AS7262

Light

6-channel

Visible

Sensor

MOSI

MISO

Source

Flash

Memory

SCK

Light in

CSN_EE

Reflective

Surface

GND

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AS7262 − Pin Assignments

The device pin assignments are described below.

Pin Assignments

Figure 3:

Pin Diagram of AS7262 (Top View)

20

16

1

15

5

11

6

10

Figure 4:

Pin Description of AS7262

Pin Number

Pin Name

Description

1

2

NF

RESN

Not Functional. Do not connect.

Reset, Active LOW

3

SCK

SPI Serial Clock

4

MOSI

SPI Master Out Slave In

SPI Master In Slave Out

5

MISO

6

CSN_EE

CSN_SD

I²C_ENB

NF

Chip Select for external serial Flash memory, Active LOW

Chip Select for SD Card Interface, Active LOW

Select UART (Low) or I²C (High) Operation

Not Functional. Do not connect.

7

8

9

10

11

12

13

14

NF

Not Functional. Do not connect.

RX/SCL_S

TX/SDA_S

INT

RX (UART) or SCL_S (I²C Slave) Depending on I²C_ENB

TX (UART) or SDA_S (I²C Slave) Depending on I²C_ENB

Interrupt, Active LOW

VDD2

Voltage Supply

ams Datasheet

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AS7262 − Pin Assignments

Pin Number

Pin Name

LED_DRV

GND

Description

LED Driver Output for Driving LED, Current Sink

Ground

15

16

17

18

19

20

VDD1

Voltage Supply

LED_IND

NF

LED Driver Output for Indicator LED, Current Sink

Not Functional. Do not connect.

NF

Not Functional. Do not connect.

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AS7262 − Absolute Maximum Ratings

Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. These are stress

ratings only. Functional operation of the device at these or any

other conditions beyond those indicated under Electrical

Characteristics is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect device

reliability.

Absolute Maximum Ratings

The device is not designed for high energy UV (ultraviolet)

environments, including upward looking outdoor applications,

which could affect long term optical performance.

Figure 5:

Absolute Maximum Ratings of AS7262

Symbol

Parameter

Min

Max

Units

Comments

Electrical Parameters

V

Supply Voltage VDD1

Supply Voltage VDD2

Input/Output Pin Voltage

-0.3

5

V

Pin VDD1 to GND

DD1_MAX

V

Pin VDD2 to GND

DD2_MAX

V

VDD+0.3

Input/Output Pin to GND

DD_IO

Input Current

(latch-up immunity)

I

100

mA

JESD78D

SCR

Electrostatic Discharge

ESD

Electrostatic Discharge HBM

Electrostatic Discharge CDM

1000

500

V

JS-001-2014

JSD22-C101F

HBM

ESD

CDM

Temperature Ranges and Storage Conditions

T

Storage Temperature Range

-40

85

°C

STRG

IPC/JEDEC J-STD-020

The reflow peak soldering

temperature (body

temperature) is specified

according to IPC/JEDEC

J-STD-020 “Moisture/Reflow

Sensitivity Classification for

Non-hermetic Solid State

Surface Mount Devices.”

T

Package Body Temperature

260

°C

BODY

Relative Humidity

(non-condensing)

RH

5

85

%

NC

Maximum floor life time of

168 hours

MSL

Moisture Sensitivity Level

3

ams Datasheet

[v1-00] 2016-Dec-16

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AS7262 − Electrical Characteristics

All limits are guaranteed with VDD = VDD1 = VDD2 = 3.3V,

Electrical Characteristics

T

= 25°C. The parameters with min and max values are

AMB

guaranteed with production tests or SQC (Statistical Quality

Control) methods.

Figure 6:

Electrical Characteristics of AS7262

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

General Operating Conditions

VDD1 /VDD2 Voltage Operating Supply

UART Interface

I²C Interface

2.97

2.7

3.3

25

3.6

85

V

T

Operating Temperature

Operating Current

-40

°C

AMB

I

5

mA

VDD

Internal RC Oscillator

Frequency

F

15.7

-8.5

16

16.3

1.2

MHz

ns

OSC

(1)

Internal Clock Jitter

@25°C

t

JITTER

Temperature Sensor

Absolute Accuracy of the

Internal Temperature

Measurement

D

8.5

°C

TEMP

Indicator LED

I

LED Current

1

4

8

mA

%

IND

I

Accuracy of Current

-30

30

ACC

Voltage Range of Connected

LED

V

Vds of current sink

0.3

VDD

V

LED

LED_DRV

I

LED Current

12.5, 25, 50 or 100

12.5

-10

100

10

mA

%

LED1

I

Accuracy of Current

ACC

Voltage Range of Connected

LED

V

Vds of current sink

0.3

VDD

V

LED

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AS7262 − Electrical Characteristics

Symbol

Parameter

Conditions

Digital Inputs and Outputs

Vin=0V or VDD

Min

Typ

Max

Unit

I , I

Logic Input Current

-1

1

μA

IH IL

Logic Input Current (RESN

pin)

I

Vin=0V

-0.2

mA

IL RESN

V

CMOS Logic High Input

CMOS Logic Low Input

CMOS Logic High Output

CMOS Logic Low Output

Current Rise Time

0.7* VDD

0

VDD

0.3* VDD

VDD-0.4

0.4

V

IH

V

IL

V

I=1mA

V

OH

V

I=1mA

V

OL

(1)

C(Pad)=30pF

5

ns

t

RISE

(1)

Current Fall Time

C(Pad)=30pF

5

ns

t

FALL

Note(s):

1. Guaranteed, not tested in production

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AS7262 − Timing Characteristics

Timing Characteristics

Figure 7:

AS7262 I²C Slave Timing Characteristics

Symbol

Parameter

Conditions

Min Typ Max Unit

I²C Interface

f

SCL Clock Frequency

0

400

kHz

ꢀs

SCLK

Bus Free Time Between a STOP

and START

t

1.3

BUF

t

Hold Time (Repeated) START

LOW Period of SCL Clock

HIGH Period of SCL Clock

Setup Time for a Repeated START

Data Hold Time

0.6

1.3

0.6

0

ꢀs

ns

ꢀs

HS:STA

t

LOW

t

HIGH

t

SU:STA

t

0.9

HS:DAT

t

Data Setup Time

100

20

SU:DAT

t

Rise Time of Both SDA and SCL

Fall Time of Both SDA and SCL

Setup Time for STOP Condition

300

R

t

20

F

t

0.6

SU:STO

CB — total capacitance of

one bus line in pF

C

Capacitive Load for Each Bus Line

I/O Capacitance (SDA, SCL)

400

10

pF

B

C

I/O

Figure 8:

I²C Slave Timing Diagram

t_LOW

t_R

t_F

SCL

t_HIGH

P

S

P

t_SU:DAT

t_SU:STA

t_HD:STA

t_HD:DAT

t_SU:STO

V_IH

V_IL

SDA

t_BUF

Stop

Start

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AS7262 − Timing Characteristics

Figure 9:

AS7262 SPI Timing Characteristics

Symbol

Parameter

Conditions

Min

Typ Max

Unit

SPI Interface

f

Clock Frequency

Clock High Time

Clock Low Time

SCK Rise Time

SCK Fall Time

0

40

5

16

MHz

ns

SCK

t

SCK_H

t

ns

SCK_L

t

ns

SCK_RISE

t

5

ns

SCK_FALL

Time between CSN high-low

transition to first SCK high transition

t

CSN Setup Time

CSN Hold Time

50

ns

CSN_S

Time between last SCK falling edge

and CSN low-high transition

t

100

CSN_H

t

CSN Disable Time

Data-Out Setup Time

Data-Out Hold Time

Data-In Valid

100

5

ns

CSN_DIS

t

DO_S

t

5

DO_H

t

10

DI_V

Figure 10:

SPI Master Write Timing Diagram

t_{CS N_DIS}

CSN

tCSN_H

t_{SCK_RISE}

t_{SCK_FALL}

t_{CSN_S}

SCK

t_{DO_S}

t_{DO_H}

MOSI

MISO

MSB

LSB

HI-Z

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AS7262 − Timing Characteristics

Figure 11:

SPI Master Read Timing Diagram

CSN_xx

tSCK_H

tSCK_L

SCK

t_{DI_ V}

Dont care

MOSI

MISO

MSB

LSB

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AS7262 − Optical Characteristics

Optical Characteristics

Figure 12:

(1)

Optical Characteristics of AS7262 (Pass Band)

Channel

(nm)

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

counts/

(2), (4)

(3), (4)

V

B

Channel V

450

500

550

570

600

5700K White LED

45

2

(μW/cm )

counts/

(2), (4)

(3), (4)

Channel B

Channel G

Channel Y

Channel O

Channel R

45

2

(μW/cm )

counts/

G

Y

2

(μW/cm )

counts/

2

(μW/cm )

counts/

O

R

2

(μW/cm )

counts/

650

40

2

(μW/cm )

FWHM

Wacc

dark

Full Width Half Max

Wavelength Accuracy

Dark Channel Counts

Package Field of View

40

5

nm

GAIN=64, T

=25°C

5

counts

deg

AMB

PFOV

20.0

Note(s):

1. Calibration and measurements are made using diffused light

2. Each channel is tested with GAIN = 16x, Integration Time (INT_T) = 166ms and VDD = VDD1 = VDD2 = 3.3V, T_AMB=25°C

3. The accuracy of the channel counts/μW/cm²is 12%

4. The source light is a 5700K white LED with an irradiance of ~600μW/cm²(300-1000nm). The energy at each channel (V, B, G, Y, O, R)

is calculated with a 40nm bandwidth around the center wavelengths (450nm, 500nm, 550nm, 570nm, 600nm, 650nm).

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AS7262 − Typical Optical Characteristics

Typical Optical Characteristics

Figure 13:

Spectral Responsivity

1.1

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

350

400

450

500

550

600

650

700

750

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AS7262 − Detailed Description

Detailed Description

Figure 14:

AS7262 Functional Block Diagram

VDD1

VDD2

INT

LED_IND

RX / SCL_S

2

UART / I C

LED_DRV

TX / SDA_S

I2C_ENB

°C

MISO

MOSI

SCK

Spectral_ID

Engine

SPI

Master

CSN_SD

Multi

Spectral

Sensor

B

G

O

Y R

V

RESN

RC Osc

16MHz

GND

6-Channel Visible Spectral_ID Detector

The AS7262 6-channel Spectral_ID is a next-generation digital

spectral sensor device. Each channel has a Gaussian filter

characteristic with a full width half maximum (FWHM)

bandwidth of 40nm.

The sensor contains analog-to-digital converters (16-bit

resolution ADC), which integrate the current from each

channel’s photodiode. Upon completion of the conversion

cycle, the integrated result is transferred to the corresponding

data registers. The transfers are double-buffered to ensure that

the integrity of the data is maintained.

Interference filters enable high temperature stability and

minimal lifetime drift. Filter accuracy will be affected by the

angle of incidence which itself is limited by integrated aperture

and internal micro-lens structure. The aperture-limited field of

view is 20.0° to deliver specified accuracy.

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AS7262 − Detailed Description

Data Conversion Description

AS7262 spectral conversion is implemented via two

photodiode banks per device. Bank 1 consists of data from the

V, G, B, Y photodiodes. Bank 2 consists of data from the G, Y, O,

R photodiodes. Spectral conversion requires the integration

time (IT in ms) set to complete. If both photodiode banks are

nd

required to complete the conversion, the 2 bank requires an

additional IT ms. Minimum IT for a single bank conversion is

2.8 ms. If data is required from all 6 photodiodes then the device

must perform 2 full conversions (2 x Integration Time).

The spectral conversion process is controlled with BANK Mode

settings as follows:

BANK Mode 0: Data will be available in registers V, B, G & Y (O

and R registers will be zero) with conversions occurring

continuously.

BANK Mode 1: Data will be available in registers G, Y, O & R (V

and B registers will be zero) with conversions occurring

continuously.

BANK Mode 2: Data will be available in registers V, B, G, Y, O &

R with conversions occurring continuously.

When the bank setting is Mode 0, Mode 1, or Mode 2, the

spectral data conversion process operates continuously, with

new data available after each IT ms period. In the continuous

modes, care should be taken to assure prompt interrupt

servicing so that integration values from both banks are all

derived from the same spectral conversion cycle.

BANK Mode 3: Data will be available in registers V, B, G, Y, O &

R in One-Shot mode

When the bank setting is set to Mode 3 the device initiates

One-Shot operation. The DATA_RDY bit is set to 1 once data is

available, indicating spectral conversion is complete. One-Shot

mode is intended for use when it is critical to ensure spectral

conversion results are obtained contemporaneously. An

example use for one-shot mode is when a digitally controlled

illumination source is briefly turned on for the purpose of taking

a set of filter readings.

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AS7262 − Detailed Description

Figure 15:

Photo Diode Array

G

Y

V

B

R

O

Figure 16:

Bank Mode and Data Conversion

BANK Mode 0

One Conversion

V, B, G, Y

G, Y, O, R

V, B, G, Y

Integration Time

BANK Mode 1

One Conversion

Integration Time

BANK Mode 2

1st Conversion

Integration Time

2nd Conversion

G, Y, O, R

Integration Time

ams Datasheet

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AS7262 − Detailed Description

RC Oscillator

The timing generation circuit consists of an on-chip 16MHz,

temperature compensated oscillator, which provides the

master clock for the AS7262.

Temperature Sensor

The temperature sensor is constantly measuring the on-chip

temperature and enables temperature compensation

procedures.

Reset

Pulling down the RESN pin for longer than 100ms resets the

AS7262.

Figure 17:

Reset Circuit

RESN

Spectral_ID

Engine

Reset

Push > 100ms

AS7262

Indicator LED

The LED, connected to pin LED_IND, can be used to indicate

programming progress of the device.

While programming the AS7262 via the external SD card the

indicator LED starts flashing (500ms pulses). When

programming is completed the indicator LED is switched off.

The LED (LED0) can be turned ON/OFF via AT commands or via

I²C register control. The LED sink current is programmable from

1mA, 2mA, 4mA and 8mA.

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AS7262 − Detailed Description

Electronic Shutter with LED_DRV Driver Control

There are two LED driver outputs that can be used to control

up to 2 LEDs. This will allow different wavelength light sources

to be used in the same system. The LED output sink currents are

programmable and can drive external LED sources: LED_IND

from 1mA, 2mA, 4mA and 8mA and LED_DRV from 12.5mA,

25mA, 50mA and 100mA. The sources can be turned off and on

via I²C registers control or AT commands and provides the

device with an electronic shutter.

Interrupt Operation

If BANK is set to Mode 0 or Mode 1 then the data is ready after

st

the 1 integration time. If BANK is set to Mode 2 or Mode 3 then

the data is ready after two integration times. If the interrupt is

enabled (INT = 1) then when the data is ready, the INT line is

pulled low and DATA_RDY is set to 1. The INT line is released

(returns high) when the control register is read. DATA_RDY is

cleared to 0 when any of the sensor registers V, B, G, Y, O & R are

read. For multi-byte sensor data (2 or 4 bytes), after the 1st byte

is read the remaining get shadow buffer protected in case an

integration cycle completes just after the 1st byte is read.

In continuous spectral conversion mode (BANK setting of Mode

0, 1, or 2), the sensors continue to gather information at the rate

of the integration time, hence if the sensor registers are not read

when the interrupt line goes low, it will stay low and the next

cycle’s sensor data will be available in the registers at the end

of the next integration cycle.

When the control register BANK bits are written with a value of

Mode 3, One-Shot Spectral Conversion mode is entered. When

a single set of contemporaneous sensor readings is desired,

writing BANK Mode 3 to the control register immediately

triggers exactly two spectral data conversion cycles. At the end

of these two conversion cycles, the DATA_RDY bit is set as for

the other BANK modes. To perform a new One-Shot sequence,

the control register BANK bits should be written with a value of

Mode 3 again. This process may continue until the user writes

a different value into the BANK bits.

I²C Slave Interface

If selected by the I²C_ENB pin setting, interface and control can

be accomplished through an I²C compatible slave interface to

a set of registers that provide access to device control functions

and output data. These registers on the AS7262 are, in reality,

implemented as virtual registers in software. The actual I²C

slave hardware registers number only three and are described

in the table below. The steps necessary to access the virtual

registers defined in the following are explained in pseudocode

for external I²C master writes and reads below.

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AS7262 − Detailed Description

I²C Feature List

• Fast mode (400kHz) and standard mode (100kHz) support.

• 7+1-bit addressing mode.

• Write format: Byte.

• Read format: Byte.

• SDA input delay and SCL spike filtering by integrated

RC-components.

Figure 18:

I²C Slave Device Address and Physical Registers

Entity

Description

Note

Byte = 1001001x (device address = 49 hex)

x= 1 for Master Read (byte = 93 hex)

x= 0 for Master Write (byte = 92 hex)

Device Slave Address 8-bit Slave Address

Register Address = 0x00

Bit 1: TX_VALID

I²C slave interface

STATUS register

Read-only

0 → New data may be written to WRITE register

1 → WRITE register occupied. Do NOT write.

Bit 0: RX_VALID

STATUS Register

0 → No data is ready to be read in READ register.

1 → Data byte available in READ register.

Register Address = 0x01

I²C slave interface

WRITE register

Write-only

8-Bits of data written by the I²C Master intended

for receipt by the I²C slave. Used for both virtual

register addresses and write data.

WRITE Register

READ Register

I²C slave interface

READ register

Read-only

Register Address = 0x02

8-Bits of data to be read by the I²C Master.

I²C Virtual Register Write Access

I²C Virtual Register Byte Write shows the pseudocode necessary

to write virtual registers on the AS7262. Note that, because the

actual registers of interest are realized as virtual registers, a

means of indicating whether there is a pending read or write

operation of a given virtual register is needed. To convey this

information, the most significant bit of the virtual register

address is used as a marker. If it is 1, then a write is pending,

otherwise the slave is expecting a virtual read operation. The

pseudocode illustrates the proper technique for polling of the

I²C slave status register to ensure the slave is ready for each

transaction.

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AS7262 − Detailed Description

I²C Virtual Register Byte Write

Pseudocode

Poll I²C slave STATUS register;

If TX_VALID bit is 0, a write can be performed on the interface;

Send a virtual register address and set the MSB of the register address to 1 to indicate the pending write;

Poll I²C slave STATUS register;

If TX_VALID bit is 0, the virtual register address for the write has been received and the data may now be written;

Write the data.

Sample Code:

#define I2C_AS72XX_SLAVE_STATUS_REG

#define I2C_AS72XX_SLAVE_WRITE_REG

#define I2C_AS72XX_SLAVE_READ_REG

#define I2C_AS72XX_SLAVE_TX_VALID

#define I2C_AS72XX_SLAVE_RX_VALID

0x00

0x01

0x02

0x01

void i2cm_AS72xx_write(uint8_t virtualReg, uint8_t d)

{

volatile uint8_t status;

while (1)

{

// Read slave I²C status to see if the write buffer is ready.

status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG);

if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0)

// No inbound TX pending at slave. Okay to write now.

break;

}

// Send the virtual register address (setting bit 7 to indicate a pending write).

i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, (virtualReg | 0x80));

while (1)

{

// Read the slave I²C status to see if the write buffer is ready.

status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG);

if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0)

// No inbound TX pending at slave. Okay to write data now.

break;

}

// Send the data to complete the operation.

i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, d);

}

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AS7262 − Detailed Description

I²C Virtual Register Read Access

I²C Virtual Register Byte Read shows the pseudocode necessary

to read virtual registers on the AS7262. Note that in this case,

reading a virtual register, the register address is not modified.

I²C Virtual Register Byte Read

Pseudocode

Poll I²C slave STATUS register;

If TX_VALID bit is 0, the virtual register address for the read may be written;

Send a virtual register address;

Poll I²C slave STATUS register;

If RX_VALID bit is 1, the read data is ready;

Read the data.

Sample Code:

uint8_t i2cm_AS72xx_read(uint8_t virtualReg)

{

volatile uint8_t status, d;

while (1)

{

// Read slave I²C status to see if the read buffer is ready.

status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG);

if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0)

// No inbound TX pending at slave. Okay to write now.

break;

}

// Send the virtual register address (setting bit 7 to indicate a pending write).

i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, virtualReg);

while (1)

{

// Read the slave I²C status to see if our read data is available.

status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG);

if ((status & I2C_AS72XX_SLAVE_RX_VALID) != 0)

// Read data is ready.

break;

}

// Read the data to complete the operation.

d = i2cm_read(I2C_AS72XX_SLAVE_READ_REG);

return d; s

}

The details of the i2cm_read() and i2cm_write()

functions in previous Figures are dependent upon the nature

and implementation of the external I²C master device.

Page 20

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AS7262 − Detailed Description

4-Byte Floating-Point (FP) Registers

Several 4-byte registers (hex) are used by the AS7262. Here is

an example of how these registers are used to represent floating

point data (based on the IEEE 754 standard):

Figure 19:

Example of the IEEE 754 Standard

byte 3

byte 2

byte 0

byte 1

3E (hex)

20 (hex)

00 (hex)

0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

31

24 23

16 15

8 7

0

sign

exponent (8 bits)

fraction (23 bits)

0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

= 0.15625

0

31 30

23 22

The floating point (FP) value assumed by 32 bit binary32 data

with a biased exponent e (the 8 bit unsigned integer) and a

23 bit fraction is (for the above example):

23





FP value= (–1)^sign⋅ 1 +

_{23 – i}2 × 2

(e – 127)



^–i

 ^b









i = 1

23







0

(124 – 127)

^–i

 ^b

FP value= (–1) ⋅ 1 +

_{23 – i}2 × 2









i = 1

FP value= 1 × (1 + 2^–2) × 2^–3= 0.15625

ams Datasheet

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Document Feedback

AS7262 − Detailed Description

I²C Virtual Register Set

Figure 20 provides a summary of the AS7262 I²C register set.

Figures after that provide additional register details. All register

data is hex, and all multi-byte entities are Big Endian (most

significant byte is situated at the lowest register address).

Multiple byte registers (2 byte integer, or, 4 byte floating point)

must be read in the order of ascending register addresses (low

to high). And if capable of being written to, must also be written

in the order of ascending register addresses.

Figure 20:

I²C Virtual Register Set Overview

Addr

Name

<D3>

<D2>

<D1>

<D0>

Version Registers

0x00:0x01

0x02:0x03

HW_Version

FW_Version

Hardware Version

Firmware Version

Control Registers

0x04

0x05

0x06

0x07

Control_Setup

INT_T

RST

INT

GAIN

Bank

DATA_RDY

RSVD

Integration Time

Device_Temp

LED_Control

Device Temperature

LED_DRV

RSVD

ICL_DRV

ICL_IND

LED_IND

Sensor Raw Data Registers

Channel V High Data Byte

0x08

0x09

0x0A

0x0B

0x0C

0x0D

0x0E

0x0F

0x10

0x11

0x12

0x13

V_High

V_Low

B_High

B_Low

G_High

G_Low

Y_High

Y_Low

O_High

O_Low

R_High

R_Low

Channel V Low Data Byte

Channel B High Data Byte

Channel B Low Data Byte

Channel G High Data Byte

Channel G Low Data Byte

Channel Y High Data Byte

Channel Y Low Data Byte

Channel O High Data Byte

Channel O Low Data Byte

Channel R High Data Byte

Channel R Low Data Byte

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AS7262 − Detailed Description

Addr

Name

<D3>

<D2>

<D1>

<D0>

Sensor Calibrated Data Registers

0x14:0x17

0x18:0x1B

0x1C:0x1F

0x20:0x23

0x24:0x27

0x28:0x2B

V_Cal

B_Cal

G_Cal

Y_Cal

O_Cal

R_Cal

Channel V Calibrated Data (floating point)

Channel B Calibrated Data (floating point)

Channel G Calibrated Data (floating point)

Channel Y Calibrated Data (floating point)

Channel O Calibrated Data (floating point)

Channel R Calibrated Data (floating point)

ams Datasheet

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AS7262 − Detailed Description

Detailed Register Description

Figure 21:

HW Version Registers

Addr: 0x00

HW_Version

Bit Description

Bit

Bit Name

Default

Access

7:0

Device Type

01000000

R

Device type number

Addr: 0x01

HW_Version

Bit

Bit Name

Default

Access

Bit Description

7:0

HW Version

00111110

R

Hardware version

Figure 22:

FW Version Registers

Addr: 0x02

FW_Version

Bit

7:6

5:0

Bit Name

Minor Version

Sub Version

Default

Access

Bit Description

R

Minor version [1:0]

Sub version

Addr: 0x03

FW_Version

Bit

7:4

3:0

Bit Name

Major version

Minor version

Access

Bit Description

R

Major version

Minor version [5:2]

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AS7262 − Detailed Description

Figure 23:

Control Setup Register

Addr: 0x04/0x84

Control_Setup

Bit Description

Bit

Bit Name

Default

Access

Soft Reset, Set to 1 for soft reset, goes to 0

automatically after the reset

7

RST

0

R/W

Enable interrupt pin output (INT),

1: Enable, 0: Disable

6

INT

0

R/W

Sensor Channel Gain Setting (all channels)

‘b00=1x; ‘b01=3.7x; ‘b10=16x; ‘b11=64x

5:4

GAIN

Data Conversion Type (continuous)

‘b00=Mode 0; ‘b01=Mode 1; ‘b10=Mode 2;

‘b11=Mode 3 One-Shot

3:2

BANK

10

R/W

1: Data Ready to Read, sets INT active if interrupt is

enabled.

Can be polled if not using INT.

1

DATA_RDY

RSVD

0

R/W

R

0

Reserved; Unused

Figure 24:

Integration Time Register

Addr: 0x05/0x85

INT_T

Bit

Bit Name

Default

Access

Bit Description

7:0

INT_T

0xFF

R/W

Integration time = <value> * 2.8ms

Figure 25:

Device Temperature Register

Addr: 0x06

Device_Temp

Bit

Bit Name

Default

Access

Bit Description

7:0

Device_Temp

R

Device temperature data byte (°C)

ams Datasheet

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AS7262 − Detailed Description

Figure 26:

LED Control Register

Addr: 0x07/0x87

LED Control

Bit Description

Bit

Bit Name

Default

Access

7:6

RSVD

0

R

Reserved

LED_DRV current limit

5:4

3

ICL_DRV

LED_DRV

ICL_IND

LED_IND

00

0

R/W

‘b00=12.5mA; ‘b01=25mA; ‘b10=50mA; ‘b11=100mA

Enable LED_DRV

1: Enabled; 0: Disabled

LED_IND current limit

‘b00=1mA; ‘b01=2mA; ‘b10=4mA; ‘b11=8mA

2:1

0

00

0

Enable LED_IND

1: Enabled; 0: Disabled

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AS7262 − Detailed Description

Figure 27:

Sensor Raw Data Registers

Addr: 0x08

V_High

Bit

Bit Name

Default

Access

Bit Description

7:0

V_High

R

Channel V High Data Byte

Addr: 0x09

V_Low

Bit

Bit Name

Access

Bit Description

7:0

V_Low

R

Channel V Low Data Byte

Addr: 0x0A

B_High

Bit

Bit Name

Access

Bit Description

7:0

B_High

R

Channel B High Data Byte

Addr: 0x0B

B_Low

Bit

Bit Name

Access

Bit Description

7:0

B_Low

R

Channel B Low Data Byte

Addr: 0x0C

G_High

Bit

Bit Name

Access

Bit Description

7:0

G_High

R

Channel G High Data Byte

Addr: 0x0D

G_Low

Bit

Bit Name

Access

Bit Description

7:0

G_Low

R

Channel G Low Data Byte

Addr: 0x0E

Y_High

Bit

Bit Name

Access

Bit Description

7:0

Y_High

R

Channel Y High Data Byte

Addr: 0x0F

Y_Low

Bit

Bit Name

Access

Bit Description

7:0

Y_Low

R

Channel Y Low Data Byte

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AS7262 − Detailed Description

Addr: 0x10

Bit Name

O_High

Bit Description

Bit

Default

Access

7:0

O_High

R

Channel O High Data Byte

Addr: 0x11

O_Low

Bit

Bit Name

O_Low

Access

Bit Description

7:0

R

Channel O Low Data Byte

Addr: 0x12

R_High

Bit

Bit Name

R_High

Access

Bit Description

7:0

R

Channel R High Data Byte

Addr: 0x13

R_Low

Bit

Bit Name

Access

Bit Description

7:0

R_Low

R

Channel R Low Data Byte

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AS7262 − Detailed Description

Figure 28:

Sensor Calibrated Data Registers

Addr: 0x14:0x17

V_Cal

Bit Description

Bit

Bit Name Default Access

31:0

V_Cal

R

Channel V Calibrated Data (floating point)

Addr: 0x18:0x1B

B_Cal

Bit

Bit Name Default Access

Bit Description

Channel B Calibrated Data (floating point)

G_Cal

31:0

B_Cal

R

Addr: 0x1C:0x1F

Bit

Bit Name Default Access

Bit Description

Channel G Calibrated Data (floating point)

Y_Cal

31:0

G_Cal

R

Addr: 0x20:0x23

Bit

Bit Name Default Access

Bit Description

Channel Y Calibrated Data (floating point)

O_Cal

31:0

Y_Cal

R

Addr: 0x24:0x27

Bit

Bit Name Default Access

Bit Description

Channel O Calibrated Data (floating point)

R_Cal

31:0

O_Cal

R

Addr: 0x28:0x2B

Bit

Bit Name Default Access

Bit Description

31:0

R_Cal

R

Channel R Calibrated Data (floating point)

ams Datasheet

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Page 29

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AS7262 − Detailed Description

UART Interface

If selected by the I²C_ENB pin setting, the UART module

implements the TX and RX signals as defined in the RS-232 /

V.24 standard communication protocol.

It has on both, receive and transmit path, a 16 entry deep FIFO.

It can generate interrupts as required.

UART Feature List¹

• Full Duplex Operation (Independent Serial Receive and

Transmit Registers) with FIFO buffer of 8 byte for each.

• At a clock rate of 16MHz it supports communication at

115200 Baud.

• Supports Serial Frames with 8 Data Bits, no Parity and 1

Stop Bit

Theory of Operation

Transmission

If data is available in the transmit FIFO, it will be moved into the

output shift register and the data will be transmitted at the

configured Baud Rate, starting with a Start Bit (logic zero) and

followed by a Stop Bit (logic one).

Reception

At any time, with the receiver being idle, if a falling edge of a

start bit is detected on the input, a byte will be received and

stored in the receive FIFO. The following Stop Bit will be checked

to be logic one.

Figure 29:

UART Protocol

Data Bits

TX

RX

D7

D0

D1

D2

D3

D4

D5

D6

D0

Start Bit

Stop Bit Next Start

Always High

Tbit=1/Baude Rate

Always Low

D7

D1

D2

D3

D4

Start Bit detected

After Tbit/2: Sampling of Start Bit

After T_bit: Sampling of Data

Sample Points

1. With UART operation, min VDD of 2.97V is required as shown in Electrical Characteristics Figures.

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amsDatasheet

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AS7262 − Detailed Description

AT Command Interface

The microprocessor interface to control the Visible Spectral_ID

sensor is via the UART, using the AT Commands across the UART

interface.

The 6-channel Spectral _ID sensor provides a text-based serial

command interface borrowed from the “AT Command” model

used in early Hayes modems. For example:

• Read DATA value: ATDATA → <data>OK

• Set the gain of the sensor to 1x: ATGAIN =0 → OK

The “AT Command Interface Block Diagram”, shown below

between the network interface and the core of the system,

provides access to the Spectral_ID engine’s control and

configuration functions.

Figure 30:

AT Command Interface Block Diagram

RX

AT

AT Commands

Spectral_ID

Engine

μP

Command

Interface

TX

AT Command Interface

AS726x

In Figure 31, numeric values may be specified with no leading

prefix, in which case they will be interpreted as decimals, or with

a leading “0x” to indicate that they are hexadecimal numbers,

or with a leading “‘b” to indicate that they are binary numbers.

The commands are loosely grouped into functional areas. Texts

appearing between angle brackets (‘<‘ and ‘>‘) are commands

or response arguments. A carriage return character, a linefeed

character, or both may terminate commands and responses.

Note that any command that encounters an error will generate

the “ERROR” response shown, for example, in the NOP

command at the top of the first table, but has been omitted

elsewhere in the interest of readability and clarity.

ams Datasheet

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AS7262 − Detailed Description

Figure 31:

AT Commands

Command

Response

Description/Parameters

Spectral Data per Channel

<V_value>,

<B_value>,

<G_value>,

<Y_value>,

<O_value>,

<R_value> OK

Read V, B, G, Y, O & R data. Returns comma-separated

16-bit integers.

ATDATA

<Cal_V_value>,

<Cal_B_value>,

<Cal_G_value>,

<Cal_Y_value>,

<Cal_O_value>,

<Cal_R_value> OK

Read calibrated V, B, G, Y, O & R data. Returns

comma-separated 32-bit floating point values.

ATCDATA

Sensor Configuration

Set sensor integration time. Values should be in the range

[1..255], with integration time = <value> * 2.8ms

ATINTTIME=<value>

OK

Read sensor integration time, with

integration time = <value> * 2.8ms

ATINTTIME

ATGAIN=<value>

ATGAIN

<value> OK

OK

Set sensor gain: 0=1x, 1=3.7x, 2=16x, 3=64x

Read sensor gain setting, returning 0, 1, 2, or 3 as defined

immediately above.

<value>OK

ATTEMP

Read temperature of chip in degree Celsius

Set Sensor Mode

0 = BANK Mode 0;

1 = BANK Mode 1;

2 = BANK Mode 2;

3 = BANK Mode 3 One-Shot;

4 = Sensors OFF

ATTCSMD=<value>

OK

In One-Shot mode, each ATTCSMD=3 command triggers a

One-Shot reading

ATTCSMD

<value> OK

Read Sensor Mode, see above

<value>= # of samples

ATBURST=<value>

OK

(ATBURST=1 means run until ATBURST=0 is received (a

special case for continuous output)

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AS7262 − Detailed Description

Command

Response

Description/Parameters

LED Driver Controls

Sets LED_IND: 100=ON, 0=OFF

ATLED0=<value>

ATLED0

OK

<100|0>OK

OK

Reads LED_IND setting: 100=ON, 0=OFF

Sets LED_DRV: 100=ON, 0=OFF

ATLED1=<value>

ATLED1

<100|0>OK

Reads LED_DRV setting: 100=ON, 0=OFF

Sets LED_IND and LED_DRV current

LED_IND: bits 3:0; LED_DRV: 7:4 bits

LED_IND: ‘b00=1mA; ‘b01=2mA; ‘b10=4mA; ‘b11=8mA

LED_DRV: ‘b00=12.5mA; ‘b01=25mA; ‘b10=50mA;

‘b11=100mA

ATLEDC=<value>

OK

Reads LED_IND and LED_DRV current settings as shown

above

ATLEDC

<value>OK

NOP, Version Access, System Reset

OK → Success

ERROR → Failure

AT

NOP

ATRST

None

Software Reset – no response

Returns the system software version number

<SWversion#>OK

ERROR → Failure

ATVERSW

Returns the system hardware revision and product ID,

with bits 7:4 containing the part ID, and bits 3:0 yielding

the chip revision value.

<HWversion#>OK

ERROR → Failure

ATVERHW

Firmware Update

<value>= 16-bit checksum. Initializes the firmware update

process. Number of bytes that follow are always 56k bytes

ATFWU=<value>

ATFW=<value>

OK

Download new firmware

Up to 7 Bytes represented as hex chars with no leading or

trailing 0x.

Repeat command till all 56k bytes of firmware are

downloaded

Causes target address for FW updates to advance. Should

be called after every successful “OK” returned after

“ATFW=<value>” command usage.

ATFWA

ATFWS

OK

Causes the active image to switch between the two

possible current images and then resets the IC

ams Datasheet

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AS7262 − Application Information

Application Information

Schematic

Figure 32:

AS7262 Typical Application Circuit

3V3

17 VDD1

14 VDD2

RESN

CSN_SD

CSN_EE

MISO

MOSI

7

6

5

4

3

8

1uF

100nF 10uF

1

2

5

6

3

7

/CS

DO

DI

10K

RST

2

16 GND

Flash

Memory

3V3 Vled

SCK

CLK

15 LED_DRV

18 LED_IND

I2C_ENB

/WP

AS7262

/HOLD

DNP

0R

RX

11 RX/SCL_S

12 TX/SDA_S

13 INT

NC

19

20

1

10

9

TX

INT

PCB Layout

Figure 33:

Typical Layout Routing

In order to prevent interference, avoid trace routing

feedthroughs with exposure directly under the AS7262. An

example routing is illustrated in the diagram.

Page 34

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AS7262 − Package Drawings & Markings

Package Drawings & Markings

Figure 34:

Package Drawings LGA

AS7262

RoHS

Green

Note(s):

1. XXXXX = tracecode

ams Datasheet

[v1-00] 2016-Dec-16

Page 35

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AS7262 − PCB Pad Layout

Suggested PCB pad layout guidelines for the LGA device are

shown.

PCB Pad Layout

Figure 35:

Recommended PCB Pad Layout

0.30

0.65

Unit: mm

1

4.40

Note(s):

1. Unless otherwise specified, all dimensions are in millimeters.

2. Dimensional tolerances are 0.05mm unless otherwise noted.

3. This drawing is subject to change without notice.

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AS7262 − Mechanical Data

Mechanical Data

Figure 36:

Tape & Reel Information

Note(s):

1. Each reel contains 2000 parts.

ams Datasheet

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Document Feedback

AS7262 − Soldering & Storage Information

Soldering & Storage

Information

Soldering Information

The module has been tested and has demonstrated an ability

to be reflow soldered to a PCB substrate. The solder reflow

profile describes the expected maximum heat exposure of

components during the solder reflow process of product on a

PCB. Temperature is measured on top of component. The

components should be limited to a maximum of three passes

through this solder reflow profile.

Figure 37:

Solder Reflow Profile

Parameter

Reference

Device

2.5°C/s

Average temperature gradient in preheating

Soak time

t

2 to 3 minutes

Max 60s

SOAK

Time above 217°C(T )

t

1

Time above 230°C(T )

t

Max 50s

2

Time above T

- 10°C(T )

t

Max 10s

peak

3

T

Peak temperature in reflow

260°C

peak

Temperature gradient in cooling

Max -5°C/s

Figure 38:

Solder Reflow Profile Graph

Page 38

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amsDatasheet

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AS7262 − Soldering & Storage Information

Manufacturing Process Considerations

The AS7262 package is compatible with standard reflow

no-clean and cleaning processes including aqueous, solvent or

ultrasonic techniques. However, as an open-aperture device,

precautions must be taken to avoid particulate or solvent

contamination as a result of any manufacturing processes,

including pick and place, reflow, cleaning, integration assembly

and/or testing. Temporary covering of the aperture is allowed.

To avoid degradation of accuracy or performance in the end

product, care should be taken that any temporary covering and

associated sealants/debris are thoroughly removed prior to any

optical testing or final packaging.

Storage Information

Moisture Sensitivity

Optical characteristics of the device can be adversely affected

during the soldering process by the release and vaporization of

moisture that has been previously absorbed into the package.

To ensure the package contains the smallest amount of

absorbed moisture possible, each device is baked prior to being

dry packed for shipping.

Devices are dry packed in a sealed aluminized envelope called

a moisture-barrier bag with silica gel to protect them from

ambient moisture during shipping, handling, and storage

before use.

Shelf Life

The calculated shelf life of the device in an unopened moisture

barrier bag is 12 months from the date code on the bag when

stored under the following conditions:

• Shelf Life: 12 months

• Ambient Temperature: <40°C

• Relative Humidity: <90%

Rebaking of the devices will be required if the devices exceed

the 12 month shelf life or the Humidity Indicator Card shows

that the devices were exposed to conditions beyond the

allowable moisture region.

ams Datasheet

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AS7262 − Soldering & Storage Information

Floor Life

The module has been assigned a moisture sensitivity level of

MSL 3. As a result, the floor life of devices removed from the

moisture barrier bag is 168 hours from the time the bag was

opened, provided that the devices are stored under the

following conditions:

• Floor Life: 168 hours

• Ambient Temperature: <30°C

• Relative Humidity: <60%

If the floor life or the temperature/humidity conditions have

been exceeded, the devices must be rebaked prior to solder

reflow or dry packing.

Rebaking Instructions

When the shelf life or floor life limits have been exceeded,

rebake at 50°C for 12 hours.

Page 40

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AS7262 − Ordering & Contact Information

Ordering & Contact Information

Figure 39:

Ordering Information

(1)

Ordering

Code

Delivery

Form

Delivery

Quantity

Package

Marking

Description

6-Channel Visible Spectral_ID

Device with Electronic Shutter

and Smart Interface

AS7262-BLGT

20-pin LGA

AS7262

Tape & Reel 2000 pcs/reel

Note(s):

1. Required companion serial flash memory (must be ams verified) is ordered from the flash memory supplier (e.g. AT25SF041-SSHD-B

from Adesto Technologies).

2. AS7262 flash memory software is available from ams.

Buy our products or get free samples online at:

www.ams.com/ICdirect

Technical Support is available at:

www.ams.com/Technical-Support

Provide feedback about this document at:

www.ams.com/Document-Feedback

For further information and requests, e-mail us at:

ams_sales@ams.com

For sales offices, distributors and representatives, please visit:

www.ams.com/contact

Headquarters

ams AG

Tobelbader Strasse 30

8141 Premstaetten

Austria, Europe

Tel: +43 (0) 3136 500 0

Website: www.ams.com

ams Datasheet

Page 41

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AS7262 − RoHS Compliant & ams Green Statement

RoHS: The term RoHS compliant means that ams AG products

fully comply with current RoHS directives. Our semiconductor

products do not contain any chemicals for all 6 substance

categories, including the requirement that lead not exceed

0.1% by weight in homogeneous materials. Where designed to

be soldered at high temperatures, RoHS compliant products are

suitable for use in specified lead-free processes.

RoHS Compliant & ams Green

Statement

ams Green (RoHS compliant and no Sb/Br): ams Green

defines that in addition to RoHS compliance, our products are

free of Bromine (Br) and Antimony (Sb) based flame retardants

(Br or Sb do not exceed 0.1% by weight in homogeneous

material).

Important Information: The information provided in this

statement represents ams AG knowledge and belief as of the

date that it is provided. ams AG bases its knowledge and belief

on information provided by third parties, and makes no

representation or warranty as to the accuracy of such

information. Efforts are underway to better integrate

information from third parties. ams AG has taken and continues

to take reasonable steps to provide representative and accurate

information but may not have conducted destructive testing or

chemical analysis on incoming materials and chemicals. ams AG

and ams AG suppliers consider certain information to be

proprietary, and thus CAS numbers and other limited

information may not be available for release.

Page 42

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AS7262 − Copyrights & Disclaimer

Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten,

material herein may not be reproduced, adapted, merged,

translated, stored, or used without the prior written consent of

the copyright owner.

Copyrights & Disclaimer

Devices sold by ams AG are covered by the warranty and patent

indemnification provisions appearing in its General Terms of

Trade. ams AG makes no warranty, express, statutory, implied,

or by description regarding the information set forth herein.

ams AG reserves the right to change specifications and prices

at any time and without notice. Therefore, prior to designing

this product into a system, it is necessary to check with ams AG

for current information. This product is intended for use in

commercial applications. Applications requiring extended

temperature range, unusual environmental requirements, or

high reliability applications, such as military, medical

life-support or life-sustaining equipment are specifically not

recommended without additional processing by ams AG for

each application. This product is provided by ams AG “AS IS”

and any express or implied warranties, including, but not

limited to the implied warranties of merchantability and fitness

for a particular purpose are disclaimed.

ams AG shall not be liable to recipient or any third party for any

damages, including but not limited to personal injury, property

damage, loss of profits, loss of use, interruption of business or

indirect, special, incidental or consequential damages, of any

kind, in connection with or arising out of the furnishing,

performance or use of the technical data herein. No obligation

or liability to recipient or any third party shall arise or flow out

of ams AG rendering of technical or other services.

ams Datasheet

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AS7262 − Document Status

Document Status

Product Status

Definition

Information in this datasheet is based on product ideas in

the planning phase of development. All specifications are

design goals without any warranty and are subject to

change without notice

Product Preview

Pre-Development

Information in this datasheet is based on products in the

design, validation or qualification phase of development.

The performance and parameters shown in this document

are preliminary without any warranty and are subject to

change without notice

Preliminary Datasheet

Datasheet

Pre-Production

Production

Information in this datasheet is based on products in

ramp-up to full production or full production which

conform to specifications in accordance with the terms of

ams AG standard warranty as given in the General Terms of

Trade

Information in this datasheet is based on products which

conform to specifications in accordance with the terms of

ams AG standard warranty as given in the General Terms of

Trade, but these products have been superseded and

should not be used for new designs

Datasheet (discontinued)

Discontinued

Page 44

amsDatasheet

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AS7262 − Revision Information

Initial production version 1-00 for release

Revision Information

ams Datasheet

Page 45

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AS7262 − Content Guide

1

2

General Description

Key Benefits & Features

Applications

Content Guide

Block Diagram

3

5

6

8

Pin Assignments

Absolute Maximum Ratings

Electrical Characteristics

Timing Characteristics

11 Optical Characteristics

12 Typical Optical Characteristics

13 Detailed Description

13 6-Channel Visible Spectral_ID Detector

14 Data Conversion Description

16 RC Oscillator

16 Temperature Sensor

16 Reset

16 Indicator LED

17 Electronic Shutter with LED_DRV Driver Control

17 Interrupt Operation

17 I²C Slave Interface

18 I²C Feature List

18 I²C Virtual Register Write Access

19 I²C Virtual Register Byte Write

20 I²C Virtual Register Read Access

20 I²C Virtual Register Byte Read

21 4-Byte Floating-Point (FP) Registers

22 I²C Virtual Register Set

24 Detailed Register Description

30 UART Interface

30 UART Feature List

30 Theory of Operation

30 Transmission

30 Reception

31 AT Command Interface

34 Application Information

34 Schematic

34 PCB Layout

35 Package Drawings & Markings

36 PCB Pad Layout

37 Mechanical Data

38 Soldering & Storage Information

38 Soldering Information

39 Manufacturing Process Considerations

39 Storage Information

39 Moisture Sensitivity

39 Shelf Life

40 Floor Life

40 Rebaking Instructions

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AS7262 − Content Guide

41 Ordering & Contact Information

42 RoHS Compliant & ams Green Statement

43 Copyrights & Disclaimer

44 Document Status

45 Revision Information

ams Datasheet

[v1-00] 2016-Dec-16

Page 47

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型号：	AS7262-BLGT
厂家：	AMS(艾迈斯)
描述：	6 visible channels: 450nm, 500nm, 550nm, 570nm, 600nm and 650nm, each with 40nm FWHM
文件：	总47页 (文件大小：677K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AS7262-BLGT [AMSCO]

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