ARA05050_12 [ANADIGICS]
Reverse Amplifier with Step Attenuator; 反向放大器,步进衰减器型号: | ARA05050_12 |
厂家: | ANADIGICS, INC |
描述: | Reverse Amplifier with Step Attenuator |
文件: | 总14页 (文件大小:471K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ara05050
ReverseꢀAmplifierꢀwithꢀStepꢀAttenuator
Data Sheet - Rev 2.7
features
•ꢀ LowꢀCostꢀIntegratedꢀMonolothicꢀGaAsꢀAmplifierꢀ
With Step Attenuator
•ꢀ Attenuation Range: 0-30 dB, Adjustable In
2dB Increments Via a 4 Wire Parallel Control
•ꢀ Meets DOCSIS Distortion Requirements at
+58dBmV Output Signal Level
•ꢀ Low Distortion and Low Noise
•
Low Signal toNoise Ratio at All Gain Levels
•ꢀ Frequency Range: 5-100 MHz
•ꢀ 5 Volt Operation
•ꢀ RoHS-Compliant Package Option
applications
s12 pꢄꢊkꢄgꢃ
•
MCNS/DOCSIS Compliant Cable Modems
•ꢀ CATV Interactive Set-Top Box
•ꢀ OpenCable Set-Top Box
28 pꢀꢋ ssop wꢀꢈh Hꢃꢄꢈ sꢅꢁg
•
•
Fiber Nodes
Cable Modem Termination Systems (CMTS)
product description
The ARA05050 is a GaAs IC designed to provide the
reverseꢀpathꢀamplificationꢀ andꢀoutputꢀlevelꢀcontrolꢀ
functions in a CATV Set-Top Box or Cable Modem.
It incorporates a digitally controlled precision step
attenuator that is preceded by an ultra low noise
amplifierꢀstage,ꢀandꢀfollowedꢀbyꢀanꢀultra-linearꢀoutputꢀ
driverꢀamplifier.ꢀThisꢀdeviceꢀisꢀcapableꢀofꢀmeetingꢀ
the MCNS/DOCSIS requirements for harmonic
performance at a +58dBmV output level while requiring
only a single polarity +5V supply. Both the input
and the output are single-ended and matched to 75
Ohms. The precision attenuator provides up to 30 dB
of attenuation in 2 dB increments. The ARA05050 is
offered in a 28-pin SSOP package that features a heat
slug on the bottom of the package, and is available in
a RoHS-compliant option.
4
Attenuation Control
Upstream
ARA05050
LPF
Balun
QPSK/16QAM
Switch
RAM
ROM
Modulator
Clock
Data
Data
Transmit Enable/Disable
Microcontroller
with Ethernet
MAC
5-42 MHz
MAC
Clock
44 MHz
SAW
Filter
Double-
Conversion
Tuner
QAM Receiver
with FEC
54-860 MHz
RJ45
Connector
10Base-T
Transceiver
Diplexer
fꢀgꢁꢂꢃ 1. cꢄbꢅꢃ Mꢆꢇꢃm ꢆꢂ sꢃꢈ tꢆꢉ Bꢆx aꢉꢉꢅꢀꢊꢄꢈꢀꢆꢋ dꢀꢄgꢂꢄm
04/2012
ARA05050
RFOUT1
ATTIN
ATTOUT
RF IN2
30 dB, 2dBstep digital attenuator section
A1
A2
RFIN
RFOUT2
ISET1
16 dB
8 dB
4 dB
2 dB
ISET2
fꢀgꢁꢂꢃ 2: fꢁꢋꢊꢈꢀꢆꢋꢄꢅ Bꢅꢆꢊk dꢀꢄgꢂꢄm
N/C
N/C
1
28
Bypass
ATTIN
N/C
2
3
27
26
25
24
23
22
21
20
19
ATTOUT
RFOUT1
VREF1
ISET2
4
RFIN2
5
ATTACG1
ATTACG2
ATTACG2
ATTACG2
ATTACG2
6
ATTACG1
7
ATTACG1
ATTACG1
8
9
RFIN
ISET1
VATT
VREF2
RFOUT2
GND
10
11
12
13
14
18
17
16
15
16 dB
8 dB
2 dB
4 dB
fꢀgꢁꢂꢃ 3: pꢀꢋꢆꢁꢈ
Data Sheet - Rev 2.7
04/2012
2
ARA05050
tꢄbꢅꢃ 1: pꢀꢋ dꢃꢌꢊꢂꢀꢉꢈꢀꢆꢋ
description pin naMe
pin
naMe
description
(1)
1
2
3
4
N/C
No Connection
28
27
26
25
N/C
N/C
No Connection (1)
No Connection (1)
Bypass Internal Bypass
ATTIN
Attenuator Input(2)
ATTOUT Attenuator Output (2)
RFOUT1
Amplifier A1 Output and Supply
ISET2
Amplifier A2 Current Adjust (4)
Amplifier A2 Input (4)
Reference Voltage for Amplifier
A1
5
6
V
REF1
24
RFIN2
ATTACG1 Attenuator AC Ground 1(3)
ATTACG1 Attenuator AC Ground 1(3)
23 ATTACG2 Attenuator AC Ground 2 (3)
22 ATTACG2 Attenuator AC Ground 2 (3)
7
8
ATTACG1 Attenuator AC Ground 1(3)
ATTACG1 Attenuator AC Ground 1(3)
21 ATTACG2 Attenuator AC Ground 2 (3)
20 ATTACG2 Attenuator AC Ground 2 (3)
9
10
11
12
13
RFIN
Amplifier A1 Input(4)
19
18
17
16
15
V
REF2
Reference Voltage for Amplifier A2
ISET1
Amplifier A1 Current Adjust(4)
Attenuator Supply
RFOUT2 Amplifier A2 Output and Supply
V
ATT
GND
2 dB
4 dB
Ground
16 dB
8 dB
16 dB Attenution Control Bit
8 dB Attenution Control Bit
2 dB Attenuition Control Bit
4 dB Attenuition Control Bit
14
Notes:
(1) All N/C pins should be grounded.
(2) Pins should be AC-coupled. No external DC bias should be applied.
(3) Pins should be AC-grounded. No external DC bias should be applied.
(4) Pins should be grounded or pulled to ground through a resistor. No external DC bias should be applied.
Data Sheet - Rev 2.7
04/2012
3
ARA05050
electrical cHaracteristics
tꢄbꢅꢃ 2: abꢌꢆꢅꢁꢈꢃ Mꢀꢋꢀmꢁm ꢄꢋꢇ Mꢄxꢀmꢁm rꢄꢈꢀꢋgꢌ
paraMeter
Min
MaX
unit
Analog Supply: VSUP (pins 4, 12, 18)
0
9
VDC
V
SUP
Amplifier Reference Voltages (pins 5, 19)
-2.5
VDC
2
RF Power at Amplifier Inputs (pins 10, 24
Attenuator Controls (pins 13, 14, 15, 16)
Storage Temperature
)
-
0
+60
6
dBmV
V
-55
-
+200
260
5
°C
Soldering Temperature
°C
Soldering Time
-
Sec
sꢈꢂꢃꢌꢌꢃꢌ ꢀꢋ ꢃxꢊꢃꢌꢌ ꢆꢍ ꢈhꢃ ꢄbꢌꢆꢅꢁꢈꢃ ꢂꢄꢈꢀꢋgꢌ mꢄy ꢊꢄꢁꢌꢃ ꢉꢃꢂmꢄꢋꢃꢋꢈ ꢇꢄmꢄgꢃ. fꢁꢋꢊꢈꢀꢆꢋꢄꢅ
ꢆꢉꢃꢂꢄꢈꢀꢆꢋ ꢀꢌ ꢋꢆꢈ ꢀmꢉꢅꢀꢃꢇ ꢁꢋꢇꢃꢂ ꢈhꢃꢌꢃ ꢊꢆꢋꢇꢀꢈꢀꢆꢋꢌ. exꢉꢆꢌꢁꢂꢃ ꢈꢆ ꢄbꢌꢆꢅꢁꢈꢃ ꢂꢄꢈꢀꢋgꢌ ꢍꢆꢂ
ꢃxꢈꢃꢋꢇꢃꢇ ꢉꢃꢂꢀꢆꢇꢌ ꢆꢍ ꢈꢀmꢃ mꢄy ꢄꢇvꢃꢂꢌꢃꢅy ꢄꢍꢍꢃꢊꢈ ꢂꢃꢅꢀꢄbꢀꢅꢀꢈy.
Notes:
1. Pins 3 and 26 should be AC-coupled. No external DC bias should be applied.
2. Pins 10, 11, 24 and 25 should be grounded or pulled to ground through a resistor. No
external DC bias should be applied.
3. Pins 6, 7, 8, 9, 20, 21, 22 and 23 should be AC-grounded. No external DC bias should
be applied.
tꢄbꢅꢃ 3: oꢉꢃꢂꢄꢈꢀꢋg rꢄꢋgꢃꢌ
paraMeter
Min
tYp
MaX
unit
Amplifier Supply: VDD (pins 4, 18)
Attenuator Supply: VATTN (pin 12)
Attenuator Controls (pins 13, 14, 15, 16)
Amplifier Reference Voltages (pins 5, 19)
Output Switch Control (pin 25)
Case Temperature
4.5
-
5
5
7
7
VDC
VDC
V
0
-
5.5
-
-
1.75
-
VDC
V
0
5.5
85
-40
25
°C
thꢃ ꢇꢃvꢀꢊꢃ mꢄy bꢃ ꢆꢉꢃꢂꢄꢈꢃꢇ ꢌꢄꢍꢃꢅy ꢆvꢃꢂ ꢈhꢃꢌꢃ ꢊꢆꢋꢇꢀꢈꢀꢆꢋꢌ; hꢆwꢃvꢃꢂ, ꢉꢄꢂꢄmꢃꢈꢂꢀꢊ ꢉꢃꢂꢍꢆꢂmꢄꢋꢊꢃ ꢀꢌ
guaranteed only over the conditions defined in the electrical specifications.
Data Sheet - Rev 2.7
04/2012
4
ARA05050
tꢄbꢅꢃ 4: DC Electrical Specifications
TA=25°C; VDD, VATTn = +5.0 VDC
paraMeter
Min
tYp
MaX
unit
coMMents
Amplifier A1 Current (pin 4)
Amplifier A2 Current (pin 18)
Attenuator Current (pin 12)
Total Power Consumption
-
-
-
-
-
75
100
8
95
130
-
mA
mA
mA
W
0.92
36
1.2
-
C/W
Thermal Resistance (JC
)
tꢄbꢅꢃ 5: AC Electrical Specifications
TA=25°C; VDD, VATTn = +5.0 VDC
PARAMETER
MIN
TYP
MAX
UNIT
COMMENTS
32
33
Gain (10 MHz)
Gain Flatness
dB
0 dB attenuation setting
5 to 100 MHz
31
-
-
0.75
1.5
-
dB
Gain Variation over Te mperature
-0.006
dB/°C
Attenuation Steps
2 dB
4 dB
1.6
3.8
1.85
4.0
2.2
4.2
5 to 42 MHz (1)
Monotonic
,
dB
8 dB
8.0
8.3
8.5
16 dB
16.0
16.6
17.0
2nd Harmonic Distortion Level
5 MHz
-
-
-60
-63
-55
-55
dBc
dBc
+58 dBmV into 75 Ohms
+58 dBmV into 75 Ohms
25 MHz
3rd Harmonic Distortion Level
5 MHz
-
-
-63
-63
-60
-60
25 MHz
3rd Order Output Intercept
78
-
-
-
-
dBmV
dBmV
dB
1 dB Gain Compression Point
70
1.7
Noise Figure
-
2.5
Notes:
(1) See Figures 5 and 6 for performance at higher frequencies.
All specifications as measured in ANADIGICS test fixture.
Data Sheet - Rev 2.7
04/2012
5
ARA05050
ꢊꢆꢋꢈꢀꢋꢁꢃꢇ: AC Electrical Specifications
TA=25°C; VDD, VATTn = +5.0 VDC
paraMeter
Min
tYp
MaX
unit coMMents
Output Noise Power
-
-
-
-
-
-
Any 160 kHz bandwidth
from 5 to 42 MHz
Active/No Signal/Min. Atten. Set.
Active/No Signal/Max. Atten. Set.
dBmV
Input Impedance
Input Return Loss
Output Impedance
-
-
-
-
-75
-20
75
-
Ohms
dB
-15
-
75 system
75 system
Ohms
dB
Output Return Loss
-20
-15
Note: As measured in ANADIGICS test fixture
tꢄbꢅꢃ 6: Logic Interface Specifications
TA=25°C; VDD, VATTn = +5.0 VDC
paraMeter
Min
tYp
MaX
unit coMMents
Attenuator Control Logic
V
V
IN
,
LOW
0
2.8
-
-
0.5
5.5
Bypasses atten. stage
Enables atten. stage
V
IN,
HIGH
Attenuator Control Impedance
-
5 K
-
Ohms
Note:
(1) Specification applies when 470 Ohm resistor is connected from pin 2 to ground (see test circuit in Figure 4).
tꢄbꢅꢃ 7: aꢈꢈꢃꢋꢁꢄꢈꢆꢂ lꢆgꢀꢊ
attenuation (ꢇB)
0
L
L
L
L
2
H
L
L
L
4
L
H
L
L
6
H
H
L
8
L
L
H
L
10 12 14 16 18 20 22 24 26 28 30
2 dB Logic Input (pin 16)
4 dB Logic Input (pin 15)
8 dB Logic Input (pin 14)
16 dB Logic Input (pin 13)
H
L
L
H
H
L
H
H
H
L
L
L
H
L
L
H
L
H
H
L
L
L
H
L
L
H
H
H
H
H
H
H
H
L
L
L
H
H
H
H
L
H
H
H
H
Note: “L” = logic low, “H” = logic high
Data Sheet - Rev 2.7
04/2012
6
ARA05050
d B 2
d B 4
d B 8
B d 1
fꢀgꢁꢂꢃ 4: tꢃꢌꢈ cꢀꢂꢊꢁꢀꢈ
Data Sheet - Rev 2.7
04/2012
7
ARA05050
perforMance data
fꢀgꢁꢂꢃ 5: s21 (0 - 16 ꢇB aꢈꢈꢃꢋꢁꢄꢈꢀꢆꢋ)
fꢀgꢁꢂꢃ 6: s21 (16 - 30 ꢇB aꢈꢈꢃꢋꢁꢄꢈꢀꢆꢋ)
fꢀgꢁꢂꢃ 7: s11 - lꢆg sꢊꢄꢅꢃ
fꢀgꢁꢂꢃ 8: s22 - lꢆg sꢊꢄꢅꢃ
fꢀgꢁꢂꢃ 9: s11 - smꢀꢈh chꢄꢂꢈ
fꢀgꢁꢂꢃ 10: s22 - smꢀꢈh chꢄꢂꢈ
Data Sheet - Rev 2.7
04/2012
8
ARA05050
fꢀgꢁꢂꢃ 11: aꢈꢈꢃꢋꢁꢄꢈꢆꢂ swꢀꢈꢊhꢀꢋg sꢉꢃꢃꢇ - 16 ꢇB sꢈꢃꢉ
fꢀgꢁꢂꢃ 12: Hꢄꢂmꢆꢋꢀꢊ pꢃꢂꢍꢆꢂmꢄꢋꢊꢃ
Data Sheet - Rev 2.7
04/2012
9
ARA05050
application inforMation
thꢃꢂmꢄꢅ lꢄyꢆꢁꢈ cꢆꢋꢌꢀꢇꢃꢂꢄꢈꢀꢆꢋꢌ
pꢂꢀꢋꢈꢃꢇ cꢀꢂꢊꢁꢀꢈ Bꢆꢄꢂꢇ lꢄyꢆꢁꢈ cꢆꢋꢌꢀꢇꢃꢂꢄꢈꢀꢆꢋꢌ
The ARA05050 is a high-performance RF device.
Special consideration must be given to certain features
of the the printed circuit board layout, as they can
affect the RF performance of the IC. Refer to the
ANADIGICS application note “CATV ReverseAmp w/
Step Attenuator” for more details.
The device package for the ARA05050 features a
heat slug on the bottom of the package body. Use of
the heat slug is an integral part of the device design.
Soldering it to the ground plane of the PC board will
ensure the lowest possible thermal resistance for the
device, and will result in the longest MTF (mean time
to failure.)
AꢀPCꢀboardꢀlayoutꢀthatꢀoptimizesꢀtheꢀbenefitsꢀofꢀtheꢀ
heat slug is shown in fꢀgꢁꢂꢃ 13. The via holes located
under the body of the device must be plated through
to a ground plane layer of metal, in order to provide
sufficientꢀthermalꢀconductivity.ꢀꢀTheꢀrecommendedꢀ
solder mask outline is shown in fꢀgꢁꢂꢃ 14.
Amplifier Enable / Disable
TheꢀARA05050ꢀ includesꢀ twoꢀ amplificationꢀ stagesꢀ
that each can be shut down through external control
pins Vref1 and Vref2 (pins 5 and 19, respectively.)
By applying a typical bias of 1.75 Volts to these pins,
theꢀamplifiersꢀareꢀenabled.ꢀꢀInꢀorderꢀtoꢀfullyꢀdisableꢀ
anꢀamplifier,ꢀꢀitsꢀcontrolꢀpinꢀrequiresꢀaꢀnegativeꢀbiasꢀ
of -1.5 to -2.0 Volts.
esd sꢃꢋꢌꢀꢈꢀvꢀꢈy
Electrostatic discharges can cause permanent damage
to this device. Electrostatic charges accumulate on test
equipment and the human body, and can discharge
without detection. Proper precautions and handling
are strongly recommended. Refer to theANADIGICS
application note on ESD precautions.
Amplifier Bias Current
The Iset pins (11 and 25) set the bias current for the
amplificationꢀstages.ꢀꢀGroundingꢀtheseꢀpinsꢀresultsꢀ
in the maximum possible current. By placing a
resistor from the pin to ground, the current can be
reduced. The recommended bias conditions use the
configurationꢀshownꢀinꢀtheꢀtestꢀcircuitꢀschematicꢀinꢀ
fꢀgꢁꢂꢃ 4.
0.025BSC
0.089
0.014TYP
BODY OUTLINE
(NOMINAL)
0.025MIN.
0.163
0.099
0.152
REF.
0.070
0.197
0.150
(12X)0.020TO 0.060DIA.P
PLATED THRUHOLES.
0.060TYP.
0.386REF.
0.400
fꢀgꢁꢂꢃ 13: pc Bꢆꢄꢂꢇ lꢄyꢆꢁꢈ
Data Sheet - Rev 2.7
04/2012
10
ARA05050
0.016TYP.
0.163
0.091
0.053
0.025TYP.
0.242
0.085
0.098
0.025BSC
0.145
DIMENSIONSARE ININCHES
fꢀgꢁꢂꢃ 14: sꢆꢅꢇꢃꢂ Mꢄꢌk oꢁꢈꢅꢀꢋꢃ
Data Sheet - Rev 2.7
04/2012
11
ARA05050
pacKaGe outline
fꢀgꢁꢂꢃ 15: s12 pꢄꢊkꢄgꢃ oꢁꢈꢅꢀꢋꢃ - 28 pꢀꢋ ssop wꢀꢈh Hꢃꢄꢈ sꢅꢁg
Data Sheet - Rev 2.7
04/2012
12
ARA05050
coMponent pacKaGinG
Volume quantities of the ARA05050 are supplied on
tape and reel. Each reel holds 3,500 pieces. Smaller
quantities are available in plastic tubes of 50 pieces.
fꢀgꢁꢂꢃ 16: rꢃꢃꢅ dꢀmꢃꢋꢌꢀꢆꢋꢌ
fꢀgꢁꢂꢃ 17: tꢄꢉꢃ dꢀmꢃꢋꢌꢀꢆꢋꢌ
Data Sheet - Rev 2.7
04/2012
13
ARA05050
orderinG inforMation
teMperature
pacKaGe
description
order nuMBer
ARA05050S12CTR
ARA05050S12C
coMponent pacKaGinG
3,500 piece tape and reel
ranGe
28 Pin SSOP
with Heat Slug
-40 to 85 0C
28 Pin SSOP
with Heat Slug
-40 to 85 0C
-40 to 85 0C
Plastic tubes (50 pieces per tube)
RoHS-compliant
28 Pin SSOP
with Heat Slug
ARA05050RS12P1
3,500 piece tape and reel
anaDigiCS, iꢀc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: Mktg@anadigics.com
iMPOrTanT nOTiCE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers
to verify that the information they are using is current before placing orders.
warning
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of anANADIGICS product
in any such application without written consent is prohibited.
Data Sheet - Rev 2.7
04/2012
14
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