AWT6223RM26P8 [ANADIGICS]

WCDMA/GSM/GPRS/Polar EDGE Power Amplifier Module with Integrated Power Control; WCDMA / GSM / GPRS /极性EDGE功率放大器模块集成功率控制
AWT6223RM26P8
型号: AWT6223RM26P8
厂家: ANADIGICS, INC    ANADIGICS, INC
描述:

WCDMA/GSM/GPRS/Polar EDGE Power Amplifier Module with Integrated Power Control
WCDMA / GSM / GPRS /极性EDGE功率放大器模块集成功率控制

电信集成电路 放大器 功率控制 功率放大器 CD GSM
文件: 总16页 (文件大小:563K)
中文:  中文翻译
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ꢁWt6223ꢃ  
WCDMꢁ/GsM/GPꢃs/Polar ꢀDGꢀ  
Power Amplifier Module  
with Integrated Power Control  
Daꢄa sheeꢄ - ꢃꢀv 2.0  
Fꢀꢁtꢂꢃꢀs  
•ꢀ InGaP HBT Technology  
•ꢀ Optimized for a 50 System  
•ꢀ Internal Reference Voltage  
•ꢀ Integrated GSM/EDGE Power Control with Tem-  
perature Compensation  
•ꢀ Low Profile Surface Mount Package:  
6 mm x 8 mm x 1 mm  
•ꢀ RoHS Compliant Package, 250 oC MSL-3  
WCDMꢁ MODꢀ  
•ꢀ HSDPA Compliant  
•ꢀ High Efficiency:  
41% @ POUT = +28.5 dBm  
21% @ POUT = +16 dBm  
•ꢀ Low Quiescent Current: 12 mA  
InGaP HBT MMIC technology to provide reliability,  
temperature stability, and ruggedness. This penta-  
band module consists of three amplifier chains; one  
to support GSM/GPRS/EGPRS in cellular bands, one  
to support GSM/GPRS/EGPRS in DCS/PCS bands,  
and one to support WCDMA in the IMT band. In ad-  
dition, the AWT6223R module includes an internal  
reference voltage and integrated power control with  
temperature compensation for use in GMSK and  
8-PSK modes of operation. These features facilitate  
fast and easy production calibration, minimize per-  
formance variation over temperature, and reduce the  
number of external components required.  
Low Leakage Current in Shutdown Mode: <1 A  
Internal Voltage Regulator Eliminates the Need for  
External Reference Voltage  
The WCDMA PA incorporates ANADIGICS’ HELP2TM  
technology. Through selectable bias modes, the  
AWT6223R achieves optimal efficiency across  
different output power levels, specifically at low  
and mid-range power levels where the PA typically  
operates, thereby dramatically increasing handset  
talk-time and standby-time. Its built-in voltage regulator  
eliminates the need for an external reference voltage  
and switch components, reducing PCB area and BOM  
costs. All of the RF ports for this device are internally  
matched to 50 . The RF inputs GSM_IN and DCS/  
PCS_IN both have shunt resistors to ground to main-  
tain a good input VSWR as the VRAMP power control  
voltage is varied. Internal DC blocks are provided at  
the RF outputs.  
•ꢀ VEN = +2.4 V (+2.2 V min over Temp)  
GMsK MODꢀ  
•ꢀ +35 dBm GSM850/900 Output Power  
+33 dBm DCS/PCS Output Power  
•ꢀ 55 % GSM850/900 PAE  
•ꢀ 50 % DCS/PCS PAE  
•ꢀ Power Control Range > 50 dB  
•ꢀ EGPRS Capable (class 12)  
ꢀDGꢀ MODꢀ  
+29 dBm GSM850/900 Output Power  
+28.5 dBm DCS/PCS Output Power  
•ꢀ 27 % GSM850/900 PAE  
•ꢀ 30 % DCS/PCS PAE  
•ꢀ -63 dBc/30 kHz Typical ACPR (400 kHz)  
CEXT2  
•ꢀ -77 dBc/30 kHz Typical ACPR (600 kHz)  
22  
VCC_WCDMA  
1
2
21  
20  
19  
18  
17  
WCDMA_IN  
ꢁPPLICꢁtIONs  
VMODE  
WCDMA_OUT  
GND  
3G Handsets, Smartphones, Data Devices Incor-  
porating:  
Voltage Regulator  
and Bias Control  
VEN  
DCS/PCS_IN  
BS  
3
DCS/PCS_OUT  
4
WCDMA (IMT)  
•ꢀGSM850/GSM900/DCS/PCS Bands  
GMSK and 8-PSK (Open Loop Polar)  
Modulations  
5
GND  
6
GND  
TX_EN  
VBATT  
16  
15  
CMOS Bias/Power  
Controller  
7
CEXT3  
8
CEXT1  
GND  
14  
13  
12  
PꢃODꢂCt DꢀsCꢃIPtION  
9
VRAMP  
GND  
The AWT6223R WEDGE module supports dual, tri,  
or quad band operation using GMSK/GPRS and  
8-PSK (open loop polar) modulations, and WCDMA  
operation in the IMT band. The AWT6223R mod-  
ule is manufactured using ANADIGICS’ advanced  
GSM850/900_IN  
GSM850/900_OUT  
10  
11  
VCC_GSM  
Figure 1: Block Diagram  
11/2008  
ꢁWt6223ꢃ  
CEXT2  
VCC_WCDMA  
1
2
22  
21  
20  
19  
18  
17  
WCDMA_IN  
VMODE  
WCDMA_OUT  
GND  
3
VEN  
DCS/PCS_IN  
BS  
DCS/PCS_OUT  
4
5
GND  
GND  
6
GND  
TX_EN  
VBATT  
16  
15  
7
CEXT3  
8
GND  
CEXT1  
14  
13  
12  
9
VRAMP  
GND  
GSM850/900_IN  
GSM850/900_OUT  
10  
11  
VCC_GSM  
Figure 2: Pinouꢄ (X - ray top view)  
table 1: Pin Deꢅcripꢄion  
PIN  
NꢁMꢀ  
WCDMA_IN  
DꢀsCꢃIPtION  
PIN  
NꢁMꢀ  
DꢀsCꢃIPtION  
1
2
3
4
WCDMA RF Input  
12 GSM850/900_OUT GSM850/900 RF Output  
WCDMA Mode Control  
Voltage  
V
MODE  
13  
14  
15  
GND  
GND  
Ground  
Ground  
V
EN  
WCDMA Shutdown  
Bypass for Power Control  
Regulator  
DCS/PCS_IN  
DCS/PCS RF Input  
C
EXT3  
5
6
7
BS  
Band Select Logic Input  
TX Enable Logic Input  
Battery Supply  
16  
17  
18  
GND  
GND  
Ground  
Ground  
T
X
_EN  
V
BATT  
DCS/PCS_OUT DCS/PCS RF Output  
Bypass for Internal  
Voltage Regulator  
8
9
C
EXT1  
19  
GND  
Ground  
Analog signal used to  
control the GSM output  
power  
V
RAMP  
20  
21  
22  
WCDMA_OUT  
WCDMA RF Output  
10 GSM850/900_IN GSM850/900 RF Input  
CC test point for GSM  
V
CC_WCDMA  
WCDMA Supply Voltage  
Bypass for WCDMA VCC1  
V
11  
V
CC_GSM  
secton. Do not connect.  
Do not ground.  
C
EXT2  
Data Sheet - Rev 2.0  
2
11/2008  
ꢁWt6223ꢃ  
ꢀLꢀCtꢃICꢁL CHꢁꢃꢁCtꢀꢃIstICs  
table 2: ꢁbꢅoluꢄe Maximum ꢃaꢄingꢅ  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
MꢁX  
ꢂNIts  
Supply Voltage (VBATT  
)
-
-
+6  
+5  
V
V
Supply Voltage (VCC_WCDMA  
)
RF Input Power (RFIN  
GSM/EDGE Output Control Voltage (VRAMP  
WCDMA Control Voltages (VMODE, VEN  
Storage Temperature (TSTG  
)
-
10  
dBm  
V
)
-0.3  
0
1.8  
3.5  
150  
)
V
)
-55  
°C  
Stresses in excess of the absolute ratings may cause permanent damage.  
Functional operation is not implied under these conditions. Exposure  
to absolute ratings for extended periods of time may adversely affect  
reliabiliꢄy.  
CEXT2  
>+2500 V <-2500 V  
WCDMA_IN  
>+1500 V <-1500 V  
VCC_WCDMA  
>+1300 V <-1300 V  
1
2
22  
21  
20  
19  
18  
17  
VMODE  
>+1500 V <-1500 V  
WCDMA_OUT  
>+1500 V <-1500 V  
VEN  
3
GND  
>+1500 V <-1500 V  
DCS/PCS_IN  
>+2500 V <-2500 V  
DCS/PCS_OUT  
>+2500 V <-2500 V  
4
BS  
5
GND  
GND  
>+2500 V <-2500 V  
GND  
TX_EN  
>+2500 V <-2500 V  
VBATT  
>+2500 V <-2500 V  
6
16  
15  
CEXT3  
>+2500 V <-2500 V  
7
CEXT1  
>+2500 V <-2500 V  
8
GND  
14  
13  
12  
VRAMP  
>+2500 V <-2500 V  
9
GND  
GSM850/900_IN  
>+2500 V <-2500 V  
GSM850/900_OUT  
>+2500 V <-2500 V  
10  
11  
VCC_GSM  
>+2500 V <-2500 V  
Figure 3: ꢀsD Pin ꢃaꢄing  
Electrostatic Discharge Sensitivity  
The AWT6223R part was tested to determine the •ꢀ Rating for WCDMA_IN, VMODE, VEN, and  
ESD sensitivity of each package pin with respect  
WCDMA_OUT is +1500V and -1500V;  
to Ground. Non-ground pins are stressed with 1 •ꢀ Rating for VCC_WCDMA is +1300V and -1300V;  
positive pulse or 1 negative pulse with respect to •ꢀ Rating for DCS/PCS_IN, BS, Tx_EN, VBATT,  
the Ground using the Human Body Model appara-  
tus and waveform outlined in JESD22-A114C.01.  
Determination of pass or fail is made according to  
whether the part passes key RF tests against the  
datasheet limits after stress. Results of the test are  
presented in Figure 3:  
CEXT1, VRAMP, GSM_IN, VCC_GSM, GSM_OUT,  
CEXT3 and DCS/PCS_OUT is +2500V and  
-2500V  
It is very important to take all necessary precautions,  
listed in Application Notes “ESD precautions for  
ANADIGICS GaAs MMIC,” to avoid ESD damage to  
Data Sheet - Rev 2.0  
11/2008  
3
ꢁWt6223ꢃ  
Table 3: GSM/EDGE Operating Conditions  
PꢁꢃꢁMꢀtꢀꢃ  
MIN tYP MꢁX ꢂNIts  
COMMꢀNts  
Case temperature (T  
C
)
-20  
3.0  
-
85  
°C  
V
Supply voltage (VBATT  
)
3.5  
4.8  
V
V
BATT = VCC_WCDMA = 4.8 V, VEN = 0 V,  
MODE = 0 V, BS = 0 V, VRAMP = 0 V,  
Total Power Supply Leakage  
Current  
A  
-
1
10  
TX_EN = LOW, No RF applied  
Control Voltage Range  
0.2  
-
-
1.6  
V
V
P
RAMP = 0.2 V, TX_EN = LOW YHIGH  
IN = 5 dBm  
s  
Turn On Time (TON  
)
-
1
V
P
RAMP = 0.2 V, TX_EN = LOW YHIGH  
IN = 5 dBm  
s  
Turn Off Time (TOFF  
)
-
-
1
s  
s  
Rise Time (TRISE  
Fall Time (TFALL  
)
-
-
-
-
-
-
-
1
1
P
OUT = -10 dBm YPMAX (within 0.2 dB)  
)
POUT = PMAX Y-10 dBm (within 0.2 dB)  
V
V
RAMP Input Capacitance  
RAMP Input Current  
3
-
-
pF  
A  
10  
50  
Duty Cycle  
-
%
The device may be operated safely over these conditions; however, parametric performance is guaranteed only  
over the conditions defined in the electrical specifications.  
Notes:  
1. Do not apply a DC voltage to the GSM_IN or DCS/PCS_IN RF inputs.  
table 4: GsM/ꢀDGꢀ Digiꢄal Inpuꢄꢅ  
PꢁꢃꢁMꢀtꢀꢃ  
sYMBOL  
MIN tYP MꢁX ꢂNIts  
Logic High Voltage  
Logic Low Voltage  
Logic High Current  
Logic Low Current  
V
IH  
1.2  
-
-
-
-
3.0  
0.5  
30  
V
V
IL  
-
-
-
V
A  
A  
|IIH  
|
|IIL  
|
30  
table 5: GsM/ꢀDGꢀ Logic Conꢄrol  
OPꢀꢃtIONꢁL MODꢀ  
Bs  
LOW  
HIGH  
-
tX_ꢀN  
GSM850/900  
DCS/PCS  
PA DISABLED  
Notes:  
HIGH  
HIGH  
LOW  
1. VBATT must be applied before taking BS and/or TX_EN High.  
Data Sheet - Rev 2.0  
4
11/2008  
ꢁWt6223ꢃ  
Table 6: Electrical Characteristics for GSM850 GMSK Mode  
(Unless Otherwise Specified: VBATT = 3.5 V, PIN = 3.0 dBm, Pulse Width =1154 µs, Duty = 25%,  
ZIN = ZOUT = 50 , TC = 25 °C, VRAMP = 1.6 V, BS = LOW, TX_EN = HIGH, VꢀN = LOW)  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
824  
0
tYP  
-
MꢁX  
849  
5
ꢂNIt  
MHz  
dBm  
dBm  
COMMꢀNts  
Operating Frequency  
Input Power  
(Fo)  
3
Output Power, PMAX  
34.5  
35  
-
Freq = 824 to 849 MHz  
V
P
BATT = 3.0 V, T  
IN = 0 dBm  
C
= 85 °C  
Degraded Output Power  
32.0  
32.5  
-
dBm  
PAE @ PMAX  
48  
-
52  
-42  
-25  
-
%
Freq = 824 to 849 MHz  
Forward Isolation 1  
Forward Isolation 2  
Cross Isolation  
-30  
-20  
dBm  
dBm  
TX  
_EN = LOW, PIN = 5 dBm  
-
TX  
_EN = HIGH,VRAMP = 0.2V, PIN = 5 dBm  
2F  
3F  
o
@ DCS/PCS port  
@ DCS/PCS port  
-
-
-36  
-25  
-20  
-20  
dBm  
V
RAMP =0.2V to VRAMP_MAX  
o
Second Harmonic  
Third Harmonic  
-
-
-20  
-10  
-10  
dBm  
dBm  
Over all output power levels  
Over all output power levels  
-30  
n x F  
o (n > 4),  
-
-30  
-10  
dBm  
Over all output power levels  
F
o
12.75 GHz  
VSWR = 8:1 All Phases , POUT < 34.5 dBm  
Stability  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz  
OUT > 1 GHz  
No Permanent Degradation,  
VSWR 10:1, All Phase Angles  
Ruggedness  
POUT < 34.5 dBm  
F
F
TX = 849 MHz, RBW = 100 kHz  
RX = 869 to 894 MHz, POUT < 34.5 dBm  
RX Noise Power  
Input Return Loss  
-
-
-86  
-83  
dBm  
1.5:1 2.5:1 VSWR Over all output power levels  
Data Sheet - Rev 2.0  
5
11/2008  
ꢁWt6223ꢃ  
Table 7: Electrical Characteristics for GSM900 GMSK Mode  
(Unless Otherwise Specified: VBATT = 3.5 V, PIN = 3.0 dBm, Pulse Width =1154 µs, Duty = 25%,  
ZIN = ZOUT = 50 , TC = 25 °C, VRAMP = 1.6 V, BS = LOW, TX_EN = HIGH, VꢀN = LOW)  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
880  
0
tYP  
-
MꢁX  
915  
5
ꢂNIt  
MHz  
dBm  
dBm  
COMMꢀNts  
Operating Frequency  
Input Power  
( Fo )  
3
Output Power, PMAX  
34.5  
35  
-
Freq = 880 to 915 MHz  
VBATT = 3.0 V, TC = 85 °C  
PIN = 0 dBm  
Degraded Output Power  
32.0  
32.5  
-
dBm  
PAE @ PMAX  
50  
-
55  
-40  
-25  
-
%
Freq = 880 to 915 MHz  
Forward Isolation 1  
Forward Isolation 2  
Cross Isolation  
-30  
-20  
dBm  
dBm  
TX_EN = LOW, PIN = 5 dBm  
-
TX_EN = HIGH,VRAMP = 0.2V, PIN = 5 dBm  
2F  
3F  
o
@ DCS/PCS port  
@ DCS/PCS port  
-
-
-34  
-22  
-20  
-17  
dBm  
VRAMP =0.2V to VRAMP_MAX  
o
Second Harmonic  
Third Harmonic  
-
-
-25  
-27  
-10  
-10  
dBm  
dBm  
Over all output power levels  
Over all output power levels  
n x F  
o (n > 4),  
-
-30  
-10  
dBm  
Over all output power levels  
F
o
12.75 GHz  
VSWR = 8:1 All Phases , POUT < 34.5 dBm  
Stability  
-
-
-
-
-36  
-30  
dBm  
dBm  
FOUT < 1 GHz  
FOUT > 1 GHz  
No Permanent Degradation,  
VSWR 10:1, All Phase Angles  
Ruggedness  
POUT < 34.5 dBm  
FTX = 915 MHz, RBW = 100 kHz  
FRX = 925 to 935 MHz, POUT < 34.5 dBm  
-
-83  
-86  
-77  
dBm  
dBm  
RX Noise Power  
Input Return Loss  
FTX = 915 MHz, RBW = 100 kHz  
FRX = 935 to 960 MHz, POUT < 34.5 dBm  
-
-
-83  
1.5:1 2.5:1 VSWR Over all output power levels  
Data Sheet - Rev 2.0  
6
11/2008  
ꢁWt6223ꢃ  
Table 8: Electrical Characteristics for GSM850 8PSK Mode  
(Unless Otherwise Specified: VBATT = 3.5 V, PIN = 3.0 dBm, Pulse Width =1154 µs, Duty = 25%  
ZIN = ZOUT = 50 , TC = 25 °C, BS = LOW, TX_EN = HIGH, VꢀN = LOW)  
PꢁꢃꢁMꢀtꢀꢃ  
Operating Frequency  
Input Power  
MIN  
tYP  
MꢁX  
ꢂNIt  
MHz  
dBm  
%
COMMꢀNts  
824  
880  
-
-
849  
915  
(
FIN )  
0
3
5
-
F
P
IN = 824 to 849 MHz  
OUT set = +29 dBm  
PAE  
20  
27  
ACPR  
200 kHz  
400 kHz  
600 kHz  
1800 kHz  
-
-
-
-
-39  
-63  
-74  
-77  
-34  
-58  
-64  
-68  
dBc/30 kHz  
dBc/30 kHz All conditions under Polar operation  
dBc/30 kHz  
dBc/100 kHz  
POUT = +29 dBm  
All Conditions under Polar operation  
OUT = +29 dBm  
EVM  
-
1
5
%
P
Data Sheet - Rev 2.0  
7
11/2008  
ꢁWt6223ꢃ  
Table 9: Electrical Characteristics for DCS GMSK Mode  
(Unless Otherwise Specified: VBATT = 3.5 V, PIN = 3.0 dBm, Pulse Width =1154 µs, Duty = 25%,  
ZIN = ZOUT = 50 , TC = 25 °C, VRAMP = 1.6 V, BS = HIGH, TX_EN = HIGH, VꢀN = LOW)  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
tYP  
MꢁX  
ꢂNIt  
COMMꢀNts  
Operating Frequency  
Input Power  
1710  
0
-
1785  
MHz  
dBm  
dBm  
3.0  
33  
5
-
Output Power, PMAX  
32  
V
P
BATT = 3.0 V, T  
IN = 0 dBm  
C
= 85 °C  
Degraded Output Power  
29.5  
30.5  
-
dBm  
PAE @ PMAX  
45  
-
50  
-
%
Freq = 1710 to 1910 MHz  
Forward Isolation 1  
-40  
-33  
dBm  
T
X
_EN = LOW, PIN = 5dBm  
T
P
X
_EN =HIGH, VRAMP = 0.2 V,  
Forward Isolation 2  
-
-24  
-20  
dBm  
IN = 5 dBm  
Second Harmonic  
Third Harmonic  
-
-
-18  
-10  
-10  
dBm  
dBm  
Over all output power levels  
Over all output power levels  
-24  
n x F  
o (n > 4),  
-
-30  
-10  
dBm  
Over all output power levels  
F
o
12.75 GHz  
VSWR = 8:1 All Phases , POUT < 32 dBm  
Stability  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz  
OUT > 1 GHz  
No Permanent Degradation,  
VSWR 10:1, All Phase Angles  
Ruggedness  
POUT < 32 dBm  
F
F
TX = 1785 MHz, RBW = 100 kHz,  
RX =1805 to 1880 MHz, POUT < 32 dBm  
RX Noise Power  
Input Return Loss  
-
-
-86  
-80  
dBm  
1.5:1 2.5:1 VSWR Over all output power levels  
Data Sheet - Rev 2.0  
8
11/2008  
ꢁWt6223ꢃ  
Table 10: Electrical Characteristics for PCS GMSK Mode  
(Unless Otherwise Specified: VBATT = 3.5 V, PIN = 3.0 dBm, Pulse Width =1154 µs, Duty = 25%,  
ZIN = ZOUT = 50 , TC = 25 °C, VRAMP = 1.6 V, BS = HIGH, TX_EN = HIGH, VꢀN = LOW)  
PꢁꢃꢁMꢀtꢀꢃ  
MIN  
tYP  
MꢁX  
ꢂNIt  
COMMꢀNts  
Operating Frequency  
Input Power  
1850  
0
-
1910  
MHz  
dBm  
dBm  
3.0  
33  
5
-
Output Power, PMAX  
32  
V
P
BATT = 3.0 V, T  
IN = 0 dBm  
C
= 85 °C  
Degraded Output Power  
29.5  
30.5  
-
dBm  
PAE @ PMAX  
45  
-
50  
-
%
Freq = 1710 to 1910 MHz  
Forward Isolation 1  
-37  
-33  
dBm  
T
X
_EN = LOW, PIN = 5dBm  
T
P
X
_EN =HIGH, VRAMP = 0.2 V,  
Forward Isolation 2  
-
-22  
-18  
dBm  
IN = 5 dBm  
Second Harmonic  
Third Harmonic  
-
-
-28  
-24  
-10  
-10  
dBm  
dBm  
Over all output power levels  
Over all output power levels  
n x F  
o (n > 4),  
-
-30  
-10  
dBm  
Over all output power levels  
F
o
12.75 GHz  
VSWR = 8:1 All Phases , POUT < 32 dBm  
Stability  
-
-
-
-
-36  
-30  
dBm  
dBm  
F
F
OUT < 1 GHz  
OUT > 1 GHz  
No Permanent Degradation,  
VSWR 10:1, All Phase Angles  
Ruggedness  
POUT < 32 dBm  
F
F
TX = 1910 MHz, RBW = 100 kHz,  
RX =1930 to 1990 MHz, POUT < 32 dBm  
RX Noise Power  
Input Return Loss  
-
-
-86  
-80  
dBm  
1.5:1 2.5:1 VSWR Over all output power levels  
Data Sheet - Rev 2.0  
9
11/2008  
ꢁWt6223ꢃ  
Table 11: Electrical Characteristics for DCS 8PSK Mode  
(Unless Otherwise Specified: VBATT = 3.5 V, PIN = 3.0 dBm, Pulse Width =1154 µs, Duty = 25%,  
ZIN = ZOUT = 50 , TC = 25 °C , BS =HIGH, TX_EN = HIGH, VꢀN = LOW)  
PꢁꢃꢁMꢀtꢀꢃ  
Operating Frequency  
Input Power  
MIN  
tYP  
-
MꢁX  
ꢂNIt  
MHz  
dBm  
%
COMMꢀNts  
1710  
1850  
1785  
1910  
(
FIN )  
0
3
5
-
F
P
IN = 1710 to 1785 MHz  
OUT set = +28.5 dBm  
PAE  
25  
30  
ACPR  
200 kHz  
400 kHz  
600 kHz  
1800 kHz  
-
-
-
-
-38  
-64  
-77  
-77  
-34  
-58  
-64  
-68  
dBc/30 kHz  
dBc/30 kHz All conditions under Polar operation  
dBc/30 kHz  
dBc/100 kHz  
POUT = +28.5 dBm  
All Conditions under Polar operation  
OUT = +28.5 dBm  
EVM  
-
1
5
%
P
Data Sheet - Rev 2.0  
10  
11/2008  
ꢁWt6223ꢃ  
Table 12: WCDMA Operating Conditions  
PꢁꢃꢁMꢀtꢀꢃ  
Case temperature (T  
Supply Voltage (VCC  
MIN tYP MꢁX ꢂNIts  
COMMꢀNts  
C
)
-20  
-
85  
°C  
V
)
+3.2  
+3.4  
+4.2  
P
OUT < +28.5 dBm  
+2.2  
0
+2.4  
-
+3.1  
+0.5  
PA "on"  
PA "shut down"  
WCDMA Enable Voltage (VEN  
)
V
V
+2.2  
0
+2.4  
-
+3.1  
+0.5  
Low Bias Mode  
High Bias Mode  
Mode Control Voltage (VMODE  
RF Output Power (POUT  
)
)
3GPP  
+28.0 (1) +28.5  
+27.0 (1) +27.5  
+26.0 (1) +26.5  
+25.5 (1) +26.0  
-
-
-
-
HSDPA Case A  
HSDPA Case B  
HSDPA Case C  
1/15 < c/d < 12/15  
13/15 < c/d < 15/8  
15/7 < c/d < 15/0  
dBm  
The device may be operated safely over these conditions; however, parametric performance is guaranteed only  
over the conditions defined in the electrical specifications.  
Notes:  
(1) WCDMA operation at VCC = +3.2 V, Po u t is derated by 0.5 dB.  
(2) Do not apply a DC voltage to the WCDMA_IN RF input.  
table 13: WCDMꢁ Biaꢅ Conꢄrol  
P
Oꢂt  
ꢁPPLICtION  
WCDMA - low power  
WCDMA - high power  
Shutdown  
LꢀvꢀLs  
<+16 dBm  
>+16 dBm  
-
LOGIC  
Low  
v
ꢀN  
v
MODꢀ  
+2.4 V +2.4 V  
High  
+2.4 V  
0 V  
0 V  
Shutdown  
0 V  
Notes:  
1. For WCDMA operation set TX_EN = LOW.  
Data Sheet - Rev 2.0  
11/2008  
11  
ꢁWt6223ꢃ  
table 14: ꢀlecꢄrical Characꢄeriꢅꢄicꢅ for WCDMꢁ  
(Unless Otherwise Specified: TC = 25 °C, VBATT = +3.4 V, TX_EN = LOW, 50 system, VꢀN = 2.4 v)  
PꢁꢃꢁMꢀtꢀꢃ  
MIN tYP MꢁX  
1920 1980  
ꢂNIt  
COMMꢀNts  
Operating Frequency  
-
MHz  
24.5 26.5 28.5  
13.0 15.0 17.0  
P
P
OUT = +28.5 dBm, VMODE = 0 V  
OUT = +16 dBm, VMODE = +2.4 V  
Gain  
dB  
-
-
-40  
-43  
-38  
-38  
P
P
OUT = +28.5 dBm, VMODE = 0 V  
OUT = +16 dBm, VMODE = +2.4 V  
ACLR1 at 5 MHz offset (1)  
ACLR2 at 10 MHz offset  
Power-Added Efficiency (1)  
dBc  
dBc  
-
-
-56  
-52  
-48  
-48  
P
P
OUT = +28.5 dBm, VMODE = 0 V  
OUT = +16 dBm, VMODE = +2.4 V  
37  
18  
41  
21  
-
-
P
P
OUT = +28.5 dBm, VMODE = 0 V  
OUT = +16 dBm, VMODE = +2.4 V  
%
Quiescent Current (Icq)  
Enable Current  
MODE = +2.4 V  
-
-
-
-
-
12  
0.2  
3
20  
1
mA  
mA  
mA  
mA  
V
through VEN pin  
Battery Current  
5
through VBATT pin, VMODE = +2.4 V  
through VMODE pin, VMODE = +2.4 V  
Mode Control Current  
Noise in Receive Band  
0.3  
1
-138 -135 dBm/Hz 2110 MHz to 2170 MHz  
Harmonics  
2fo  
3fo, 4fo  
-
-
-43  
-50  
-35  
-35  
dBc  
P
OUT < +28.5 dBm  
Input Impedance  
-
-
2:1  
VSWR  
P
OUT < +28.5 dBm  
Spurious Output Level  
(all spurious outputs)  
In-band load VSWR < 5:1  
Out-of-band load VSWR < 10:1  
Applies over all operating conditions  
-
-
-70  
dBc  
Load mismatch stress with no  
permanent degradation or failure  
10:1  
-
-
VSWR Applies over full operating range  
Notes:  
(1) ACLR and Efficiency measured at 1950 MHz.  
Data Sheet - Rev 2.0  
12  
11/2008  
ꢁWt6223ꢃ  
ꢁPPLICꢁtION INFOꢃMꢁtION  
To ensure proper performance, refer to all related  
Application Notes on the ANADIGICS web site:  
http://www.anadigics.com  
appropriate logic level (see Operating Ranges table)  
to the VMODE voltage. The Bias Control table lists  
the recommended modes of operation for various  
applications.  
Shutdown Mode  
The WCDMA power amplifier may be placed in a  
shutdown mode by applying logic low levels (see  
Operating Ranges table) to both the VEN and VMODE  
voltages.  
Two operating modes are recommended to optimize  
current consumption. High Bias operating mode is for  
POUT levels > 16 dBm. At or below +16 dBm, the PA  
should be “Mode Switched” to Low Bias Mode.  
Bias Modes  
The WCDMApower amplifier may be placed in either a  
Low Bias mode or a High Bias mode by applying the  
SUPPLY VOLTAGE FROM  
DC-DC CONVERTER***  
BATTERY  
VOLTAGE  
4.7uF++  
10nF++  
22pF**  
22  
V
BATT  
1
2
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
IMT RF INPUT  
WCDMA BIAS MODE  
WCDMA ENABLE  
DCS/PCS RF INPUT  
BAND SELECT  
WCDMA_IN  
V CC_WCDMA  
10nF++  
22pF**  
WCDMA_OUT  
V
V
MODE  
EN  
27pF++  
WCDMA RF OUTPUT  
DCS/PCS RF OUTPUT  
3
GND  
27pF++  
4
DCS/PCS_PIN  
DCS/PCS_OUT  
5
BS  
GND  
27pF++  
27pF++  
6
ꢁWt6223ꢃ  
TX ENABLE  
TX_EN  
GND  
VCC_OUT  
GND  
7
BATTERY  
VOLTAGE  
V
C
V
BATT  
4.7uF++  
10K*  
2.7pF**  
1nF**  
8
EXT  
22nF**  
27pF*  
9
DAC OUTPUT  
RAMP  
GND  
GSM850/900 RF OUTPUT  
10  
GSM850/900 RF INPUT  
GSM850/900_IN  
GSM850/900_OUT  
V
CC2_GSM  
11  
*
Filtering may be required to filter noise from baseband.  
** This component should be placed as close to the device pin as possible.  
*** If the final design uses a DC-DC Converter, otherwise connect Pin 21 directly to VBATT Pin 22.  
++ These components are recommended as good design practice for improving noise rejection  
characteristics. The values specified are not critical as they may not be required in the final  
application.  
Figure 4: ꢁpplicaꢄion Circuiꢄ  
Data Sheet - Rev 2.0  
13  
11/2008  
ꢁWt6223ꢃ  
PꢁCKꢁGꢀ OꢂtLINꢀ  
Figure 5: Package Ouꢄline - 22 Pin 6 mm x 8 mm x 1 mm surface Mounꢄ Package  
Figure 6: Branding Specification  
Data Sheet - Rev 2.0  
14  
11/2008  
ꢁWt6223ꢃ  
COMPONꢀNt PꢁCKꢁGING  
8.00±.10  
[.314±.004]  
4.00±.10  
[.157±.004]  
Ø1.50±.10  
[Ø.059±.004]  
2.00±.10  
[.079±.004]  
1.75±.10  
[.069±.004]  
6°MAX  
7.50±.10  
[.295±.004]  
16.00+.30/-.10  
[.630+.012/-.004]  
8.36±.10  
[.329±.004]  
Bo  
PIN#1 ORIENTATION  
1.78±.10  
[.070±.004]  
Ko  
t
.305±.02  
[.0120±.0007]  
Ø1.50±.25  
[Ø.059±.010]  
6.35±.10  
[.250±.004]  
8°MAX  
Ao  
NOTES:  
1. MATERIAL: 3000 (CARBON FILLED POLYCARBONATE)  
100% RECYCLABLE.  
Figure 7: tape & ꢃeel Packaging  
table 14: tape & ꢃeel Dimenꢅionꢅ  
PꢁCKꢁGꢀ tYPꢀ  
tꢁPꢀ WIDtH  
16 mm  
POCKꢀt PItCH ꢃꢀꢀL CꢁPꢁCItY  
MꢁX ꢃꢀꢀL DIꢁ  
6 mm x 8 mm x 1 mm  
8 mm  
2500  
13"  
Data Sheet - Rev 2.0  
15  
11/2008  
ꢁWt6223ꢃ  
OꢃDꢀꢃING INFOꢃMꢁtION  
tꢀMPꢀꢃtꢂꢃꢀ  
ꢃꢁNGꢀ  
PꢁCKꢁGꢀ  
DꢀsCꢃIPtION  
OꢃDꢀꢃ NꢂMBꢀꢃ  
COMPONꢀNt PꢁCKꢁGING  
RoHS Compliant 24 Pin  
6 mm x 8 mm x 1 mm Tape and Reel, 2500 pieces per Reel  
Surface Mount Module  
AWT6223RM26P8 -20 oC to +85 oC  
AWT6223RM26P9 -20 oC to +85 oC  
RoHS Compliant 24 Pin  
6 mm x 8 mm x 1 mm Tape and Reel, Partial Reel  
Surface Mount Module  
ANADIGICS, Inc.  
141 Mount Bethel Road  
Warren, New Jersey 07059, U.S.A.  
Tel: +1 (908) 668-5000  
Fax: +1 (908) 668-5132  
URL: http://www.anadigics.com  
E-mail: Mktg@anadigics.com  
IMPOꢃtꢁNt NOtICꢀ  
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.  
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to  
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed  
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers  
to verify that the information they are using is current before placing orders.  
WꢁꢃNING  
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of anANADIGICS product  
in any such application without written consent is prohibited.  
Data Sheet - Rev 2.0  
16  
11/2008  

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