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AOD464_10 [AOS]

N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
AOD464_10
型号： AOD464_10
厂家： ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述：

N-Channel Enhancement Mode Field Effect Transistor
N沟道增强型网络场效晶体管

晶体 晶体管
文件： 总6页 (文件大小：152K)
中文：  中文翻译
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AOD464  
N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AOD464 uses advanced trench technology and  
design to provide excellent RDS(ON) with low gate  
charge. This device is suitable for use in high voltage  
synchronous rectification , load switching and general  
purpose applications.  
VDS (V) = 105V  
ID = 40 A  
(VGS =10V)  
RDS(ON) < 28 mΩ (VGS =10V) @ 20A  
RDS(ON) < 31 mΩ (VGS = 6V)  
100% UIS Tested!  
100% Rg Tested!  
-RoHS Compliant  
-Halogen Free*  
TO-252  
D-PAK  
Bottom View  
Top View  
D
D
G
S
G
S
S
G
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
VDS  
Drain-Source Voltage  
105  
V
VGS  
Gate-Source Voltage  
±25  
40  
V
A
TC=25°C  
Continuous Drain  
Current  
TC=100°C  
ID  
28  
Pulsed Drain Current C  
Avalanche Current C  
Repetitive avalanche energy L=0.1mH C  
IDM  
IAR  
EAR  
80  
20  
A
20  
mJ  
TC=25°C  
Power Dissipation B  
TC=100°C  
100  
50  
PD  
W
TA=25°C  
2.3  
PDSM  
W
Power Dissipation A  
TA=70°C  
1.5  
TJ, TSTG  
Junction and Storage Temperature Range  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
15  
45  
1
Max  
18  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
t ≤ 10s  
RθJA  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Case B  
55  
Steady-State  
Steady-State  
RθJC  
1.5  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD464  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
BVDSS  
Drain-Source Breakdown Voltage  
ID=10mA, VGS=0V  
VDS=84V, VGS=0V  
105  
V
1
IDSS  
Zero Gate Voltage Drain Current  
µA  
5
TJ=55°C  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
VDS=0V, VGS=±25V  
VDS=VGS, ID=250µA  
VGS=10V, VDS=5V  
VGS=10V, ID=20A  
100  
4
nA  
V
VGS(th)  
ID(ON)  
2.5  
80  
3.2  
A
21.5  
32  
28  
40  
31  
mΩ  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
V
GS=6V, ID=20A  
24  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
VDS=5V, ID=20A  
IS=1A, VGS=0V  
50  
S
V
A
0.73  
1
Maximum Body-Diode Continuous Current  
55  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
2038 2445  
pF  
pF  
pF  
Ω
V
GS=0V, VDS=25V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
204  
85  
VGS=0V, VDS=0V, f=1MHz  
VGS=10V, VDS=50V, ID=20A  
1.3  
1.56  
46  
SWITCHING PARAMETERS  
Qg(10V)  
Qgs  
Qgd  
tD(on)  
tr  
Total Gate Charge  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
38.5  
8
nC  
nC  
nC  
ns  
ns  
ns  
ns  
10  
12.7  
8.2  
VGS=10V, VDS=50V, RL=2.7Ω,  
R
GEN=3Ω  
tD(off)  
tf  
31.5  
11.2  
59.6  
161  
trr  
IF=20A, dI/dt=100A/µs  
IF=20A, dI/dt=100A/µs  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
74  
ns  
Qrr  
nC  
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends  
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.  
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of TJ(MAX)=175°C.  
G. The maximum current rating is limited by bond-wires.  
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA  
curve provides a single pulse rating.  
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).  
Rev1: Sep. 2008  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev0: July2005  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD464  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
25  
10V  
VDS=5V  
80  
60  
40  
20  
0
20  
15  
10  
5
6V  
125°C  
5V  
25°C  
VGS=4.5V  
0
2
2.5  
3
3.5  
VGS(Volts)  
4
4.5  
5
0
1
2
3
4
5
VDS (Volts)  
Fig 1: On-Region Characteristics  
Figure 2: Transfer Characteristics  
40  
2.4  
2.2  
2
VGS=10V, 20A  
30  
20  
10  
1.8  
1.6  
1.4  
1.2  
1
VGS=6V  
VGS=6V,20A  
VGS=10V  
0.8  
0
10  
20  
30  
40  
0
25  
50  
75  
Temperature (°C)  
Figure 4: On-Resistance vs. Junction Temperature  
100  
125  
150  
175  
ID (A)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage  
60  
50  
40  
30  
20  
1.0E+02  
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
ID=20A  
125°C  
125°C  
25°C  
25°C  
0.0  
0.2  
0.4  
0.6  
SD (Volts)  
Figure 6: Body-Diode Characteristics  
0.8  
1.0  
1.2  
4
8
12  
16  
20  
V
VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD464  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
3
10  
VDS=50V  
ID=20A  
8
Ciss  
2
6
4
1
Coss  
2
Crss  
0
0
0
10  
20  
30  
40  
0
20  
40  
60  
80  
100  
Qg (nC)  
VDS (Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
1000  
100  
10  
300  
200  
100  
0
TJ(Max)=175°C, TA=25°C  
TJ(Max)=175°C  
TC=25°C  
10µs  
RDS(ON)  
limited  
100µs  
DC  
1ms, DC  
1
0.1  
0.0001  
0.001  
0.01  
0.1  
1
10  
0.1  
1
10  
VDS (Volts)  
100  
1000  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
Figure 9: Maximum Forward Biased Safe Operating  
Area (Note F)  
10  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
TJ,PK=TA+PDM.ZθJC.RθJC  
RθJC=1.5°C/W  
1
PD  
0.1  
Ton  
T
Single Pulse  
0.0001  
0.01  
0.00001  
0.001  
0.01  
0.1  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD464  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
150  
100  
50  
60  
40  
20  
L ⋅ ID  
BV −VDD  
TA=25°C  
tA =  
TA=150°C  
0
0
0.000001  
0.00001  
Time in avalanche, tA (s)  
Figure 12: Single Pulse Avalanche capability  
0.0001  
0.001  
0
25  
50  
75  
100  
125  
150  
175  
TCASE (°C)  
Figure 13: Power De-rating (Note B)  
100  
80  
60  
40  
20  
0
50  
40  
30  
20  
10  
0
TA=25°C  
0.01  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 15: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
0
25  
50  
75  
CASE (°C)  
Figure 14: Current De-rating (Note B)  
100  
125  
150  
175  
T
100  
10  
D=Ton/T  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
TJ,PK=TA+PDM.ZθJA.RθJA  
RθJA=55°C/W  
1
0.1  
PD  
0.01  
Single Pulse  
Ton  
10  
T
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
100  
1000  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOD464  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vds  
+
Vgs  
Vdd  
I AR  
Vgs  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  

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