AOL1718 [AOS]

N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
AOL1718
型号: AOL1718
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

N-Channel Enhancement Mode Field Effect Transistor
N沟道增强型网络场效晶体管

晶体 晶体管 功率场效应晶体管 开关 脉冲 光电二极管
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中文:  中文翻译
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AOL1718  
N-Channel Enhancement Mode Field Effect Transistor  
TM  
SRFET  
General Description  
Features  
SRFETTM AOL1718 uses advanced trench technology  
with a monolithically integrated Schottky diode to provide  
excellent RDS(ON),and low gate charge. This device is  
ideally suited for use as a low side switch in CPU core  
power conversion.  
VDS (V) = 30V  
ID = 90A  
(VGS = 10V)  
(VGS = 10V)  
(VGS = 4.5V)  
R
DS(ON) < 3mΩ  
RDS(ON) < 4.3mΩ  
- RoHS Compliant  
- Halogen Free  
100% UIS Tested!  
100% R g Tested!  
UltraSO-8TM Top View  
D
SRFETTM  
Soft Recovery MOSFET:  
D
Bottom tab  
connected to  
Integrated Schottky Diode  
drain  
S
G
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
VDS  
Drain-Source Voltage  
Gate-Source Voltage  
30  
±20  
90  
V
V
VGS  
Continuous Drain  
Current G  
Pulsed Drain Current C  
TC=25°C  
ID  
TC=100°C  
71  
A
A
IDM  
410  
21  
TA=25°C  
TA=70°C  
Continuous Drain  
Current  
Avalanche Current C  
Repetitive avalanche energy L=0.1mHC  
IDSM  
16  
IAR  
40  
A
EAR  
80  
mJ  
TC=25°C  
Power Dissipation B  
TC=100°C  
100  
50  
PD  
W
TA=25°C  
2.1  
PDSM  
W
Power Dissipation A  
TA=70°C  
1.3  
TJ, TSTG  
Junction and Storage Temperature Range  
-55 to 175  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
19.6  
48  
Max  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
25  
60  
t 10s  
RθJA  
Maximum Junction-to-Ambient A D  
Maximum Junction-to-Case  
Steady-State  
Steady-State  
RθJC  
1
1.5  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1718  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
STATIC PARAMETERS  
BVDSS  
Drain-Source Breakdown Voltage  
ID=250υA, VGS=0V  
30  
V
VDS=30V, VGS=0V  
0.025  
0.1  
20  
IDSS  
Zero Gate Voltage Drain Current  
mA  
µA  
TJ=125°C  
TJ=125°C  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
VDS=0V, VGS= ±20V  
0.1  
2.2  
VGS(th)  
ID(ON)  
V
DS=VGS ID=250µA  
VGS=10V, VDS=5V  
GS=10V, ID=20A  
1.2  
1.8  
V
A
410  
V
2.4  
3.8  
3.4  
87  
3
mΩ  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
4.6  
4.3  
VGS=4.5V, ID=20A  
VDS=5V, ID=20A  
IS=1A,VGS=0V  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
S
V
A
0.4  
1
Maximum Body-Diode Continuous Current  
90  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
2975 3719 4463  
pF  
pF  
pF  
VGS=0V, VDS=15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
485  
204  
0.28  
693  
340  
0.56  
900  
476  
0.84  
VGS=0V, VDS=0V, f=1MHz  
SWITCHING PARAMETERS  
Qg(10V)  
Total Gate Charge  
Total Gate Charge  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
48  
20  
12  
6
60  
25  
72  
30  
18  
14  
nC  
nC  
nC  
nC  
ns  
Qg(4.5V)  
Qgs  
Qgd  
tD(on)  
tr  
V
GS=10V, VDS=15V, ID=20A  
15  
10  
9.2  
10.7  
40  
ns  
VGS=10V, VDS=15V, RL=0.75,  
R
GEN=3Ω  
tD(off)  
tf  
ns  
12.5  
13  
ns  
trr  
IF=20A, dI/dt=500A/µs  
IF=20A, dI/dt=500A/µs  
10  
21  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
16  
32  
ns  
Qrr  
26.5  
nC  
2
A. The value of RθJA is measured with the device mounted on 1in FR-4 board with 2oz. Copper, in a still air environment with T =25°C. The Power  
A
dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the  
user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.  
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation  
limit for cases where additional heatsinking is used.  
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial T  
J
=25°C.  
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a  
maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is limited by bond-wires.  
2
H. These tests are performed with the device mounted on 1 in FR-4 board with 2oz. Copper, in a still air environment with T =25°C.  
A
Rev 0: Oct-08  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1718  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
160  
140  
120  
100  
80  
120  
100  
80  
60  
40  
20  
0
VDS=5V  
10V  
5V  
4.5V  
4V  
3.5V  
60  
125°C  
40  
25°C  
VGS=3V  
20  
0
0
1
2
3
4
5
0
1
2
3
4
5
VGS(Volts)  
VDS (Volts)  
Figure 2: Transfer Characteristics (Note E)  
Fig 1: On-Region Characteristics (Note E)  
6
5
4
3
2
1
0
2
1.8  
1.6  
1.4  
1.2  
1
VGS=10V  
ID=20A  
VGS=4.5V  
VGS=4.5V  
VGS=10V  
ID=20A  
0.8  
0
25  
50  
75  
100 125 150 175 200  
0
5
10  
15  
20  
25  
30  
ID (A)  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and  
Gate Voltage (Note E)  
Figure 4: On-Resistance vs. Junction Temperature  
(Note E)  
8
6
4
2
0
1.0E+02  
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
ID=20A  
125°C  
125°C  
25°C  
25°C  
0.0  
0.2  
0.4  
VSD (Volts)  
Figure 6: Body-Diode Characteristics (Note E)  
0.6  
0.8  
1.0  
2
4
6
8
10  
VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1718  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
6000  
5000  
4000  
3000  
2000  
1000  
0
VDS=15V  
ID=20A  
8
Ciss  
6
4
Coss  
2
Crss  
0
0
10  
20  
30  
Qg (nC)  
40  
50  
60  
0
5
10  
15  
VDS (Volts)  
20  
25  
30  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
1000  
800  
600  
400  
200  
0
1000.0  
100.0  
10.0  
1.0  
TJ(Max)=175°C  
TC=25°C  
10µs  
100µs  
RDS(ON)  
1ms  
10ms  
limited  
DC  
TJ(Max)=175°C  
TC=25°C  
0.1  
0.0  
0.01  
0.1  
1
10  
100  
0.0001  
0.001  
0.01  
0.1  
1
10  
V
DS (Volts)  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
J,PK=TC+PDM.ZθJC.RθJC  
RθJC=1.5°C/W  
T
PD  
0.1  
Ton  
T
Single Pulse  
0.001  
0.01  
0.00001  
0.0001  
0.01  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
0.1  
1
10  
100  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1718  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
200  
180  
160  
140  
120  
100  
80  
120  
100  
80  
60  
40  
20  
0
TA=25°C  
TA=100°C  
TA=125°C  
60  
TA=150°C  
40  
20  
0
0
25  
50  
75  
100  
125  
150  
175  
0.000001  
0.00001  
0.0001  
0.001  
Time in avalanche, tA (s)  
TCASE (°C)  
Figure 12: Single Pulse Avalanche capability (Note  
C)  
Figure 13: Power De-rating (Note F)  
100  
120  
100  
80  
60  
40  
20  
0
TA=25°C  
80  
60  
40  
20  
0
0.01  
0.1  
1
10  
100  
1000  
0
25  
50  
75  
100  
125  
150  
175  
T
CASE (°C)  
Pulse Width (s)  
Figure 15: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
Figure 14: Current De-rating (Note F)  
100  
D=Ton/T  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
TJ,PK=TA+PDM.ZθJA.RθJA  
10  
1
RθJA=60°C/W  
0.1  
PD  
Single Pulse  
0.01  
0.001  
Ton  
T
0.00001  
0.0001  
0.001  
0.01  
0.1  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
1
10  
100  
1000  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1718  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
1.0E-06  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
20A  
10A  
VDS=30V  
VDS=15V  
5A  
IS=1A  
0
50  
100  
Temperature (°C)  
150  
200  
0
50  
100  
Temperature (°C)  
150  
200  
Figure 17: Diode Reverse Leakage Current vs.  
Junction Temperature  
Figure 18: Diode Forward voltage vs. Junction  
Temperature  
38  
36  
34  
32  
30  
28  
26  
12  
10  
8
16  
3
di/dt=800A/µs  
di/dt=800A/µs  
14  
12  
10  
8
125ºC  
2.5  
2
trr  
25ºC  
125ºC  
25ºC  
1.5  
1
6
Qrr  
Irm  
125ºC  
6
125ºC  
4
25ºC  
4
S
25ºC  
0.5  
0
2
2
0
0
0
5
10  
15  
20  
25  
30  
0
5
10  
15  
20  
25  
30  
IS (A)  
IS (A)  
Figure 20: Diode Reverse Recovery Time and  
Softness Factor vs. Conduction Current  
Figure 19: Diode Reverse Recovery Charge and  
Peak Current vs. Conduction Current  
35  
30  
25  
20  
15  
10  
5
10  
24  
21  
18  
15  
12  
9
2.5  
125ºC  
Is=20A  
Is=20A  
8
6
4
2
0
2
25ºC  
125ºC  
1.5  
1
25ºC  
125º  
125ºC  
25ºC  
trr  
Qrr  
S
6
0.5  
25ºC  
Irm  
200  
3
0
0
0
0
400  
600  
800  
1000  
0
200  
400  
600  
800  
1000  
di/dt (A/µs)  
di/dt (A/µs)  
Figure 21: Diode Reverse Recovery Charge and  
Peak Current vs. di/dt  
Figure 22: Diode Reverse Recovery Time and  
Softness Factor vs. di/dt  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AOL1718  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Q rr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  

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