AON6405L [AOS]

P-Channel Enhancement Mode Field Effect Transistor; P沟道增强型场效应晶体管
AON6405L
型号: AON6405L
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

P-Channel Enhancement Mode Field Effect Transistor
P沟道增强型场效应晶体管

晶体 晶体管 场效应晶体管
文件: 总5页 (文件大小:129K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AON6405L  
P-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
The AON6405L combines advanced trench MOSFET  
technology with a low resistance package to provide  
extremely low RDS(ON).This device is ideal for load  
switch and battery protection applications.  
VDS (V) = -30V  
ID = -30A  
(VGS = -10V)  
R
R
DS(ON) < 7m(VGS = -10V)  
DS(ON) < 8m(VGS = -4.5V)  
ESD Protected!  
100% UIS Tested!  
-RoHS Compliant  
-Halogen Free  
D
Top View  
D
S
S
S
G
Fits SOIC8  
footprint !  
Rg  
D
G
D
D
S
DFN5X6  
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
VDS  
Maximum  
-30  
Units  
Drain-Source Voltage  
Gate-Source Voltage  
Continuous Drain  
Current G  
V
V
VGS  
±20  
TC=25°C  
-30  
A
TC=100°C  
ID  
-23  
Pulsed Drain CurrentC  
IDM  
-160  
-15  
TA=25°C  
TA=70°C  
Continuous Drain  
Current  
Avalanche Current C  
Repetitive avalanche energy L=0.1mH C  
A
IDSM  
IAR  
-12  
-54  
A
EAR  
146  
mJ  
TC=25°C  
Power Dissipation B  
TC=100°C  
83  
PD  
W
33  
TA=25°C  
2.5  
PDSM  
W
Power Dissipation A  
TA=70°C  
1.6  
TJ, TSTG  
Junction and Storage Temperature Range  
-55 to 150  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
14.2  
42  
Max  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
17  
50  
1.5  
t 10s  
RθJA  
Maximum Junction-to-Ambient AD  
Maximum Junction-to-Case  
Steady-State  
Steady-State  
RθJC  
1.2  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AON6405L  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
BVDSS  
Drain-Source Breakdown Voltage  
ID=-250µA, VGS=0V  
-30  
V
V
DS=-30V, VGS=0V  
-1  
IDSS  
Zero Gate Voltage Drain Current  
µA  
-5  
TJ=55°C  
µA  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
VDS=0V, VGS= ±16V  
DS=VGS ID=-250µA  
±10  
VGS(th)  
ID(ON)  
V
-0.8  
-1.2  
-1.6  
V
A
VGS=-10V, VDS=-5V  
VGS=-10V, ID=-20A  
-160  
5.5  
7
7
8.5  
8
mΩ  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
VGS=-4.5V, ID=-20A  
6.1  
70  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
V
DS=-5V, ID=-20A  
S
V
A
IS=-1A,VGS=0V  
-0.65  
-1  
Maximum Body-Diode Continuous Current  
-50  
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
4580 5500  
pF  
pF  
pF  
VGS=0V, VDS=-15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
755  
564  
VGS=0V, VDS=0V, f=1MHz  
160  
210  
105  
SWITCHING PARAMETERS  
Qg(-10V)  
Total Gate Charge  
Total Gate Charge  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
87  
41  
nC  
nC  
nC  
nC  
ns  
Qg(-4.5V)  
V
GS=-10V, VDS=-15V, ID=-20A  
Qgs  
Qgd  
tD(on)  
tr  
12.8  
17  
180  
260  
1.2  
9.7  
32  
VGS=-10V, VDS=-15V, RL=0.75,  
GEN=3Ω  
ns  
µs  
R
tD(off)  
tf  
µs  
trr  
IF=-20A, dI/dt=300A/µs  
IF=-20A, dI/dt=300A/µs  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
40  
ns  
Qrr  
77  
nC  
A: The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends  
on the user's specific board design.  
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep  
initial TJ =25°C.  
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,  
assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is limited by bond-wires.  
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.  
Rev 0: July 2008  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AON6405L  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
160  
140  
120  
100  
80  
100  
80  
60  
40  
20  
0
-10V  
-4V  
VDS=-5V  
-3.5V  
-3V  
-5V  
60  
125°C  
40  
VGS=-2.5V  
25°C  
3
20  
0
0
1
2
3
4
5
0
1
2
4
-VDS (Volts)  
-VGS(Volts)  
Figure 1: On-Region Characteristics(Note E)  
Figure 2: Transfer Characteristics(Note E)  
8
7
6
5
4
3
1.8  
ID=-20A  
VGS=-4.5V  
1.6  
1.4  
1.2  
1
VGS=-10V  
VGS=-4.5V  
VGS=-10V  
0.8  
0
25  
50  
75  
100  
125  
150  
175  
0
5
10  
-ID (A)  
15  
20  
25  
30  
Temperature (°C)  
Figure 4: On-Resistance vs. Junction Temperature  
(Note E)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage(Note E)  
20  
1.0E+02  
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
ID=-20A  
16  
12  
8
125°C  
125°C  
25°C  
25°C  
4
0
2
4
6
8
10  
0.0  
0.2  
0.4  
-VSD (Volts)  
Figure 6: Body-Diode Characteristics(Note E)  
0.6  
0.8  
1.0  
-VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source  
Voltage(Note E)  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AON6405L  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
7000  
6000  
5000  
4000  
3000  
2000  
1000  
0
10  
VDS=-15V  
ID=-20A  
8
Ciss  
6
4
Coss  
2
Crss  
0
0
20  
40  
60  
80  
100  
0
5
10  
15  
20  
25  
30  
Qg (nC)  
-VDS (Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
1000.0  
100.0  
10.0  
1.0  
200  
160  
120  
80  
TJ(Max)=150°C  
TC=25°C  
10µs  
RDS(ON)  
limited  
100µs  
10s  
10ms  
1ms  
DC  
0.1  
40  
TJ(Max)=150°C  
TC=25°C  
0.0  
0
0.01  
0.1  
1
10  
100  
0.0001  
0.001  
0.01  
0.1  
1
10  
-VDS (Volts)  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
J,PK=TC+PDM.ZθJC.RθJC  
T
RθJC=1.5°C/W  
0.1  
PD  
Ton  
T
Single Pulse  
0.0001  
0.01  
0.00001  
0.001  
0.01  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
0.1  
1
10  
100  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  
AON6405L  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
-
-10V  
-
VDC  
Qgs  
Qgd  
+
Vds  
VDC  
+
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
toff  
ton  
t
td(off)  
td(on)  
t
r
f
Vgs  
-
90%  
10%  
DUT  
Vdd  
Vgs  
VDC  
+
Rg  
Vgs  
Vds  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
EAR= 1/2 LIA2R  
L
Vds  
Id  
Vgs  
Vds  
-
BVDSS  
Vgs  
Vdd  
VDC  
+
Id  
Rg  
I AR  
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
DUT  
Vgs  
trr  
Vds -  
L
-Isd  
-IF  
Isd  
Vgs  
dI/dt  
-IRM  
+
Vdd  
VDC  
Vdd  
-
-Vds  
Ig  
Alpha & Omega Semiconductor, Ltd.  
www.aosmd.com  

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