AON6522 [AOS]

25V N-Channel AlphaMOS; 25V N沟道AlphaMOS
AON6522
型号: AON6522
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

25V N-Channel AlphaMOS
25V N沟道AlphaMOS

文件: 总6页 (文件大小:286K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AON6522  
25V N-Channel AlphaMOS  
General Description  
Product Summary  
VDS  
• Latest Trench Power AlphaMOS (αMOS LV) technology  
• Very Low RDS(on) at 4.5VGS  
25V  
ID (at VGS=10V)  
RDS(ON) (at VGS=10V)  
RDS(ON) (at VGS = 4.5V)  
200A  
• Low Gate Charge  
• High Current Capability  
• RoHS and Halogen-Free Compliant  
< 0.95m  
< 1.3mΩ  
Application  
• DC/DC Converters in Computing, Servers, and POL  
100% UIS Tested  
100% Rg Tested  
• Isolated DC/DC Converters in Telecom and Industrial  
D
DFN5X6  
Top View  
Top View  
Bottom View  
1
8
7
6
5
2
3
4
G
S
PIN1  
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
25  
Units  
Drain-Source Voltage  
Gate-Source Voltage  
VDS  
V
V
VGS  
±20  
TC=25°C  
200  
Continuous Drain  
Current G  
ID  
TC=100°C  
151  
A
Pulsed Drain Current C  
IDM  
450  
71  
TA=25°C  
TA=70°C  
Continuous Drain  
Current  
IDSM  
A
57  
Avalanche Current C  
Avalanche energy L=0.1mH C  
IAS  
50  
A
mJ  
V
EAS  
125  
36  
VDS Spike  
100ns  
VSPIKE  
TC=25°C  
TC=100°C  
TA=25°C  
TA=70°C  
83  
PD  
W
Power Dissipation B  
33  
7.3  
PDSM  
W
°C  
Power Dissipation A  
4.7  
Junction and Storage Temperature Range  
TJ, TSTG  
-55 to 150  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
14  
40  
1
Max  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
t 10s  
17  
55  
RθJA  
Maximum Junction-to-Ambient A D  
Maximum Junction-to-Case  
Steady-State  
Steady-State  
RθJC  
1.5  
Rev 0: Jan 2012  
www.aosmd.com  
Page 1 of 6  
AON6522  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
ID=250µA, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
25  
V
VDS=25V, VGS=0V  
1
IDSS  
Zero Gate Voltage Drain Current  
µA  
5
TJ=55°C  
VDS=0V, VGS= ±20V  
VDS=VGS, ID=250µA  
VGS=10V, ID=20A  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
100  
2
nA  
V
VGS(th)  
1
1.4  
0.75  
1.1  
1
0.95  
1.4  
1.3  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
VGS=4.5V, ID=20A  
VDS=5V, ID=20A  
IS=1A,VGS=0V  
mΩ  
S
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
100  
0.7  
1
V
Maximum Body-Diode Continuous Current  
100  
A
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
7036  
2778  
353  
pF  
pF  
pF  
VGS=0V, VDS=15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
VGS=0V, VDS=0V, f=1MHz  
0.5  
1.1  
1.7  
SWITCHING PARAMETERS  
Qg(10V) Total Gate Charge  
107  
49.7  
11.7  
21.4  
12.3  
12.8  
68.5  
28.8  
145  
68  
nC  
nC  
nC  
nC  
ns  
Qg(4.5V) Total Gate Charge  
VGS=10V, VDS=15V, ID=20A  
Qgs  
Qgd  
tD(on)  
tr  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
VGS=10V, VDS=15V, RL=0.75,  
ns  
RGEN=3Ω  
tD(off)  
tf  
ns  
ns  
trr  
IF=20A, dI/dt=500A/µs  
IF=20A, dI/dt=500A/µs  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
31  
ns  
Qrr  
nC  
106  
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends  
on the user's specific board design.  
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Single pulse width limited by junction temperature TJ(MAX)=150°C.  
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is package limited.  
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev 0: Jan 2012  
www.aosmd.com  
Page 2 of 6  
AON6522  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
4.5V  
3V  
10V  
VDS=5V  
2.5V  
125°C  
25°C  
VGS=2V  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0
1
2
3
4
5
VGS(Volts)  
VDS (Volts)  
Fig 1: On-Region Characteristics (Note E)  
Figure 2: Transfer Characteristics (Note E)  
2.0  
1.5  
1.0  
0.5  
0.0  
1.6  
1.4  
1.2  
1
VGS=10V  
ID=20A  
VGS=4.5V  
VGS=4.5V  
ID=20A  
VGS=10V  
0.8  
0
5
10  
15  
ID (A)  
20  
25  
30  
0
25  
50  
75  
100  
125  
150  
175  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  
Figure 4: On-Resistance vs. Junction Temperature  
(Note E)  
2
1.5  
1
1.00E+02  
1.00E+01  
1.00E+00  
1.00E-01  
1.00E-02  
1.00E-03  
1.00E-04  
1.00E-05  
ID=20A  
125°C  
125°C  
25°C  
0.5  
0
25°C  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
2
4
6
8
10  
VGS (Volts)  
VSD (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Figure 6: Body-Diode Characteristics (Note E)  
Rev 0: Jan 2012  
www.aosmd.com  
Page 3 of 6  
AON6522  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
10000  
9000  
8000  
7000  
6000  
5000  
4000  
3000  
2000  
1000  
0
VDS=15V  
ID=20A  
Ciss  
8
6
4
Coss  
2
Crss  
0
0
20  
40  
60  
Qg (nC)  
80  
100  
120  
0
5
10  
15  
20  
25  
30  
VDS (Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
500  
400  
300  
200  
100  
0
1000.0  
100.0  
10.0  
1.0  
RDS(ON)  
limited  
10µs  
TJ(Max)=150°C  
TC=25°C  
100µs  
1ms  
DC  
TJ(Max)=150°C  
TC=25°C  
0.1  
0.0  
0.01  
0.1  
1
10  
100  
0.0001  
0.001  
0.01  
0.1  
1
10  
VDS (Volts)  
Pulse Width (s)  
Figure 9: Maximum Forward Biased  
Safe Operating Area (Note F)  
Figure 10: Single Pulse Power Rating Junction-to-Case  
(Note F)  
10  
1
D=Ton/T  
TJ,PK=TC+PDM.ZθJC.RθJC  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
RθJC=1.5°C/W  
PD  
0.1  
Single Pulse  
Ton  
T
0.01  
0.00001  
0.0001  
0.001  
0.01  
Pulse Width (s)  
0.1  
1
10  
100  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev 0: Jan 2012  
www.aosmd.com  
Page 4 of 6  
AON6522  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
80  
60  
40  
20  
0
250  
200  
150  
100  
50  
0
0
25  
50  
75  
100  
125  
150  
0
25  
50  
TCASE (°C)  
Figure 13: Current De-rating (Note F)  
75  
100  
125  
150  
TCASE (°C)  
Figure 12: Power De-rating (Note F)  
10000  
TA=25°C  
1000  
100  
10  
1
0.00001  
0.001  
0.1  
Pulse Width (s)  
10  
1000  
Figure 14: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
10  
1
D=Ton/T  
TJ,PK=TA+PDM.ZθJA.RθJA  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
RθJA=55°C/W  
0.1  
PD  
0.01  
Single Pulse  
0.1  
Ton  
T
0.001  
0.0001  
0.001  
0.01  
1
10  
100  
1000  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev 0: Jan 2012  
www.aosmd.com  
Page 5 of 6  
AON6522  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Rev 0: Jan 2012  
www.aosmd.com  
Page 6 of 6  

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