AON6754 [AOS]

30V N-Channel AlphaMOS; 30V N通道AlphaMOS
AON6754
型号: AON6754
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

30V N-Channel AlphaMOS
30V N通道AlphaMOS

文件: 总6页 (文件大小:292K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AON6754  
30V N-Channel AlphaMOS  
General Description  
Product Summary  
VDS  
30V  
• Latest Trench Power AlphaMOS (αMOS LV) technology  
• Integrated Schottky Diode (SRFET)  
• Very Low RDS(on) at 4.5VGS  
• Low Gate Charge  
• High Current Capability  
ID (at VGS=10V)  
RDS(ON) (at VGS=10V)  
RDS(ON) (at VGS = 4.5V)  
85A  
< 1.8m  
< 3.3mΩ  
• RoHS and Halogen-Free Compliant  
Application  
• DC/DC Converters in Computing, Servers, and POL  
100% UIS Tested  
100% Rg Tested  
• Isolated DC/DC Converters in Telecom and Industrial  
D
DFN5X6  
Top View  
Top View  
Bottom View  
SRFETTM  
1
8
Soft Recovery MOSFET:  
Integrated Schottky Diode  
2
3
7
6
4
5
G
S
PIN1  
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
Maximum  
Units  
Drain-Source Voltage  
VDS  
30  
V
Gate-Source Voltage  
VGS  
±20  
85  
V
A
TC=25°C  
Continuous Drain  
Current G  
ID  
TC=100°C  
66  
Pulsed Drain Current C  
IDM  
329  
52  
TA=25°C  
TA=70°C  
Continuous Drain  
Current  
Avalanche Current C  
Avalanche energy L=0.05mH C  
IDSM  
A
42  
IAS  
65  
A
mJ  
V
EAS  
106  
36  
VDS Spike  
100ns  
VSPIKE  
TC=25°C  
TC=100°C  
TA=25°C  
TA=70°C  
83  
PD  
W
Power Dissipation B  
Power Dissipation A  
33  
7.3  
PDSM  
W
°C  
4.7  
Junction and Storage Temperature Range  
TJ, TSTG  
-55 to 150  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
14  
Max  
17  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
Maximum Junction-to-Ambient A D  
Maximum Junction-to-Case  
t
10s  
RθJA  
Steady-State  
Steady-State  
40  
55  
RθJC  
1.1  
1.5  
Rev1: Mar 2012  
www.aosmd.com  
Page 1 of 6  
AON6754  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
ID=10mA, VGS=0V  
VDS=30V, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
30  
V
0.5  
mA  
100  
IDSS  
Zero Gate Voltage Drain Current  
TJ=125°C  
TJ=125°C  
VDS=0V, VGS= ±20V  
VDS=VGS, ID=250µA  
VGS=10V, ID=20A  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
100  
2.4  
1.8  
2.6  
3.3  
nA  
V
VGS(th)  
1.4  
1.7  
1.5  
2.1  
2.1  
90  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
VGS=4.5V, ID=20A  
VDS=5V, ID=20A  
IS=1A,VGS=0V  
mΩ  
S
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
0.39  
0.6  
85  
V
Maximum Body-Diode Continuous CurrentG  
A
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
2796  
1200  
165  
pF  
pF  
pF  
V
GS=0V, VDS=15V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
VGS=0V, VDS=0V, f=1MHz  
0.7  
1.5  
2.3  
SWITCHING PARAMETERS  
Qg(10V) Total Gate Charge  
46.8  
22.3  
8.4  
64  
30  
nC  
nC  
nC  
nC  
ns  
Qg(4.5V) Total Gate Charge  
VGS=10V, VDS=15V, ID=20A  
Qgs  
Qgd  
tD(on)  
tr  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
8.6  
9.5  
VGS=10V, VDS=15V, RL=0.75,  
6.3  
ns  
RGEN=3Ω  
tD(off)  
tf  
35.8  
12.3  
ns  
ns  
trr  
IF=20A, dI/dt=500A/µs  
IF=20A, dI/dt=500A/µs  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
20  
40  
ns  
Qrr  
nC  
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends  
on the user's specific board design.  
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Single pulse width limited by junction temperature TJ(MAX)=150°C.  
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming  
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is package limited.  
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev1: Mar 2012  
www.aosmd.com  
Page 2 of 6  
AON6754  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
4V  
VDS=5V  
3.5V  
4.5V  
10V  
125°C  
VGS=3V  
25°C  
0
1
2
3
4
5
6
0
1
2
3
4
5
VGS(Volts)  
VDS (Volts)  
Fig 1: On-Region Characteristics (Note E)  
Figure 2: Transfer Characteristics (Note E)  
4
3
2
1
0
1.6  
1.4  
1.2  
1
VGS=10V  
ID=20A  
VGS=4.5V  
VGS=4.5V  
ID=20A  
VGS=10V  
0.8  
0
25  
50  
75  
100  
125  
150  
175  
0
5
10  
15  
ID (A)  
20  
25  
30  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  
Figure 4: On-Resistance vs. Junction Temperature  
(Note E)  
5
4
3
2
1
0
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
ID=20A  
125°C  
125°C  
25°C  
25°C  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
2
4
6
8
10  
VGS (Volts)  
VSD (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Figure 6: Body-Diode Characteristics (Note E)  
Rev1: Mar 2012  
www.aosmd.com  
Page 3 of 6  
AON6754  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
4500  
4000  
3500  
3000  
2500  
2000  
1500  
1000  
500  
VDS=15V  
ID=20A  
8
Ciss  
6
4
Coss  
2
Crss  
0
0
0
10  
20  
Qg (nC)  
30  
40  
50  
0
5
10  
15  
20  
25  
VDS (Volts)  
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
500  
400  
300  
200  
100  
0
1000.0  
100.0  
10.0  
1.0  
RDS(ON)  
10µs  
TJ(Max)=150°C  
TC=25°C  
100µs  
1ms  
10ms  
DC  
TJ(Max)=150°C  
TC=25°C  
0.1  
0.0  
0.01  
0.1  
1
10  
100  
0.0001  
0.001  
0.01  
0.1  
1
10  
VDS (Volts)  
Pulse Width (s)  
Figure 10: Single Pulse Power Rating Junction-to-Case  
(Note F)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
D=Ton/T  
TJ,PK=TC+PDM.ZθJC.RθJC  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
RθJC=1.5°C/W  
PD  
0.1  
Single Pulse  
0.0001  
Ton  
T
0.01  
0.00001  
0.001  
0.01  
Pulse Width (s)  
0.1  
1
10  
100  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev1: Mar 2012  
www.aosmd.com  
Page 4 of 6  
AON6754  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
0
25  
50  
75  
100  
125  
150  
0
25  
50  
75  
100  
125  
150  
TCASE (°C)  
TCASE (°C)  
Figure 12: Power De-rating (Note F)  
Figure 13: Current De-rating (Note F)  
10000  
1000  
100  
10  
TA=25°C  
1
0.00001  
0.001  
0.1  
10  
1000  
Pulse Width (s)  
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)  
10  
1
D=Ton/T  
TJ,PK=TA+PDM.ZθJA.RθJA  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
RθJA=55°C/W  
0.1  
0.01  
PD  
Single Pulse  
0.01  
Ton  
T
0.001  
0.0001  
0.001  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev1: Mar 2012  
www.aosmd.com  
Page 5 of 6  
AON6754  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Rev1: Mar 2012  
www.aosmd.com  
Page 6 of 6  

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