AON6884 [AOS]

40V Dual N-Channel MOSFET; 40V双N沟道MOSFET
AON6884
型号: AON6884
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

40V Dual N-Channel MOSFET
40V双N沟道MOSFET

晶体 晶体管
文件: 总6页 (文件大小:250K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AON6884  
40V Dual N-Channel MOSFET  
General Description  
Product Summary  
VDS  
40V  
The AON6884 uses advanced trench technology to  
provide excellent RDS(ON) with low gate charge. This is an  
all purpose device that is suitable for use in a wide range  
of power conversion applications.  
ID (at VGS=10V)  
34A  
R
DS(ON) (at VGS=10V)  
< 11.3m  
< 13.8mΩ  
RDS(ON) (at VGS = 4.5V)  
100% UIS Tested  
100% Rg Tested  
D1  
D2  
Top View  
1
2
3
4
8
S1  
D1  
7
D1  
G1  
S2  
6
D2  
5
G2  
D2  
G1  
G2  
S1  
S2  
DFN5X6 EP2  
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
VDS  
Maximum  
Units  
Drain-Source Voltage  
Gate-Source Voltage  
40  
±20  
34  
V
V
VGS  
TC=25°C  
Continuous Drain  
Current  
ID  
TC=100°C  
21  
A
Pulsed Drain Current C  
IDM  
120  
TA=25°C  
TA=70°C  
9
Continuous Drain  
Current  
IDSM  
A
7
Avalanche Current C  
IAS, IAR  
35  
A
Avalanche energy L=0.1mH C  
EAS, EAR  
61  
mJ  
TC=25°C  
Power Dissipation B  
TC=100°C  
21  
PD  
W
8
TA=25°C  
1.6  
1
PDSM  
W
°C  
Power Dissipation A  
TA=70°C  
Junction and Storage Temperature Range  
TJ, TSTG  
-55 to 150  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
35  
65  
5
Max  
45  
80  
6
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
t 10s  
RθJA  
Maximum Junction-to-Ambient A D  
Maximum Junction-to-Case  
Steady-State  
Steady-State  
RθJC  
Rev 1: November 2010  
www.aosmd.com  
Page 1 of 6  
AON6884  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max Units  
STATIC PARAMETERS  
ID=250µA, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
40  
V
VDS=40V, VGS=0V  
1
IDSS  
Zero Gate Voltage Drain Current  
µA  
TJ=55°C  
5
V
DS=0V, VGS= ±20V  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
On state drain current  
±100  
2.7  
nA  
V
VGS(th)  
ID(ON)  
VDS=VGS ID=250µA  
VGS=10V, VDS=5V  
VGS=10V, ID=10A  
1.55  
120  
2.1  
A
9.4  
14  
11.3  
17  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
V
GS=4.5V, ID=10A  
11  
13.8  
mΩ  
S
VDS=5V, ID=10A  
IS=1A,VGS=0V  
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
50  
0.7  
1
V
Maximum Body-Diode Continuous Current  
25  
A
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
1200 1500 1950  
pF  
pF  
pF  
V
GS=0V, VDS=20V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
150  
80  
215  
135  
3.5  
280  
190  
5.3  
VGS=0V, VDS=0V, f=1MHz  
1.7  
SWITCHING PARAMETERS  
Qg(10V) Total Gate Charge  
22  
10  
27.2  
13.6  
4.5  
33  
16  
5.4  
9
nC  
nC  
nC  
nC  
ns  
Qg(4.5V) Total Gate Charge  
VGS=10V, VDS=20V, ID=10A  
Qgs  
Qgd  
tD(on)  
tr  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
Turn-Off DelayTime  
Turn-Off Fall Time  
3.6  
3.8  
6.4  
6.4  
VGS=10V, VDS=20V, RL=2,  
RGEN=3Ω  
17.2  
29.6  
16.8  
ns  
tD(off)  
tf  
ns  
ns  
trr  
IF=10A, dI/dt=500A/µs  
IF=10A, dI/dt=500A/µs  
9
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
13  
35  
17  
45  
ns  
Qrr  
25  
nC  
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The  
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends  
on the user's specific board design.  
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep  
initial TJ =25°C.  
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,  
assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.  
G. The maximum current rating is limited by bond-wires.  
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev 1: November 2010  
www.aosmd.com  
Page 2 of 6  
AON6884  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
120  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
10V  
VDS=5V  
4.5V  
4V  
25°C  
125°C  
3.5V  
VGS=3V  
2
2.5  
3
3.5  
4
4.5  
0
1
2
3
4
5
VGS(Volts)  
V
DS (Volts)  
Figure 2: Transfer Characteristics (Note E)  
Fig 1: On-Region Characteristics (Note E)  
20  
16  
12  
8
1.8  
1.6  
1.4  
1.2  
1
VGS=10V  
ID=10A  
VGS=4.5V  
VGS=4.5V  
VGS=10V  
ID=10A  
4
0.8  
0
5
10  
15  
20  
0
25  
50  
75  
100  
125  
150  
175  
ID (A)  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  
Figure 4: On-Resistance vs. Junction Temperature  
(Note E)  
25  
20  
15  
10  
5
1.0E+02  
1.0E+01  
ID=10A  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
125°C  
125°C  
25°C  
25°C  
0.0  
0.2  
0.4  
0.6  
VSD (Volts)  
Figure 6: Body-Diode Characteristics (Note E)  
0.8  
1.0  
1.2  
2
4
6
8
10  
VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Rev 1: November 2010  
www.aosmd.com  
Page 3 of 6  
AON6884  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
2500  
VDS=20V  
ID=10A  
8
2000  
1500  
1000  
500  
0
Ciss  
6
4
Coss  
2
Crss  
0
0
5
10  
15  
g (nC)  
20  
25  
30  
0
10  
20  
DS (Volts)  
30  
40  
Q
V
Figure 7: Gate-Charge Characteristics  
Figure 8: Capacitance Characteristics  
200  
160  
120  
80  
1000.0  
100.0  
10.0  
1.0  
TJ(Max)=150°C  
TC=25°C  
10µs  
RDS(ON)  
limited  
100µs  
DC  
1ms  
10ms  
TJ(Max)=150°C  
TC=25°C  
0.1  
40  
0.0  
0
0.01  
0.1  
1
10  
100  
0.0001  
0.001  
0.01  
0.1  
1
10  
V
DS (Volts)  
Pulse Width (s)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
J,PK=TC+PDM.ZθJC.RθJC  
θJC=6°C/W  
T
R
0.1  
PD  
0.01  
0.001  
Ton  
Single Pulse  
T
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev 1: November 2010  
www.aosmd.com  
Page 4 of 6  
AON6884  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
25  
TA=25°C  
20  
TA=100°C  
15  
TA=150°C  
TA=125°C  
10  
5
10  
0
1
10  
100  
1000  
0
25  
50  
75  
100  
125  
150  
Time in avalanche, tA (µs)  
TCASE (°C)  
Figure 12: Single Pulse Avalanche capability (Note  
C)  
Figure 13: Power De-rating (Note F)  
10000  
1000  
100  
10  
40  
35  
30  
25  
20  
15  
10  
5
TA=25°C  
1
0
0.00001  
0.001  
0.1  
10  
1000  
0
25  
50  
75  
100  
125  
150  
T
CASE (°C)  
Pulse Width (s)  
Figure 14: Current De-rating (Note F)  
Figure 15: Single Pulse Power Rating Junction-to-  
Ambient (Note H)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
T
J,PK=TA+PDM.ZθJA.RθJA  
θJA=80°C/W  
R
0.1  
PD  
0.01  
Ton  
Single Pulse  
0.01  
T
0.001  
0.0001  
0.001  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev 1: November 2010  
www.aosmd.com  
Page 5 of 6  
AON6884  
Gate Charge Test Circuit & Waveform  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vgs  
Vds  
+
Vgs  
Vdd  
I AR  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
I F  
Isd  
Vgs  
dI/dt  
I RM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Rev 1: November 2010  
www.aosmd.com  
Page 6 of 6  

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