AON7262E [AOS]

MOSFET N-CH 60V 34A 8DFN;
AON7262E
型号: AON7262E
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

MOSFET N-CH 60V 34A 8DFN

开关 脉冲 光电二极管 晶体管
文件: 总6页 (文件大小:342K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AON7262E  
60V N-Channel AlphaSGT TM  
General Description  
Product Summary  
• Trench Power AlphaSGTTM technology  
• Low RDS(ON)  
• Low Gate Charge  
• ESD protected  
VDS  
60V  
ID (at VGS=10V)  
RDS(ON) (at VGS=10V)  
34A  
< 6.2mΩ  
< 8.5mΩ  
RDS(ON) (at VGS=4.5V)  
Typical ESD protection  
HBM Class 2  
Applications  
100% UIS Tested  
100% Rg Tested  
• High efficiency power supply  
• Secondary synchronus rectifier  
DFN 3x3 EP  
D
Top View  
Bottom View  
Top View  
1
8
2
3
7
6
G
Pin 1  
4
5
S
Pin 1  
Orderable Part Number  
Package Type  
DFN 3x3 EP  
Form  
Tape & Reel  
Minimum Order Quantity  
AON7262E  
5000  
Absolute Maximum Ratings TA=25°C unless otherwise noted  
Parameter  
Symbol  
VDS  
Maximum  
Units  
Drain-Source Voltage  
Gate-Source Voltage  
60  
±20  
34  
V
V
VGS  
TC=25°C  
Continuous Drain  
Current G  
Pulsed Drain Current C  
ID  
TC=100°C  
A
34  
IDM  
135  
21  
TA=25°C  
TA=70°C  
Continuous Drain  
Current  
Avalanche Current C  
IDSM  
A
17  
IAS  
23  
A
mJ  
V
C
Avalanche energy  
L=0.3mH  
10µs  
EAS  
79  
I
VDS Spike  
VSPIKE  
72  
TC=25°C  
TC=100°C  
TA=25°C  
TA=70°C  
43  
PD  
W
Power Dissipation B  
Power Dissipation A  
17  
5.0  
PDSM  
W
3.2  
Junction and Storage Temperature Range  
TJ, TSTG  
-55 to 150  
°C  
Thermal Characteristics  
Parameter  
Symbol  
Typ  
20  
Max  
Units  
°C/W  
°C/W  
°C/W  
Maximum Junction-to-Ambient A  
t ≤ 10s  
25  
55  
RθJA  
Maximum Junction-to-Ambient A D  
Maximum Junction-to-Case  
Steady-State  
Steady-State  
45  
RθJC  
2.4  
2.9  
Rev.1.0: January 2016  
www.aosmd.com  
Page 1 of 6  
AON7262E  
Electrical Characteristics (TJ=25°C unless otherwise noted)  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Units  
STATIC PARAMETERS  
ID=250µA, VGS=0V  
BVDSS  
Drain-Source Breakdown Voltage  
60  
V
VDS=60V, VGS=0V  
1
IDSS  
Zero Gate Voltage Drain Current  
µA  
TJ=55°C  
5
V
DS=0V, VGS=±20V  
IGSS  
Gate-Body leakage current  
Gate Threshold Voltage  
±10  
2.2  
6.2  
10  
µA  
V
VGS(th)  
VDS=VGS, ID=250µA  
1.2  
1.65  
4.8  
7.8  
6.2  
75  
VGS=10V, ID=20A  
mΩ  
RDS(ON)  
Static Drain-Source On-Resistance  
TJ=125°C  
VGS=4.5V, ID=18A  
VDS=5V, ID=20A  
IS=1A, VGS=0V  
8.5  
mΩ  
S
gFS  
VSD  
IS  
Forward Transconductance  
Diode Forward Voltage  
0.7  
1
V
Maximum Body-Diode Continuous Current G  
34  
A
DYNAMIC PARAMETERS  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
1652  
520  
52  
pF  
pF  
pF  
VGS=0V, VDS=30V, f=1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate resistance  
f=1MHz  
0.6  
1.3  
2.0  
SWITCHING PARAMETERS  
Qg(10V)  
Qg(4.5V)  
Qgs  
Qgd  
tD(on)  
tr  
Total Gate Charge  
30  
15  
3.5  
6.5  
6
45  
25  
nC  
nC  
nC  
nC  
ns  
Total Gate Charge  
V
GS=10V, VDS=30V, ID=20A  
Gate Source Charge  
Gate Drain Charge  
Turn-On DelayTime  
Turn-On Rise Time  
VGS=10V, VDS=30V, RL=1.5,  
RGEN=3Ω  
5
ns  
tD(off)  
tf  
Turn-Off DelayTime  
29  
7
ns  
Turn-Off Fall Time  
ns  
trr  
IF=20A, di/dt=500A/µs  
IF=20A, di/dt=500A/µs  
Body Diode Reverse Recovery Time  
Body Diode Reverse Recovery Charge  
19  
60  
ns  
Qrr  
nC  
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power  
dissipation PDSM is based on R θJA t≤ 10s and the maximum allowed junction temperature of 150°C. The value in any given application depends on  
the user's specific board design.  
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper  
dissipation limit for cases where additional heatsinking is used.  
C. Single pulse width limited by junction temperature TJ(MAX)=150°C.  
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.  
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.  
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a  
maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.  
G. The maximum current rating is package limited.  
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.  
I. The spike duty cycle 5% max, limited by junction temperature TJ(MAX)=125°C.  
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING  
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,  
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.  
Rev.1.0: January 2016  
www.aosmd.com  
Page 2 of 6  
AON7262E  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
10V  
4V  
VDS=5V  
3.5V  
4.5V  
3.0V  
125°C  
25°C  
VGS=2.5V  
1
2
3
4
5
0
1
2
3
4
5
VGS (Volts)  
VDS (Volts)  
Figure 2: Transfer Characteristics (Note E)  
Figure 1: On-Region Characteristics (Note E)  
8
2
1.8  
1.6  
1.4  
1.2  
1
VGS=4.5V  
VGS=10V  
ID=20A  
6
4
2
VGS=10V  
VGS=4.5V  
ID=18A  
0.8  
0
25  
50  
75  
100  
125  
150  
175  
0
5
10  
15  
ID (A)  
20  
25  
30  
Temperature (°C)  
Figure 3: On-Resistance vs. Drain Current and Gate  
Voltage (Note E)  
Figure 4: On-Resistance vs. Junction Temperature  
(Note E)  
20  
15  
10  
5
1.0E+01  
1.0E+00  
1.0E-01  
1.0E-02  
1.0E-03  
1.0E-04  
1.0E-05  
ID=20A  
125°C  
125°C  
25°C  
25°C  
0
2
4
6
8
10  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
VSD (Volts)  
Figure 6: Body-Diode Characteristics  
(Note E)  
VGS (Volts)  
Figure 5: On-Resistance vs. Gate-Source Voltage  
(Note E)  
Rev.1.0: January 2016  
www.aosmd.com  
Page 3 of 6  
AON7262E  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
10  
2500  
VDS=30V  
ID=20A  
8
6
4
2
0
2000  
1500  
1000  
500  
0
Ciss  
Coss  
Crss  
0
5
10  
15  
20  
25  
30  
35  
0
10  
20  
30  
40  
50  
60  
Qg (nC)  
VDS (Volts)  
Figure 8: Capacitance Characteristics  
Figure 7: Gate-Charge Characteristics  
500  
400  
300  
200  
100  
0
1000.0  
100.0  
10.0  
1.0  
TJ(Max)=150°C  
TC=25°C  
10µs  
RDS(ON)  
limited  
100µs  
1ms  
10ms  
DC  
TJ(Max)=150°C  
TC=25°C  
0.1  
0.0  
0.01  
0.0001 0.001  
0.01  
0.1  
1
10  
100  
0.1  
1
10  
100  
Pulse Width (s)  
VDS (Volts)  
VGS> or equal to 4.5V  
Figure 10: Single Pulse Power Rating Junction-to-  
Case (Note F)  
Figure 9: Maximum Forward Biased Safe  
Operating Area (Note F)  
10  
1
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
D=Ton/T  
TJ,PK=TC+PDM.ZθJC.RθJC  
RθJC=2.9°C/W  
PDM  
0.1  
0.01  
Single Pulse  
Ton  
T
1E-05  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
Pulse Width (s)  
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)  
Rev.1.0: January 2016  
www.aosmd.com  
Page 4 of 6  
AON7262E  
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS  
50  
50  
40  
30  
20  
10  
0
40  
30  
20  
10  
0
0
25  
50  
75  
100  
125  
150  
0
25  
50  
75  
100  
125  
150  
TCASE (°C)  
TCASE (°C)  
Figure 12: Power De-rating (Note F)  
Figure 13: Current De-rating (Note F)  
10000  
1000  
100  
10  
TA=25°C  
1
1E-05  
0.001  
0.1  
Pulse Width (s)  
10  
1000  
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)  
10  
1
D=Ton/T  
TJ,PK=TA+PDM.ZθJA.RθJA  
In descending order  
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse  
RθJA=55°C/W  
0.1  
PDM  
0.01  
0.001  
Single Pulse  
0.01  
Ton  
T
0.0001  
0.001  
0.1  
1
10  
100  
1000  
Pulse Width (s)  
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)  
Rev.1.0: January 2016  
www.aosmd.com  
Page 5 of 6  
AON7262E  
Figure A: Gate Charge Test Circuit & Waveforms  
Vgs  
Qg  
10V  
+
VDC  
+
Qgs  
Qgd  
Vds  
VDC  
-
-
DUT  
Vgs  
Ig  
Charge  
Figure B: Resistive Switching Test Circuit & Waveforms  
RL  
Vds  
Vds  
90%  
10%  
+
DUT  
Vdd  
Vgs  
VDC  
Rg  
-
Vgs  
Vgs  
td(on)  
t
r
td(off)  
t
f
ton  
toff  
Figure C: Unclamped Inductive Switching (UIS) Test Circuit & Waveforms  
L
EAR= 1/2 LIA2R  
BVDSS  
Vds  
Id  
Vds  
+
Vgs  
Vdd  
I AR  
Vgs  
VDC  
Id  
Rg  
-
DUT  
Vgs  
Vgs  
Figure D: Diode Recovery Test Circuit & Waveforms  
Qrr = - Idt  
Vds +  
Vds -  
Ig  
DUT  
Vgs  
trr  
L
Isd  
IF  
Isd  
Vgs  
dI/dt  
IRM  
+
Vdd  
VDC  
Vdd  
-
Vds  
Rev.1.0: January 2016  
www.aosmd.com  
Page 6 of 6  

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