AOT410L [AOS]
100V N-Channel MOSFET SDMOSâ¢; 100V N沟道MOSFET SDMOSâ ?? ¢
| 型号： | AOT410L |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | 100V N-Channel MOSFET SDMOS⢠|
| 文件： | 总7页 (文件大小：324K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AOT410L/AOB410L
100V N-Channel MOSFET
SDMOS TM
General Description
Product Summary
The AOT410L/AOB410L is fabricated with SDMOSTM
trench technology that combines excellent RDS(ON) with
low gate charge & low Qrr.The result is outstanding
efficiency with controlled switching behavior. This
universal technology is well suited for PWM, load
switching and general purpose applications.
VDS
100V
ID (at VGS=10V)
RDS(ON) (at VGS=10V)
150A
< 6.5mΩ
< 7.5mΩ
RDS(ON) (at VGS= 7V)
100% UIS Tested
100% Rg Tested
TO-263
D2PAK
TO220
Top View
Bottom View
Top View
Bottom View
D
D
D
D
D
G
S
S
G
G
D
D
S
G
G
S
S
AOB410L
AOT410L
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Maximum
Units
Drain-Source Voltage
Gate-Source Voltage
100
±25
150
108
405
12
V
V
VGS
TC=25°C
Continuous Drain
Current G
Pulsed Drain Current C
ID
TC=100°C
A
A
IDM
TA=25°C
TA=70°C
Continuous Drain
Current
Avalanche Current C
Avalanche energy L=0.1mH C
IDSM
10
IAS,IAR
50
A
EAS,EAR
125
333
167
1.9
mJ
TC=25°C
PD
W
Power Dissipation B
TC=100°C
TA=25°C
PDSM
W
°C
Power Dissipation A
1.2
TA=70°C
Junction and Storage Temperature Range
TJ, TSTG
-55 to 175
Thermal Characteristics
Parameter
Symbol
Typ
12
Max
15
Units
°C/W
°C/W
°C/W
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
t
≤ 10s
RθJA
Steady-State
Steady-State
54
65
RθJC
0.35
0.45
Rev1: Jul 2011
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Page 1 of 7
AOT410L/AOB410L
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max Units
STATIC PARAMETERS
ID=250µA, VGS=0V
BVDSS
Drain-Source Breakdown Voltage
100
V
VDS=100V, VGS=0V
10
µA
50
IDSS
Zero Gate Voltage Drain Current
TJ=55°C
VDS=0V, VGS= ±25V
VDS=5V ,ID=250µA
VGS=10V, VDS=5V
VGS=10V, ID=20A
T0220
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
100
4
nA
V
VGS(th)
ID(ON)
2
3
405
5.1
8.8
A
6.5
11
mΩ
TJ=125°C
VGS=7V, ID=20A
T0220
5.8
4.8
7.5
6.2
7.2
mΩ
mΩ
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=20A
TO263
VGS=7V, ID=20A
TO263
5.5
70
mΩ
VDS=5V, ID=20A
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
S
IS=1A,VGS=0V
0.63
1
V
A
Maximum Body-Diode Continuous Current
150
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
5290 6622 7950
pF
pF
pF
Ω
VGS=0V, VDS=50V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
415
130
0.3
594
215
0.64
770
300
1
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=50V, ID=20A
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
85
23
24
107
28.5
40
129
34
nC
nC
nC
ns
ns
ns
ns
Qgs
Qgd
tD(on)
tr
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
56
28
VGS=10V, VDS=50V, RL=2.5Ω,
RGEN=3Ω
22
tD(off)
tf
43.5
14.5
trr
IF=20A, dI/dt=500A/µs
IF=20A, dI/dt=500A/µs
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
19
27
35
ns
Qrr
nC
124
177
230
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow s it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse ratin g.
G. The maximum current limited by package is 120A.
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev1: Jul 2011
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Page 2 of 7
AOT410L/AOB410L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
150
120
90
60
30
0
180
150
120
90
10V
VDS=5V
6.5V
7V
6V
5.5V
60
125°C
30
25°C
VGS=5V
0
0
1
2
3
4
5
3
4
5
6
7
VGS(Volts)
VDS (Volts)
Figure 2: Transfer Characteristics (Note E)
Fig 1: On-Region Characteristics (Note E)
8
2.4
2.2
2
VGS=10V
ID=20A
7
6
5
4
3
1.8
1.6
1.4
1.2
1
VGS=7V
VGS=7V
ID=20A
VGS=10V
0.8
0
5
10
15
D (A)
20
25
30
0
25
50
75
100 125 150 175 200
I
Temperature (°C)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
12
10
8
1.0E+02
ID=20A
125°C
1.0E+01
1.0E+00
125°C
1.0E-01
1.0E-02
1.0E-03
1.0E-04
25°C
25°C
6
4
5
6
7
8
9
10
0.0
0.2
0.4
0.6
0.8
1.0
VGS (Volts)
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev1: Jul 2011
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Page 3 of 7
AOT410L/AOB410L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10000
8000
6000
4000
2000
0
10
VDS=50V
ID=20A
8
Ciss
6
4
Coss
2
Crss
0
0
20
40
60
Qg (nC)
80
100
120
0
10
20
30
VDS (Volts)
40
50
60
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
1000.0
100.0
10.0
1.0
5000
4000
3000
2000
1000
0
10µs
RDS(ON)
TJ(Max)=175°C
TC=25°C
limited
100µs
1ms
DC
10ms
TJ(Max)=175°C
TC=25°C
0.1
0.0
0.01
0.1
1
10
100
1000
1E-05 0.0001 0.001
0.01
0.1
10
1
VDS (Volts)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Case (Note F)
10
1
D=Ton/T
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
TJ,PK=TC+PDM.ZθJC.RθJC
R
θJC=0.45°C/W
0.1
PD
Single Pulse
0.01
0.001
Ton
T
0.00001
0.0001
0.001
0.01
Pulse Width (s)
0.1
1
10
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev1: Jul 2011
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Page 4 of 7
AOT410L/AOB410L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1000.0
100.0
10.0
350
300
250
200
150
100
50
TA=25°C
TA=100°C
TA=150°C
TA=125°C
0
1.0
0
25
50
75
100
125
150
175
1
10
100
1000
TCASE (°C)
Time in avalanche, tA (µs)
Figure 13: Power De-rating (Note F)
Figure 12: Single Pulse Avalanche capability (Note
C)
1000
100
10
160
120
80
TA=25°C
40
1
0
0.0001
0.01
1
100
10000
0
25
50
75
100
125
150
175
Pulse Width (s)
TCASE (°C)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
Figure 14: Current De-rating (Note F)
10
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
θJA=65°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
R
0.1
PD
0.01
0.001
Single Pulse
1
Ton
T
0.01
0.1
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Rev1: Jul 2011
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Page 5 of 7
AOT410L/AOB410L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
320
280
240
200
160
120
80
40
35
30
25
20
15
10
40
35
30
25
20
15
10
5
4
125ºC
di/dt=800A/µs
di/dt=800A/µs
25ºC
3
trr
Qrr
2
25ºC
125ºC
125ºC
1
0
25ºC
S
Irm
125ºC
15
25ºC
20
-1
0
5
10
15
25
30
0
5
10
20
25
30
IS (A)
IS (A)
Figure 17: Diode Reverse Recovery Charge and Peak
Current vs. Conduction Current
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
280
40
30
20
10
0
50
2
Is=20A
125ºC
Is=20A
240
200
160
120
80
40
30
20
10
0
125ºC
1.5
1
trr
25ºC
25ºC
Qrr
125ºC
25ºC
25ºC
0.5
0
S
Irm
40
125º
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di/dt (A/µs)
di/dt (A/µs)
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Rev1: Jul 2011
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Page 6 of 7
AOT410L/AOB410L
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
+
DUT
Vdd
Vgs
VDC
Rg
-
10%
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
Vds -
Ig
DUT
Vgs
trr
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Rev1: Jul 2011
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Page 7 of 7
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