AOZ1310 [AOS]

Single Channel USB Switch; 单路USB开关
AOZ1310
型号: AOZ1310
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

Single Channel USB Switch
单路USB开关

开关
文件: 总11页 (文件大小:519K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AOZ1310  
Single Channel USB Switch  
General Description  
Features  
The AOZ1310 is a member of Alpha and Omega  
Semiconductor’s single-channel power-distribution  
switch family intended for applications where heavy  
capacitive loads and short-circuits are likely to be  
encountered. This device incorporates a 70 m  
N-channel MOSFET power switch for power-distribution  
systems. The switch is controlled by a logic enable input.  
Gate drive is provided by an internal charge pump  
designed to control the power-switch rise time and fall  
time to minimize current surges during switching. The  
charge pump requires no external components and  
allows operation from supplies as low as 2.7 V.  
z Typical 80 m(NFET)  
z 0.5A maximum continuous current  
z Vin range of 2.7 V to 5.5 V  
z Open Drain Fault Flag  
z Fault Flag deglitched (blanking time)  
z Thermal shutdown  
z Reverse current blocking  
z Package: SOT23-5  
Applications  
z Notebook Computers  
z Desktop Computers  
The AOZ1310 is available in an SOT23-5 package and is  
rated over the -40 °C to +85 °C ambient temperature  
range.  
Typical Application  
VIN  
OUT  
IN  
LOAD  
C2  
0.1μF  
C1  
22μF  
R1  
10kΩ  
AOZ1310  
Cin  
OC  
EN  
GND  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 1 of 11  
AOZ1310  
Ordering Information  
Maximum  
Continuous Current  
Typical Short-circuit  
Current Limit  
Enable  
Setting  
Output  
Discharge Environmental  
Part Number Channel 1 Channel 2 Channel 1 Channel 2  
Package  
AOZ1341AI  
AOZ1341EI  
SO-8  
Active Low  
Active High  
EPAD MSOP-8  
SO-8  
1 A  
1A  
1.5 A  
2 A  
1.5 A  
2 A  
AOZ1341AI-1  
AOZ1341EI-1  
AOZ1342PI  
EPAD MSOP-8  
Active Low EPAD SO-8  
Active High EPAD SO-8  
1.5 A  
1.5 A  
1.5A  
0.5A  
AOZ1342PI-1  
AOZ1343AI*  
AOZ1343EI*  
AOZ1343AI-1*  
AOZ1343EI-1*  
AOZ1312AI-1  
AOZ1312EI-1  
AOZ1310CI-1  
Green Product  
No  
SO-8  
Active Low  
RoHS Compliant  
EPAD MSOP-8  
2 A  
0.75 A  
SO-8  
Active High  
EPAD MSOP-8  
SO-8  
Active High  
1.5 A  
0.5 A  
None  
None  
2 A  
None  
None  
EPAD MSOP-8  
0.75 A  
Active High SOT23-5  
*Contact factory for availability  
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.  
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.  
Pin Configuration  
AOZ1310CI-1  
1
2
3
5
OUT  
GND  
OC  
IN  
4
EN  
SOT23-5  
(Top View)  
Pin Description  
Pin Name  
Pin Number  
Pin Function  
OUT  
GND  
OC  
1
2
3
4
5
Power-switch output, IN-OUT  
Ground  
Overcurrent, open-drain output, active low, IN-OUT  
Enable input, logic high turns on power switch, IN-OUT  
Input voltage  
EN  
IN  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 2 of 11  
AOZ1310  
Absolute Maximum Ratings  
Exceeding the Absolute Maximum Ratings may damage the  
Recommended Operating Conditions  
The device is not guaranteed to operate beyond the  
device.  
Recommended Operating Conditions.  
Parameter  
Input Voltage (VIN)  
Enable Voltage (VEN  
Rating  
Parameter  
Input Voltage (VIN)  
Rating  
6 V  
6 V  
+2.7 V to +5.5 V  
-40 °C to +125 °C  
)
Junction Temperature (TJ)  
Package Thermal Resistance (ΘJA  
SOT23-5  
Storage Temperature (TS)  
ESD Rating(1)  
Note:  
-55 °C to +150 °C  
2 kV  
)
191 °C/W  
1. Devices are inherently ESD sensitive, handling precautions are  
required. Human body model is a 100 pF capacitor discharging  
through a 1.5 kΩ resistor.  
Electrical Characteristics  
T = 25 °C, V = V =5.5 V, unless otherwise specified.  
A
IN  
EN  
(3)  
Symbol  
Parameter  
Conditions  
Min.  
Typ. Max. Units  
POWER SWITCH  
RDS(ON) Switch On-Resistance  
VIN = 5.5 V, IOUT = 0.5 A  
80  
0.6  
0.4  
145  
1.5  
1
mΩ  
tr  
Rise Time, Output  
VIN = 5.5 V , CL = 1 μF, RL = 10 Ω  
VIN = 2.7 V, CL = 1μF, RL = 10 Ω  
VIN = 5.5 V  
ms  
tf  
Fall Time, Output  
0.05  
0.05  
0.5  
0.5  
ms  
VIN = 2.7 V  
FET Leakage Current  
Out connect to ground,  
VI(ENx) = 5.5 V,  
-40 °C TJ 125 °C(2)  
1
μA  
or VI(ENx) = 0 V  
ENABLE INPUT EN  
VIH  
VIL  
II  
High-level Input Voltage  
2.7V VIN 5.5V  
2.7V VIN 5.5V  
2.0  
V
V
Low-level Input Voltage  
Input Current  
0.8  
-0.5  
3
-0.5  
μA  
ms  
ton  
toff  
Turn-on Time  
CL = 100 μF, RL = 10 Ω  
CL = 100 μF, RL = 10 Ω  
Turn-off Time  
10  
CURRENT LIMIT  
IOS  
Short-circuit Output Current  
0.5  
0.6  
0.8  
1.0  
1.1  
A
A
IOC_TRIP Overcurrent Trip Threshold  
SUPPLY CURRENT  
0.85  
Supply Current, Low-level  
Output  
No load on OUT,  
VI(ENx) = 5.5 V,  
or VI(ENx) = 0 V  
TJ = 25°C  
-40 °C TJ 125 °C(2)  
0.5  
0.5  
1
5
μA  
μA  
μA  
Supply Current, High-level  
Output  
No load on OUT,  
VI(ENx) = 0 V,  
or VI(ENx) = 5.5 V  
TJ = 25°C  
-40 °C TJ 125 °C(2)  
50  
50  
70  
90  
Reverse Leakage Current  
UNDERVOLTAGE LOCKOUT  
Low-level Voltage, IN  
VI(OUTx) = 5.5V, IN = ground TJ = 25 °C  
0.2  
2
2.5  
V
Hysteresis, IN  
TJ = 25°C  
200  
mV  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 3 of 11  
AOZ1310  
Electrical Characteristics (Continued)  
T = 25 °C, V = V =5.5 V, unless otherwise specified.  
A
IN  
EN  
(3)  
Symbol  
Parameter  
Conditions  
Min.  
Typ. Max. Units  
OVERCURRENT OC  
Output low Voltage VOL(OCx) IO(OCx) = 5mA  
Off-state Current O(OCx) = 5V or 3.3V  
OCx assertion or deassertion  
0.4  
1
V
V
μA  
ms  
OC_L Deglitch  
4
8
15  
THERMAL SHUTDOWN  
Thermal Shutdown  
Threshold  
135  
105  
°C  
°C  
°C  
Recovery from Thermal  
Shutdown  
Hysteresis  
30  
Note:  
2. Parameters are guaranteed by design only and not production tested.  
3. Pulse testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.  
Functional Block Diagram  
IN  
OUT  
Gate Driver  
UVLO  
Comparator  
Current  
Limit  
2.5V  
Thermal  
Shutdown  
EN  
OC  
Deglitch  
AOZ1310  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 4 of 11  
AOZ1310  
Functional Characteristics  
Figure 2. Turn-Off Delay and Fall Time  
with 1μF Load (Active High)  
Figure 1. Turn-On Delay and Rise Time  
with 1μF Load (Active High)  
R
= 10ꢀ  
= 1μF  
= 25°C  
L
L
R
C
T
= 10ꢀ  
= 1μF  
= 25°C  
L
L
A
C
T
A
EN  
5V/div  
EN  
5V/div  
VOUT  
2V/div  
VOUT  
2V/div  
200μs/div  
200μs/div  
Figure 4. Turn-Off Delay and Fall Time  
Figure 3. Turn-On Delay and Rise Time  
with 100μF Load (Active High)  
with 100μF Load (Active High)  
R
C
A
= 10ꢀ  
= 100μF  
= 25°C  
L
L
R
C
A
= 10ꢀ  
= 100μF  
= 25°C  
L
L
T
T
EN  
5V/div  
EN  
5V/div  
VOUT  
2V/div  
VOUT  
2V/div  
200μs/div  
500μs/div  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 5 of 11  
AOZ1310  
Typical Characteristics  
Figure 5. Supply Current, Output Enabled  
vs. Junction Temperature  
Figure 6. Supply Current, Output Disabled  
vs. Junction Temperature  
0.50  
0.45  
0.40  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0
70  
60  
50  
40  
30  
20  
10  
0
Vin=5.5V  
Vin=5V  
Vin=3.3V  
Vin=2.7V  
Vin=5.5V  
Vin=5V  
Vin=3.3V  
Vin=2.7V  
-50  
0
50  
100  
150  
-50  
0
50  
100  
C)  
150  
Junction Temperature (°C)  
Junction Temperature (  
°
Figure 7. UVLO Threshold vs. Junction Temperature  
2.22  
2.21  
2.20  
2.19  
2.18  
2.17  
2.16  
2.15  
2.14  
2.13  
2.12  
2.11  
Rising  
Falling  
-50  
0
50  
100  
150  
Junction Temperature (°C)  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 6 of 11  
AOZ1310  
Detailed Description  
The AOZ1310 is a member of Alpha and Omega  
Semiconductor’s single-channel power-distribution  
switches family. The AOZ1310 is intended for  
applications where heavy capacitive loads and  
short-circuits are likely to be encountered. Gate drive is  
provided by an internal charge pump designed to control  
the power-switch rise times and fall times to minimize  
current surges during switching. The charge pump  
requires no external components and allows operation  
from supplies as low as 2.7 V.  
Enable  
The logic enable disables the power switch, charge  
pump, gate driver, logic device, and other circuitry to  
reduce the supply current. When the enable receives a  
logic high the supply current is reduced to approximately  
1 μA. The enable input is compatible with both TTL and  
CMOS logic levels.  
Over-current  
The over-current open drain output is asserted  
(active low) when an over-current condition occurs.  
The output will remain asserted until the over-current  
condition is removed. A 15 ms deglitch circuit prevents  
the over-current from false triggering.  
Power Switch  
The power switch is a N-channel MOSFET with a low  
on-state resistance capable of delivering 1 A of  
continuous current. Configured as a high-side switch,  
the MOSFET will go into high impedance when disabled.  
Thus, preventing current flow from OUT to IN and IN to  
OUT.  
Thermal Shut-down Protection  
When the output load exceeds the current-limit threshold  
or a short is present, the device limits the output current  
to a safe level by switching into a constant-current mode,  
pulling the overcurrent (OC) logic output low.  
Charge Pump  
An internal charge pump supplies power to the circuits  
and provides the necessary voltage to drive the gate of  
the MOSFET beyond the source. The charge pump is  
capable of operating down to a low voltage of 2.7 Volts.  
During current limit or short circuit conditions, the  
increasing power dissipation in the chip causing the die  
temperature to rise. When the die temperature reaches a  
certain level, the thermal shutdown circuitry will shutdown  
the device. The thermal shutdown will cycle repeatedly  
until the short circuit condition is resolved.  
Driver  
The driver controls the voltage on the gate to the power  
MOSFET switch. This is used to limit the large current  
surges when the switch is being turned On and Off.  
Proprietary circuitry controls the rise and fall time of the  
output voltages.  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 7 of 11  
AOZ1310  
Applications Information  
Input Capacitor Selection  
Power Dissipation Calculation  
The input capacitor prevents large voltage transients  
from appearing at the input, and provides the  
Calculate the power dissipation for normal load condition  
using the following equation:  
instantaneous current needed each time the switch turns  
on and to limit input voltage drop. The input capacitor  
also prevents high-frequency noise on the power line  
from passing through the output of the power side. The  
choice of the input capacitor is based on its ripple current  
and voltage ratings rather than its capacitor value. The  
2
P = R x (I )  
OUT  
D
ON  
The worst case power dissipation occurs when the load  
current hits the current limit due to over-current or short  
circuit faults. The power dissipation under these  
conditions can be calculated using the following  
equation:  
input capacitor should be located as close to the V pin  
IN  
as possible. A 1 μF and above ceramic cap is  
recommended. However, higher capacitor values further  
reduce the voltage drop at the input.  
P = (V – V  
) x I  
LIMIT  
D
IN  
OUT  
Layout Guidelines  
Output Capacitor Selection  
Good PCB layout is important for improving the thermal  
and overall performance of the AOZ1310. To optimize the  
switch response time to output short-circuit conditions  
keep all traces as short as possible to reduce the effect of  
unwanted parasitic inductance. Place the input and  
output bypass capacitors as close as possible to the IN  
and OUT pins. The input and output PCB traces should  
be as wide as possible for the given PCB space. Use a  
ground plane to enhance the power dissipation capability  
of the device.  
The output capacitor acts in a similar way. A small 0.1 μF  
capacitor prevents high-frequency noise from going into  
the system. Also, the output capacitor has to supply  
enough current for a large load that it may encounter  
during system transients. This bulk capacitor must be  
large enough to supply fast transient load in order to  
prevent the output from dropping.  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 8 of 11  
AOZ1310  
Package Dimensions, SOT23-5  
Gauge Plane  
C
Seating Plane  
L2  
D
e1  
5
L
E
E1  
1
θ
e
b
A2  
A
aaa  
A1  
RECOMMENDED LAND PATTERN  
Dimensions in millimeters  
Dimensions in inches  
Symbols Min.  
Nom. Max.  
Symbols Min.  
Nom. Max.  
1.90  
A
A1  
A2  
b
C
D
E
E1  
e
e1  
L
L2  
aaa  
θ
0.88  
0.40  
0.13  
2.90  
2.80  
1.60  
0.95 BSC  
1.90 BSC  
0.40  
0.25 BSC  
0.10  
1.00  
0.10  
0.95  
0.50  
0.20  
3.00  
3.00  
1.70  
A
A1  
A2  
b
C
D
E
E1  
e
e1  
L
L2  
aaa  
θ
0.00  
0.039  
0.004  
0.00  
0.70  
0.35  
0.10  
2.80  
2.60  
1.50  
0.028 0.035 0.037  
0.014 0.016 0.020  
0.004 0.005 0.008  
0.110 0.114 0.118  
0.102 0.110 0.118  
0.059 0.063 0.067  
0.037 BSC  
2.40  
0.80  
0.95  
UNIT: mm  
0.63  
0.075 BSC  
0.30  
0°  
0.60  
8°  
0.012 0.016 0.024  
0.010 BSC  
0.004  
0°  
8°  
Notes:  
1. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 5 mils.  
2. Dimension "L" is measured in gauge plane.  
3. Tolerance 0.10mm (4 mil) unless otherwise specified  
4. Refer to JEDEC MO-193C AB.  
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 9 of 11  
AOZ1310  
Tape and Reel Dimensions, SOT23-5  
Tape  
P2  
P1  
D1  
D0  
E1  
K0  
E2  
E
B0  
A0  
P0  
Feeding Direction  
Unit: mm  
Package  
A0  
B0  
K0  
D0  
D1  
E
E1  
E2  
P0  
P1  
P2  
T
SOT23-5/6L  
LP  
3.15  
0.10  
3.20  
0.10  
1.40  
0.10  
1.50  
1.00  
8.00  
0.30  
1.75  
0.10  
3.50  
0.05  
4.00  
0.10  
4.00  
0.10  
2.00  
0.05  
0.23  
0.03  
0.05 +0.10 / -0  
Reel  
W1  
S
K
R
M
N
J
H
Unit: mm  
Tape Size  
8mm  
Reel Size  
M
N
W1  
H
S
K
R
J
ø177.8  
ø177.8  
Max.  
55.0  
Min.  
8.4  
13.0  
1.5  
10.1  
Min.  
12.7  
4.0  
0.1  
+1.50 / -0.0 +0.5 / -0.2  
Min  
Leader/Trailer and Orientation  
Leader Tape  
500mm min.  
Trailer Tape  
300mm min.  
Components Tape  
Orientation in Pocket  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 10 of 11  
AOZ1310  
Part Marking  
AOZ1310CI-1  
(SOT23-5)  
Assembly Lot Code  
Year Code and Week Code  
Part Number Code  
Option Code and Assembly Location  
This datasheet contains preliminary data; supplementary data may be published at a later date.  
Alpha & Omega Semiconductor reserves the right to make changes at any time without notice.  
LIFE SUPPORT POLICY  
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL  
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body or (b) support or sustain life, and (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in a significant injury of  
the user.  
2. A critical component in any component of a life  
support, device, or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
Rev. 1.3 July 2011  
www.aosmd.com  
Page 11 of 11  

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