AOZ1360AIL [AOS]
Buffer/Inverter Based Peripheral Driver,;![AOZ1360AIL](http://pdffile.icpdf.com/pdf2/p00275/img/icpdf/AOZ1360AIL_1648004_icpdf.jpg)
型号: | AOZ1360AIL |
厂家: | ![]() |
描述: | Buffer/Inverter Based Peripheral Driver, 驱动 光电二极管 接口集成电路 驱动器 |
文件: | 总16页 (文件大小:1527K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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AOZ1360
28V Programmable Current-Limited Load Switch
General Description
Features
The AOZ1360 is a member of Alpha and Omega
Semiconductor’s high-side load switch family intended
for applications that require circuit protection. The device
operates from a source voltage between 5.5V and 28V.
The internal current limiting circuit protects the input
supply voltage from large current load. The current limit
can be set with an external resistor. The AOZ1360
provides thermal protection function that limits excessive
power dissipation. The device employs internal soft-start
circuitry to control in-rush current due to highly capacitive
loads associated with hot-plug events. It features low
quiescent current of 220 µA and the supply current
reduces to less than 1 µA at shutdown.
35m maximum on resistance
Programmable current limit
5.5V to 28V operating input voltage
Low quiescent current
Under-voltage lockout
Thermal shutdown protection
2.5kV ESD rating
Available in SO-8 or DFN-10 package
Applications
Notebook PCs
Hot swap supplies
The AOZ1360 is available in either an SO-8 or a
DFN-10 4 mm x 4 mm package which can operate over
a -40C to +85C temperature range.
Typical Application
VIN
VOUT
IN
OUT
C1
1μF
C2
1μF
AOZ1360
EN
SS
SET
OFF ON
R1
84.5k
GND
C3
1nF
Rev. 2.0 January 2015
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Page 1 of 16
AOZ1360
Ordering Information
Part Number
Package
Temperature Range
Environmental
Green Product
AOZ1360AIL
AOZ1360DIL
SO-8
-40 °C to +85 °C
DFN-10 4x4
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
1
2
3
4
8
7
6
5
OUT
OUT
SET
EN
IN
IN
10
9
1
2
OUT
OUT
NC
SET
EN
IN
IN
NC
GND
SS
OUT
GND
8
3
4
5
GND
SS
7
6
SO-8
DFN-10
(Top View)
(Top View)
Pin Description
Pin Number
Pin Name
SO-8
DFN 4x4 10L
Pin Function
IN
GND
SS
1, 2
3
1, 2
4
P-channel MOSFET source. Connect a 1 µF capacitor from IN to GND.
Ground.
4
5
Soft-Start Pin. Connect a capacitor from SS to GND to set the soft-start time.
Connect SS to IN to set to the default soft-start time of 100us.
EN
5
6
6
7
Enable Input.
SET
Current Limit Set Pin. Connect a resistor from SET to GND to set the switch
current limit.
NC
3, 8
No Connect
OUT
7, 8
9, 10
P-channel MOSFET Drain. Connect a capacitor with 0.1 µF or above from OUT
to GND.
Rev. 2.0 January 2015
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Page 2 of 16
AOZ1360
Functional Block Diagram
OUT
SET
IN
C1
1μF
C2
1μF
Gate Driver &
Slew Rate
Control
5V Linear
Regulator
Current Limit
R1
84.5kΩ
5.5V
SS
UVLO
Comparator
C3
1nF
Thermal
Shutdown
EN
AOZ1360
Figure 1. Functional Block Diagram
Timing Diagram
VIH
EN
VIL
90%
90%
10%
OUT
TD(ON)
TD(OFF)
TR
Figure 2. AOZ1360 Timing Diagram
Absolute Maximum Ratings
Exceeding the Absolute Maximum Ratings may damage the
device.
Recommended Operating Conditions
The device is not guaranteed to operate beyond the maximum
Recommended Operating Conditions.
Parameter
Rating
Parameter
Rating
IN to GND
-0.3 V to +30 V
-0.3 V to VIN +0.3 V
-0.3 V to +6 V
+150 °C
Junction Temperature (TJ)
Thermal Resistance
-40 °C to +125 °C
EN, OUT to GND
SO-8 (JA
)
82 °C/W
63 °C/W
SS, SET
DFN-10 (JA
)
Maximum Junction Temperature (TJ)
ESD Rating (Human Body Model)
2.5 kV
Rev. 2.0 January 2015
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Page 3 of 16
AOZ1360
Electrical Characteristics
VIN = 12V, TA = 25°C unless otherwise stated.
Symbol
Parameter
Conditions
Min.
Typ.
Max
Units
VIN
Input Supply Voltage
5.5
28
V
V
VUVLO
Undervoltage Lockout
Threshold
IN rising
4.9
400
220
5.4
VUVHYS Undervoltage Lockout
Hysteresis
mV
IIN_ON
IIN_OFF
ILEAK
Input Quiescent Current
Input Shutdown Current
Output Leakage Current
EN = IN, no load
400
1
A
A
A
m
m
A
EN = GND, no load
EN = GND, no load
AOZ1360AI VIN = 12 V
AOZ1360AI VIN = 5.5 V
RSET = 84.5 k
1
RDS(ON) Switch On Resistance
RDS(ON) Switch On Resistance
22
33
35
43
3.4
0.8
ILIM
Current Limit
2
2.7
VEN_L
VEN_H
Enable Input Low Voltage
Enable Input High Voltage
V
2.0
V
VEN_HYS Enable Input Hysteresis
IEN_BIAS Enable Input Bias Current
100
220
mV
A
s
1
Td_on
Turn-On Delay Time
RL = 120 , CL = 1 F, SS = Floated
EN_50% to OUT_10%
tON
Turn-On Rise Time
OUT_10% to 90%
RL = 120 , CL = 1 F, SS = Floated
RL = 120 , CL = 1 F, CSS = 1 nF
RL = 120 , CL = 1 F, SS = Floated
280
360
280
130
30
s
tOFF
TSD
Turn-Off Fall Time
s
C
C
Thermal Shutdown Threshold
TSD_HYS Thermal Shutdown Hysteresis
Rev. 2.0 January 2015
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Page 4 of 16
AOZ1360
Typical Performance Characteristics
Input Quiescent Current
Input Shutdown Current
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
290
270
250
230
85°C
25°C
-40°C
210
190
170
150
85°C
25°C
-40°C
5
10
15
20
25
30
5
10
15
20
25
30
V
IN
(V)
V
IN
(V)
Output Leakage Current
UVLO Threshold vs. Temperature
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
4.8
4.7
4.6
4.5
4.4
4.3
4.2
V
IN
V
IN
= 12V
= 5.5V
Rising
Falling
-50
-30
-10
10
30
50
70
90
-60
-40
-20
0
20
40
60
80
100 120
Temperature (°C)
Temperature (°C)
R
vs. Supply Voltage
R
vs. Temperature
DS(ON)
DS(ON)
35
40
35
30
25
20
15
10
5
30
25
20
15
10
5
V
IN
V
IN
= 12V
= 5.5V
0
0
-50
-30
-10
10
30
(V)
50
70
90
-60
-40
-20
0
20
40
60
80
100 120
V
Temperature (°C)
IN
Rev. 2.0 January 2015
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Page 5 of 16
AOZ1360
Typical Performance Characteristics (Continued)
Enable Input Threshold (Rising) vs. Temperature
Enable Input Threshold (Falling) vs. Temperature
1.8
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
V
IN
V
IN
= 12V
= 5.5V
V
IN
V
IN
= 12V
= 5.5V
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-60
-40
-20
0
20
40
60
80
100 120
-60
-40
-20
0
20
40
60
80
100 120
Temperature (°C)
Temperature (°C)
Current Derating Curve for SO8
Current Derating Curve for DFN-10 4x4
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
6.5
6.3
6.1
5.9
5.7
5.5
5.3
5.1
4.9
4.7
4.5
0
10
20
30
40
50
60
70
80
90
-40
-20
0
20
40
60
80
100
Ambient Temperature (°C)
Ambient Temperature (°C)
Internal Power MOSFET SOA
100.0
10ms
100m
10.0
1.0
0.1
0.0
RDS(ON)
limited
1ms
TJ(Max) =150eC
TA =25eC
10s
0.01
0.1
1
10
100
-V (Volts)
DS
Rev. 2.0 January 2015
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Page 6 of 16
AOZ1360
Typical Performance Characteristics (Continued)
Turn-On
Turn-Off
(V = 12V, R = 5.6Ω)
IN
(V = 12V, R = 5.6Ω)
IN
V
V
IN
2V/div
IN
2V/div
V
V
OUT
2V/div
OUT
2V/div
EN
EN
1V/div
1V/div
I
I
OUT
0.5A/div
OUT
0.5A/div
1ms/div
20μs/div
Current Limit
Over Temperature
(V = 12V, R = 3.6Ω)
IN
(V = 12V, R = 3.6Ω)
IN
V
V
IN
2V/div
IN
5V/div
V
V
OUT
2V/div
OUT
2V/div
EN
EN
1V/div
1V/div
I
I
OUT
0.5A/div
OUT
0.5A/div
5ms/div
100ms/div
Rev. 2.0 January 2015
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Page 7 of 16
AOZ1360
Detailed Description
Introduction
The slew rate rise time, Ton, can be set using the
following equation:
The AOZ1360 is a 35 m P-channel high-side load
switch with adjustable soft-start slew-rate control,
programmable current limit and thermal shutdown.
It operates with an input voltage range from 5.5 V to 28 V.
Css VIN
--------------------------
Ton =
30A
Enable
Programmable Current Limit
The EN pin is the On/Off control for the output switch.
The current limit is programmed by an external resistor
connected between the SET pin and ground. This sets a
reference voltage to the current limit error amplifier that
compares it to a sensed voltage that is generated by
passing a small portion of the load current through an
internal amplifier. When the sensed load current exceeds
the set current limit, the load current is then clamped at
the set limit and the Vout drops to whatever voltage is
necessary to clamp the load current. The AOZ1360 will
stay in this condition until the load current no longer
exceeds the current limit or if the thermal shutdown
protection is engaged.
It is an active-high input. The EN pin is active after V is
IN
above the UVLO threshold of 4.9 V. Conversely, the
EN pin will be deactivated if the V falls below the UVLO
IN
of 2.0V. The EN pin must be driven to a logic high or logic
low state to guarantee operation. While disabled, the
AOZ1360 only draws approximately 1 µA supply current.
The EN is a high impedance input with an ESD protection
diode to ground and should not be forced below ground.
This input level is compatible with most microcontroller
outputs and other logic families.
Under-Voltage Lockout (UVLO)
Thermal-Shutdown Protection
The under-voltage lockout (UVLO) circuit of the
AOZ1360 monitors the input voltage and prevents the
During current limit or short circuit conditions, the PMOS
resistance is increased to clamp the load current. This
increases the power dissipation in the chip causing the
die temperature to rise. When the die temperature
reaches 130 °C the thermal shutdown circuitry will
shutdown the device. There is a 30 °C hysteresis after
which the device will turn back on and go through soft
start. The thermal shutdown will cycle repeatedly until the
short circuit condition is resolved or the enable pin is
pulled LOW externally.
output MOSFET from turning on until V exceeds 4.9 V.
IN
Adjustable Soft-Start Slew-Rate Control
When the EN pin is high, the slew rate control circuitry
applies voltage on the gate of the PMOS switch in a
manner such that the output voltage and current is
ramped up linearly until it reaches the steady-state load
current level. The slew rate can be adjusted by an
external capacitor connected between the SS pin
and ground.
Rev. 2.0 January 2015
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Page 8 of 16
AOZ1360
Application Information
Input Capacitor Selection
Slew Rate Setting
The input capacitor prevents large voltage transients
from appearing at the input and provides the
Slew rate is set by changing the capacitor value on the
SS pin of the device. A capacitor connected between the
SS pin and ground will reduce the output slew-rate. The
capacitive range is 0.001 µF to 0.1 µF. Refer to Figure 4.
instantaneous current needed each time the switch
turns on. The input capacitor also limits input voltage
drop and prevents high-frequency noise on the power
line from passing through the output of the power side.
The choice of input capacitor is based on its ripple
current and voltage ratings rather than the actual
capacitance value. The input capacitor should be located
as close to VIN as possible. A 1 µF ceramic cap is
recommended. However, higher capacitor values will
further reduce the voltage drop at the input.
45
40
35
30
Slew Rate
(ms)
25
20
15
10
5
Output Capacitor Selection
The output capacitor acts in a similar way. A small 0.1 µF
capacitor prevents high-frequency noise from going into
the system. Also, the output capacitor has to supply
enough current for any large load that may occur during
system transients. This bulk capacitor must be large
enough to supply fast transient load in order to
prevent the output from dropping.
0
0
0.02
0.04
0.06
0.08
0.1
Capacitance (μF)
Figure 4. Output Slew Rate Adjustment vs. Capacitance
Current Limit Setting
The current limit is set by an external resistor connected
to the SET pin. Refer to Figure 3 for current limit settings.
Power Dissipation Calculation
Calculate the power dissipation for normal load condition
using the following equation:
2
AOZ1360 Rset vs ILIM
P = R x (I )
OUT
D
ON
7
The worst case power dissipation occurs when the
load current hits the current limit due to over-current or
short circuit faults. The power dissipation under these
conditions can be calculated using the following
equation:
6
5
4
ILIM (A)
3
2
1
0
P = (V – V
) x I
LIMIT
D
IN
OUT
35
45
55
65
75
85
95
105
RSET (kΩ)
Figure 3
Rev. 2.0 January 2015
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Page 9 of 16
AOZ1360
Layout Guidelines
Proper PCB layout is important for improving the thermal
and overall performance of the AOZ1360. To optimize the
switch response time for outputting short-circuit
conditions, keep all traces as short as possible. This will
also reduce the effect of unwanted parasitic inductance.
Place the input and output bypass capacitors as close as
possible to the IN and OUT pins. The input and output
PCB traces should be as wide as possible for the given
PCB space. Use a ground plane to enhance the power
dissipation capability of the device.
1
2
3
4
10
9
OUT
OUT
NC
IN
IN
OUT
OUT
1
2
3
4
8
OUT
IN
IN
7
8
NC
C1
C1
C2
C2
6
5
SET
EN
GND
7
SET
EN
GND
R1
R1
5
SS
6
SS
C3
C3
GND
Figure 5. AOZ1360AI (SO-8) Layout
Figure 6. AOZ1360DI (DFN4x4 10L) Layout
Rev. 2.0 January 2015
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Page 10 of 16
AOZ1360
Package Dimensions, SO-8L
D
Gauge Plane
Seating Plane
e
0.25
8
L
E1
E
h x 45
1
C
θ
7 (4x)
A2
A
0.1
A1
b
RECOMMENDED LAND PATTERN
Dimensions in millimeters
Dimensions in inches
Symbols Min.
Nom. Max.
Symbols Min.
Nom. Max.
0.053 0.065 0.069
0.004 0.010
0.049 0.059 0.065
A
A1
A2
b
c
D
E
1.35
0.10
1.25
0.31
0.17
4.80
3.80
1.65
—
1.50
—
1.75
0.25
1.65
0.51
0.25
5.00
4.00
A
A1
A2
b
2.20
—
0.012
0.007
—
—
0.020
0.010
—
c
4.90
3.90
1.27 BSC
6.00
—
D
E
e
0.189 0.193 0.197
0.150 0.154 0.157
0.050 BSC
5.74
e
2.87
1.27
E1
h
L
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
E1
h
L
0.228 0.236 0.244
0.010
0.016
0°
—
—
—
0.020
0.050
8°
—
—
θ
θ
0.80
UNIT: mm
0.635
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Rev. 2.0 January 2015
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Page 11 of 16
AOZ1360
Tape and Reel Dimensions, SO-8
Carrier Tape
P1
P2
D1
T
E1
E2
E
B0
K0
D0
P0
A0
Feeding Direction
UNIT: mm
Package
A0
B0
K0
D0
D1
E
E1
E2
P0
P1
P2
T
SO-8
(12mm)
6.40
0.10
5.20
0.10
2.10
0.10
1.60
0.10
1.50
0.10
12.00 1.75
0.10 0.10
5.50
0.10
8.00
0.10
4.00
0.10
2.00
0.10
0.25
0.10
Reel
W1
S
G
V
N
K
M
R
H
W
UNIT: mm
Tape Size Reel Size
12mm ø330
M
N
W
W1
ø330.00 ø97.00 13.00 17.40
0.50 0.10 0.30 1.00 +0.50/-0.20
H
K
S
G
R
V
ø13.00
10.60
2.00
0.50
—
—
—
Leader/Trailer and Orientation
Trailer Tape
300mm min. or
75 empty pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min. or
125 empty pockets
Rev. 2.0 January 2015
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Page 12 of 16
AOZ1360
Package Dimensions, DFN-10L, 4x4
D
A
3
B
e
*
D/2
L3
10
INDEX AREA
(D/2xE/2)
6
L
2
D/2
*
*
E1/2
L4
L4
L1
E1
E
L2
Pin #1 IDA
1
5
Pin 1
Chamfer 0.20
D2
D1
BOTTOM VIEW
TOP VIEW
6
A3
A1
C
A
Seating
Plane
5
10x
ddd
4
b
eee
SIDE VIEW
Dimensions in millimeters
Dimensions in inches
Symbols Min.
Nom. Max.
Symbols Min.
Nom. Max.
A
A1
A3
b
0.70
0.00
0.75
0.02
0.203 REF
0.35
4.00
1.68
1.32
4.00
2.30
0.65 BSC
0.55
0.02
0.38
0.80
0.05
A
A1
A3
b
0.028 0.030 0.031
0.000 0.001 0.002
0.008 REF
0.012 0.014 0.016
0.156 0.157 0.159
0.062 0.066 0.070
0.048 0.052 0.056
0.156 0.157 0.159
0.087 0.091 0.094
0.026 BSC
RECOMMENDED LAND PATTERN
0.65 Typ.
0.30
3.95
1.58
1.22
3.95
2.20
0.40
4.05
1.78
1.42
4.05
2.40
0.65 Typ.
0.35 TYP
0.30
D
D
10
6
D1
D2
E
E1
e
D1
D2
E
E1
e
0.38
2.30
3.55
L
0.50
—
0.28
0.60
0.12
0.48
L
0.020 0.022 0.024
1.15
L1
L2
L3
L4
aaa
bbb
ccc
ddd
eee
L1
L2
L3
L4
aaa
bbb
ccc
ddd
eee
—
0.001 0.005
0.02
0.011 0.015 0.019
0.033 REF.
0.012 REF
0.006
0.85 REF
0.30 REF
0.15
0.10
0.10
Pin #1 IDA
5
0.30
Unit: mm
1
Chamfer 0.20
1.78
1.42
0.004
0.004
0.003
0.002
0.08
0.05
Notes:
1. All dimensions are in millimeters.
2. The dimensions with * are just for reference.
3. The location of the terminal #1 identifier and terminal numbering convention conforms to JEDEC publication 95 SPP-002.
4. Dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. If the terminal has the
optional radius on the other end of the terminal, then dimension b should not be measured in that radius area.
5. Coplanarity applies to the terminals and all other bottom surface metallization.
6. Drawings shown are for illustration only.
Rev. 2.0 January 2015
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Page 13 of 16
AOZ1360
Tape and Reel Dimensions, DFN-10L, 4x4
Carrier Tape
P1
P2
D1
T
E1
E2
E
C
L
B0
K0
D0
A0
P0
Feeding Direction
UNIT: MM
Package
DFN 4x4
(12mm)
A0
4.35
0.10
B0
4.35
0.10
K0
1.10 1.50
0.10 Min. +0.1/-0.0
D0
D1
1.50
E
12.0
0.3
E1
1.75
0.10
E2
5.50
0.05
P0
8.00
0.10
P1
4.00
0.10
P2
2.00
0.05
T
0.30
0.05
Reel
W1
S
N
K
M
V
R
H
W
UNIT: MM
Tape Size
12 mm
M
N
W
W1
H
K
S
G
R
V
Reel Size
ø330
ø330.0 ø79.0
2.0
12.4
17.0
ø13.0
0.5
10.5
0.2
2.0
0.5
—
—
—
1.0 +2.0/-0.0 +2.6/-0.0
Leader/Trailer and Orientation
Trailer Tape
300mm min. or
75 empty pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min. or
125 empty pockets
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AOZ1360
Part Marking
SO-8
Z1360AI
FAYWLT
Underscore Indicates
Green Product
Part Number Code
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
DFN-10
Z1360DI
ZA8R1B
Underscore Indicates
Green Product
Part Number Code
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
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AOZ1360
LEGAL DISCLAIMER
Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or
completeness of the information provided herein and takes no liabilities for the consequences of use of such
information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes
to such information at any time without further notice. This document does not constitute the grant of any intellectual
property rights or representation of non-infringement of any third party’s intellectual property rights.
LIFE SUPPORT POLICY
ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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相关型号:
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