APE2008 [APLUS]

very low cost voice and melody synthesizer with 4-bits CPU; 成本非常低的声音和旋律合成了4位CPU
APE2008
型号: APE2008
厂家: APLUS INTERGRATED CIRCUITS    APLUS INTERGRATED CIRCUITS
描述:

very low cost voice and melody synthesizer with 4-bits CPU
成本非常低的声音和旋律合成了4位CPU

音频合成器集成电路 消费电路 商用集成电路
文件: 总7页 (文件大小:250K)
中文:  中文翻译
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A
PLUS MAKE YOUR PRODUCTION A-PLUS  
APExx08 Series  
DATA SHEET  
APLUS INTEGRATED CIRCUITS INC.  
Address:  
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,  
Sales E-mail:  
Taiwan 115, R.O.C.  
sales@aplusinc.com.tw  
(115)台北市南港區成功路㆒段 32 3 樓之 10.  
Technology E-mail:  
service@aplusinc.com.tw  
TEL: 886-2-2782-9266  
FAX: 886-2-2782-9255  
WEBSITE : http: //www.aplusinc.com.tw  
APExx08 Series  
1.0 General Description  
The APExx08 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various  
features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody  
synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one  
voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices.  
With CMOS technology and halt function can minimize power dissipation. Their architectures are similar  
to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single  
cycle, except for program branches and data table read instructions (which need two instruction cycles).  
2.0 Features  
(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz.  
(2) Program ROM: 16k x 10 bits  
(3) 1 set of 16-bits DPR can access up to 64k x 10 bits melody data memory space, and 1 set of 18-bits  
VPR can access up to 256k x 10 bits voice data memory space.  
Product  
APE0508  
APE1008  
APE1508  
APE2008  
APE3108  
APE4108  
APE5208  
APE6308  
Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bit)  
5
14-bits  
15-bits  
16-bits  
16-bits  
17-bits  
17-bits  
18-bits  
18-bits  
16k  
32k  
10  
15  
20  
31  
41  
52  
63  
48k  
64k  
96k  
128k  
160k  
192k  
(4) Data Registers:  
a). 128 x 4-bits data RAM (00-7Fh)  
(APE0508 /1008 is 96 x 4-bits data RAM 00-5Fh)  
b). Unbanked special function registers (SFR) range: 00h-2Fh  
(5) I/O Ports:  
a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Register control)  
b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option)  
(6) On-chip clock generator: Resistive Clock Drive (RM)  
(7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter).  
(8) Stack: 2-level subroutine nesting.  
(9) Built-in 4 Level Volume Control can be programmed.  
(10) Built-in 8 Level DAC current output can be configured. (Mask option)  
(11) Built-in IR Carry Output: Port B[1] can be configured as IR pin by 38k / 56kHz. (Mask option)  
1
Rev 1.3  
2003/8/18  
APExx08 Series  
(12) External Reset: Port B[3] can be configured as reset pin. (Mask opton)  
(13) HALT and Release from HALT function to reduce power consumption  
(14) Watch Dog Timer (WDT)  
(15) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles  
(16) Number of instruction: 27  
(17) DAC: 1 channel voice and dual tone melody synthesizer (One 9-bits Cout or 8-bits PWM output).  
FIGURE 1 : ROM Map of APExx08 Series  
PC[13:0]  
14-bit x 2 STACK  
16-bit Data Pointer  
18-bit Voice Pointer  
Reset Vector  
00000h  
000FEh  
000FFh-00400h  
00401h  
Reserved for Testing  
00000h-03FFFh  
Program ROM  
00000h-0FFFFh  
Data ROM for Melody  
00000h-2FFFFh  
Voice ROM for Voice  
2
Rev 1.3  
2003/8/18  
APExx08 Series  
3.0 Pin Description  
Pad Name  
PWM2/Cout  
PWM1  
Pin Attr.  
Description  
PWM2 output, or Current Output of Audio.  
PWM1 output.  
O
O
Vdd1~2  
Power  
Power supply during operation.  
I/O port can be programmed to input/output individually.  
Input type with weak pull-low or fix-input-floating capability.  
Buffer Output type.  
PRA0~3  
I/O  
I/O  
I/O port can be configured to input/output individually.  
Input type with weak pull-low or fix-input-floating capability.  
Buffer Output type.  
PRB0, PRB2  
I/O port can be configured to input/output individually.  
Input type with weak pull-low or fix-input-floating capability.  
Buffer Output type.  
PRB1 / IR  
I/O  
I/O  
Mask option selected as an IR Carrier Output with 38k / 56kHz  
I/O port can be configured to input/output individually.  
Input type with weak pull-low or fix-input-floating capability.  
Buffer Output type.  
PRB3 / Reset  
Mask option selected as an external RESET pin with weak pull-low  
capability.  
OSC  
I
RM mode Oscillator input  
Ground Potential  
GND1~2  
Power  
4.0 DC Characteristics  
Symbol  
Parameter  
Vdd  
Min.  
Typ.  
Max. Unit  
Condition  
Vdd  
Operating voltage  
2.4  
3
5.5  
1
1
V
depending on Freq.  
3
4.5  
3
4.5  
3
4.5  
3
4.5  
3
4MHz, RM,  
in HALT Mode  
Isb  
Iop  
Iih  
Standby  
Supply  
uA  
current  
2
7
4
10  
-4  
4MHz, RM,  
IO Floating  
Operating  
mA  
uA  
Input current  
(Internal pull low)  
Input ports with weak  
pull-low  
Ioh  
Iol  
Output-high current  
Output-low current  
-10  
8.5  
17.5  
0.8 ~ 4.8  
0.9 ~ 6.5  
4MHz, RM  
(IO ports)  
mA  
4.5  
3
4.5  
DAC output current  
(8-level option)  
4MHz, RM  
(Full scale)  
Cout  
mA  
%
Fosc(3v- 2.4v)  
Fosc (3v)  
dF/F  
dF/F  
Frequency stability  
Fosc lot variation  
-5  
5
Vdd=3V, Rosc=430k,  
4MHz  
-10  
10  
%
3
Rev 1.3  
2003/8/18  
APExx08 Series  
FIGURE 2 : Frequency vs. Rosc (at 3V)  
Resistor (Rosc ohms)  
Frequency (MHz)  
110k  
200k  
300k  
430k  
14.84  
8.25  
5.54  
3.92  
Rosc vs Freq.  
20  
15  
10  
5
14.84  
8.25  
5.54  
3.92  
0
0
100  
200  
300  
400  
500  
Rosc (k ohm )  
5.0 Application Circuit  
4
Rev 1.3  
2003/8/18  
APExx08 Series  
6.0 Bonding Diagram of APE0508 / APE1008  
ROM  
(0, 0)  
15  
PRB3  
Y
PRB2 14  
1
PWM2/Cout  
Pad Size : 80 um x 80 um  
* The IC substrate must be connected to GND.  
13  
OSC  
12  
GND2  
Vdd1  
2
PRA1  
6
PRB0  
9
PRA0  
5
PRA2  
7
PRA3  
8
PRB1  
10  
Vdd2  
11  
PWM1  
3
GND1  
4
X
Pad #  
Pad Name  
PWM2/Cout  
Vdd1  
X
Y
Pad #  
Pad Name  
PRB0  
PRB1  
Vdd2  
X
Y
1
2
3
4
5
6
7
8
9
-518  
-518  
-431  
-283  
-173  
-63  
-195  
-479  
-603  
-603  
-574  
-574  
-574  
-574  
267  
377  
487  
489  
489  
489  
489  
-574  
-574  
-574  
-414  
-304  
-194  
-84  
10  
11  
12  
13  
14  
15  
PWM1  
GND1  
GND2  
OSC  
PRA0  
PRA1  
PRB2  
PRB3  
PRA2  
47  
PRA3  
157  
Chip Size :  
APE0508 : 1234 um x 1404 um  
APE1008 : 1234 um x 1404 um  
5
Rev 1.3  
2003/8/18  
APExx08 Series  
6.1 Bonding Diagram of other APExx08 series  
ROM  
Pad Size: 80 um x 80 um  
* The IC substrate must be connected to GND.  
Y
PRB3  
PRB2  
15  
14  
1
PWM2/Cout  
OSC  
13  
12  
GND2  
Vdd1  
2
PRA0  
5
PRA1  
6
PRA2  
7
PRA3  
8
PRB1  
10  
PRB0  
9
Vdd2  
11  
PWM1  
3
GND1  
4
(0, 0)  
X
Pad #  
Pad Name  
PWM2/Cout  
Vdd1  
X
Y
Pad #  
Pad Name  
PRB0  
PRB1  
Vdd2  
X
Y
1
2
3
4
5
6
7
8
9
58  
58  
466  
182  
58  
843  
87  
10  
11  
12  
13  
14  
15  
953  
1063  
1059  
1059  
1059  
1059  
87  
PWM1  
GND1  
145  
293  
403  
513  
623  
733  
87  
58  
GND2  
OSC  
247  
357  
467  
577  
PRA0  
87  
PRA1  
87  
PRB2  
PRB3  
PRA2  
87  
PRA3  
87  
Chip Size :  
APE1508 : 1230 um x 1848 um,  
APE3108 : 1230 um x 1848 um,  
APE5208 : 1230 um x 2528 um,  
APE2008 : 1230 um x 1848 um  
APE4108 : 1230 um x 2528 um  
APE6308 : 1230 um x 2528 um  
6
Rev 1.3  
2003/8/18  

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