APE25524 [APLUS]

very low cost voice and melody synthesizer with 4-bits CPU; 成本非常低的声音和旋律合成了4位CPU


型号：	APE25524
厂家：	APLUS INTERGRATED CIRCUITS
描述：	very low cost voice and melody synthesizer with 4-bits CPU 成本非常低的声音和旋律合成了4位CPU
文件：	总7页 (文件大小：248K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PLUS MAKE YOUR PRODUCTION A-PLUS

APExx24 Series

DATA SHEET

A^PLUSINTEGRATED CIRCUITS INC.

Address:

3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,

Sales E-mail:

Taiwan 115, R.O.C.

sales@aplusinc.com.tw

(115)台北市南港區成功路㆒段 32 號 3 樓之 10.

Technology E-mail:

service@aplusinc.com.tw

TEL: 886-2-2782-9266

FAX: 886-2-2782-9255

WEBSITE : http: //www.aplusinc.com.tw

APExx24 Series

1.0 General Description

The APExx24 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various

features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody

synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one

voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices.

With CMOS technology and halt function can minimize power dissipation. Their architectures are similar

to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single

cycle, except for program branches and data table read instructions (which need two instruction cycles).

2.0 Features

(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz.

(2) Program ROM: 64k x 10 bits

(3) 1 set of 16-bits DPR can access up to 64k x 10 bits melody data memory space, and 1 set of 20-bits

VPR can access up to 1024k x 10 bits voice data memory space.

Product

APE12724

APE17024

APE25524

APE34024

Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bits)

127

170

255

340

19-bits

20-bits

384k

512k

768k

1024k

(4) Data Registers:

a). 128 x 4-bits data RAM (00-7Fh)

b). Unbanked special function registers (SFR) range: 00h-2Fh

(5) I/O Ports:

a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Register control)

b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option)

c). PRC: 4-bits I/O Port C (14h) can be programmed to input/output individually. (Register control)

d). PRD: 4-bits I/O Port D (15h) can be programmed to input/output individually. (Register control)

e). PRE: 4-bits I/O Port E (17h) can be programmed to input/output individually. (Register control)

f). PRF: 4-bits I/O Port F (18h) can be programmed to input/output individually. (Register control)

(6) On-chip clock generator: Resistive Clock Drive (RM) or Crystal oscillator (HM)

(7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter).

(8) Stack: 2-level subroutine nesting.

(9) Built-in 4 Level Volume Control can be programmed.

(10) Built-in 8 Level DAC Current Control can be configured. (Mask option)

(11) Built-in IR Carry Output: Port B[1] can be configured as IR pin by 38k / 56kHz. (Mask option)

Rev 1.1

2003/9/2

APExx24 Series

(12) External Reset: Port B[3] can be configured as reset pin. (Mask opton)

(13) HALT and Release from HALT function to reduce power consumption

(14) Watch Dog Timer (WDT)

(15) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles

(16) Number of instruction: 27

(17) DAC: 1 channel voice and dual tone melody synthesizer (One 9-bits Cout or 8-bits PWM output).

FIGURE 1 : ROM Map of APExx24 Series

PC[15:0]

16-bit x 2 STACK

16-bit Data Pointer

20-bit Voice Pointer

Reset Vector

00000h

000FEh

000FFh-00400h

00401h

Reserved for Testing

00000h-0FFFFh

Data ROM for Melody

00000h-0FFFFh

Program ROM

00000h-FFFFFh

Voice ROM for Voice

Rev 1.1

2003/9/2

APExx24 Series

3.0 Pin Description

Pad Name

PWM2/Cout

PWM1

Pin Attr.

Description

PWM2 output, or Current Output of Audio.

PWM1 output.

Vdd1~3

Power

Power supply during operation.

PRA0~3

PRC0~3

PRD0~3

PRE0~3

PRF0~3

I/O port can be programmed to input/output individually.

Input type with weak pull-low or fix-input-floating capability.

Buffer Output type.

I/O

I/O port can be configured to input/output individually or HM OSC pad.

Input type with weak pull-low or fix-input-floating capability.

Buffer Output type.

PRB0 / OSC2

I/O

I/O port can be configured to input/output individually.

Input type with weak pull-low or fix-input-floating capability.

Buffer Output type.

PRB1 / IR

Mask option selected as an IR Carrier Output with 38k / 56kHz

I/O port can be configured to input/output individually.

Input type with weak pull-low or fix-input-floating capability.

Buffer Output type.

PRB2

I/O

I/O port can be configured to input/output individually.

Input type with weak pull-low or fix-input-floating capability.

Buffer Output type.

PRB3 / Reset

Mask option selected as an external RESET pin with weak pull-low

capability.

OSC1

RM/HM mode Oscillator input

Ground Potential

GND1~4

Power

4.0 DC Characteristics

Symbol

Parameter

Vdd

Min.

Typ.

Max. Unit

Condition

Vdd

Operating voltage

2.4

5.5

depending on Freq.

4.5

4MHz, RM,

in HALT Mode

Isb

Iop

Iih

Standby

Supply

current

-3

4MHz, RM,

IO Floating

Operating

Input current

(Internal pull low)

Input ports with weak

pull-low

Ioh

Iol

Output-high current

Output-low current

-10

0.8 ~ 4.8

0.9 ~ 6.5

4MHz, RM

(IO ports)

4.5

DAC output current

(8-level option)

4MHz, RM

(Full scale)

Cout

Fosc(3v- 2.4v)

Fosc (3v)

dF/F

Frequency stability

Fosc lot variation

-5

Vdd=3V, Rosc=180k,

4MHz

-10

Rev 1.1

2003/9/2

APExx24 Series

FIGURE 2 : Frequency vs. Rosc (at 3V)

Resistor (Rosc ohms)

Frequency (MHz)

110k

200k

300k

430k

14.84

8.25

5.54

3.92

Rosc vs Freq.

14.84

8.25

5.54

3.92

100

200

300

400

500

Rosc (k ohm )

5.0 Application Circuit

Rev 1.1

2003/9/2

APExx24 Series

6.0 Bonding Diagram of APE12724 / APE17024

GND1

Vdd1

PRF2 PRF1

PRF0 PRE3 PRE2 PRE1 PRE0 PRD3 PRD2 PRD1 PRD0 PRC3

PRC2 PRC1

PRF3

ROM

Chip Size : 2330 um x 2860um

GND4

Pad Size : 80 um x 80 um

GND3

PWM1

* The IC substrate must be connected to GND.

GND2

Vdd2

OSC1 PRB0 PRB1

PRC0

PRB2 PRB3

PRA1 PRA2

PRA0

PRA3

PWM2/Cout

Vdd3

(0,0)

Pad #

Pad Name

GND4

Pad #

Pad Name

404

GND1

PRC1

PRC2

PRC3

PRD0

PRD1

PRD2

PRD3

PRE0

PRE1

PRE2

PRE3

PRF0

PRF1

PRF2

PRF3

Vdd1

2033

1920

1807

1694

1581

1468

1355

1242

1129

1016

903

2688

GND3

293

145

230

PWM1

Vdd3

183

467

PWM2/Cout

Vdd2

988

OSC1

1106

1224

1342

1460

1578

1696

1814

1932

2050

2168

2160

PRB0/OSC2

PRB1/IR

PRB2

PRB3/Reset

PRA0

790

PRA1

676

PRA2

563

PRA3

450

PRC0

337

GND2

223

Rev 1.1

2003/9/2

APExx24 Series

6.2 Bonding Diagram of APE25524 / APE34024

GND1

Vdd1

PRF2 PRF1

PRF0 PRE3 PRE2 PRE1 PRE0 PRD3 PRD2 PRD1 PRD0 PRC3

PRC2 PRC1

PRF3

ROM

Chip Size : 2330 um x 4680 um

GND4

Pad Size : 80 um x 80 um

GND3

PWM1

* The IC substrate must be connected to GND.

GND2

Vdd2

OSC1 PRB0 PRB1

PRC0

PRB2 PRB3

PRA1 PRA2

PRA0

PRA3

PWM2/Cout

Vdd3

(0,0)

Pad #

Pad Name

GND4

Pad #

Pad Name

404

GND1

PRC1

PRC2

PRC3

PRD0

PRD1

PRD2

PRD3

PRE0

PRE1

PRE2

PRE3

PRF0

PRF1

PRF2

PRF3

Vdd1

2033

1920

1807

1694

1581

1468

1355

1242

1129

1016

903

4508

GND3

293

145

230

PWM1

Vdd3

183

467

PWM2/Cout

Vdd2

988

OSC1

1106

1224

1342

1460

1578

1696

1814

1932

2050

2168

2160

PRB0/OSC2

PRB1/IR

PRB2

PRB3/Reset

PRA0

790

PRA1

676

PRA2

563

PRA3

450

PRC0

337

GND2

223

Rev 1.1

2003/9/2

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