MAX706EUA [ARTSCHIP]
Low-Cost, pervisory Circuit;
| 型号： | MAX706EUA |
| 厂家： | 
Artschip |
| 描述： | Low-Cost, pervisory Circuit |
| 文件： | 总10页 (文件大小：313K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
General Description
The MAX705-MAX708/MAX813L microprocessor (µP)
supervisory circuits reduce the complexity and number of
components required to monitor power-supply and battery
functions in µP systems. These devices significantly improve
system reliability and accuracy compared to separate ICs or
discrete components.
Applications
z Computers
z Controllers
z Intelligent Istruments
z Automotive Systems
z Critical µP Power Monitoring
The MAX705/MAX706/MAX813L provide four functions:
1)A reset output during power-up, power-down, and brownout
conditions.
2) An independent watchdog output that goes low if the
watchdog input has not been toggled within 1.6 seconds.
3)A 1.25V threshold detector for power-fail warning,
low-battery detection, or for monitoring a power supply other
than +5V.
Features
z µMAX Package: Smallest 8-Pin SO
z Guaranteed RESET Valid at Vcc=1V
z Precision Supply-Voltage Monitor
4.65V in MAX705/MAX707/MAX813L
4.40V in MAX706/MAX708
z 200ms Reset Pulse Width
4) An active-low manual-reset input.
z Debounced TTL/CMOS-Compatible Manual-Reset Input
The MAX707/MAX708 are the same as the MAX705/MAX706,
except an active-high reset is substituted for the watchdog
timer. The MAX813L is the same as the MAX705, except
RESET is provided instead of RESET.
z Independent Watchdog Timer
–
1.6sec Timeout
(MAX705/MAX706)
z Active-high Reset Output (MAX707/MAX708/MAX813L)
z Voltage Monitor for Power-Fail or Low-Battery Warning
Two supply-voltage monitor levels are available: The
MAX705/MAX707/MAX813L generate a reset pulse when the
supply
voltage
drops
below
4.65V,
while
the
MAX706/MAX708 generate a reset pulse below 4.40V. All four
parts are available in 8-pin DIP, SO and µMAX packages.
Typical Operating Circuit
Pin Configurations
TOP VIEW
()ARE FOR MAX813L ONLY.
Pin Configurations continued at end of data sheet.
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1
MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
Ordering Information
PART
TEMP. RANGE
0℃ to +70℃
0℃ to +70℃
0℃ to +70℃
0℃ to +70℃
PIN-PACKAGE
8 Plastic DIP
8 SO
MAX705CPA
MAX705CSA
MAX705CUA
MAX705C/D
8µMAX
Dice*
Ordering Information continued at end of data sheet.
*Dice are specified at TA=+25℃.
**Contact factory for availability and processing to MIL-STD-883.
ABSOLUTE MAXIMUM RATINGS
SO (derate 5.88mW/℃ above +70℃)……………….471mW
µMAX (derate 4.10mW/℃ above +70℃)………..…..330mW
CERDIP (derate 8.00mW/℃ above +70℃)………….640mW
Terminal Voltage (with respect to GND)
Vcc……………………………………..-0.3V to 6.0V
All Other Inputs (Note 1)………………-0.3V to (Vcc+0.3V)
Input Current
Operating Temperature Ranges
Vcc………………………………………20mA
GND……………………………………...20mA
Output Current (all outputs)…………………20mA
Continuous Power Dissipation
MAX70_C_, MAX813LC_..............................0℃ to +70℃
MAX70_E_, MAX813LE_…………..………..-40℃ to +85℃
MAX70_MJA………...………………………-55℃ to +125℃
Storage Temperature Range………………….-65℃ to +160℃
Lead Temperature (soldering, 10sec)………….………+300℃
Plastic DIP (derate 9.09 mW/℃ above +70℃)…727mW
Note 1: The input voltage limits on PFI and MR can be exceeded if the input current is less than 10mA.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational
sections of the specifications is not implied Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
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2
MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
ELECTRICAL CHARACTERISTICS
(Vcc=4.75V to 5.5V for MAX705/MAX707/MAX813L, Vcc=4.5V to 5.5V for MAX706/MAX708, TA=TMIN to TMAX unless otherwise
noted.)
PARAMETER
SYMBOL CONDITIONS
MIN
1.0
1.1
1.2
TYP MAX
5.5
UNITS
Operating Voltage Range
Vcc
MAX70_C
V
MAX813LC
5.5
MAX70_E/M,MAX813LE/M
MAX705C,MAX706C,MAX813LC
MAX705E/M,MAX706E/M,MAX813LE/M
MAX707C,MAX708C
5.5
Supply Current
ISUPPLY
150 350
150 500
µA
50
50
350
500
MAX707E/M,MAX708E/M
MAX705,MAX707,MAX813L
MAX706,MAX708
Reset Threshold (Note 2)
VRT
4.50
4.25
4.65 4.75
4.40 4.50
40
V
Reset
Threshold
Hysteresis
mV
(Note2)
Reset Pulse Width (Note 2)
RESET Output Voltage
tRS
140
200 280
ms
V
ISOURCE =800µA
Vcc-1.5
ISINK=3.2mA
0.4
0.3
0.3
MAX70_C, Vcc=1V, ISINK=50µA
MAX70_E/M, Vcc=1.2V, ISINK=100µA
MAX707, MAX708,ISOURCE=800µA
MAX707,MAX708,ISINK=1.2mA
MAX813LC, ISOURCE=4µA, Vcc=1.1V
MAX813LE/M, ISOURCE=4µA, Vcc=1.2V
RESET Output Voltage
Vcc-1.5
V
0.4
0.8
0.9
MAX813L
ISOURCE=800µA
SINK=3.2mA
Vcc-1.5
I
0.4
Watchdog Timeout Period
WDI Pulse Width
tWD
tWP
MAX705, MAX706,MAX813L
VIL=0.4V, VIH – (Vcc)(0.8)
MAX705, MAX706, MAX813L,
Vcc=5V
1.00
50
1.60 2.25
sec
ns
V
WDI Input Threshold
WDI Input Current
WDO Output Voltage
Low
0.8
High
3.5
MAX705, MAX706,MAX813L ,WDI=Vcc
MAX705, MAX706,MAX813L,WDI=0V
MAX705,MAX706,MAX813L,
50
150
µA
V
-150
-50
Vcc-1.5
I
SOURCE=800µA
MAX705,MAX706,MAX813L,
SINK=1.2mA
0.4
I
MR Pull-Up Current
MR Pulse Width
MR=0V
100
150
250 600
0.8
µA
ns
V
tMR
MR Input Threshold
Low
High
2.0
MR to Reset Out Delay (Note 2)
PFI Input Threshold
tMD
250
ns
V
Vcc=5V
1.20
1.25 1.30
PFI Input Current
-25.00
Vcc-1.5
0.01 25.00 nA
PFO Output Voltage
ISOURCE =800µA
ISINK=3.2mA
V
0.4
Note 2: Applies to both RESET in the MAX705-MAX708 and RESET in the MAX707/MAX708/MAX813L.
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3
MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
Typical Operating Characteristics
MAX705/MAX707
OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
MAX705/MAX707
RESPONSE TIME
POWER-FAIL COMPARATOR
DE-ASSERTION RESPONSE TIME
MAX707
POWER-FAIL COMPARATOR
ASSERTION RESPONSE TIME
MAX707
ASSERTION
RESET,
DE-ASSERTION
RESET,
MAX707/MAX708/MAX813L
RESET OUTPUT VOLTAGE
Vs. SUPPLY VOLTAGE
MAX813L
RESET RESPONSE TIME
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4
MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
Pin Description
PIN
NAME
MR
FUNCTION
MAX705/MAX706
MAX707/MAX708
MAX813L
DIP/SO µMAX
DIP/SO
µMAX
DIP/SO
µMAX
Manual-Reset Input triggers a reset pulse when
pulled below 0.8V. This active-low input has an
internal 250µA pull-up current. It can be driven from
a TTL or CMOS logic line as well as shorted to
ground with a switch.
1
3
1
3
1
3
2
3
4
5
2
3
4
5
2
3
4
5
Vcc
+5V Supply Input
GND
0V Ground Reference for all signals
Power-Fail Voltage Monitor Input. When PFI is less
than 1.25V, PFO goes low. Connect PFI to GND or
Vcc when not nsed.
4
5
6
7
4
5
6
7
4
5
6
7
PFI
Power-Fail Output goes low and sinks current when
PFI is less than 1.25V; otherwise PFO stays high.
Watchdog Input. If WDI remains high or low for
1.6sec, the internal watchdog timer runs out and
WDO goes low (Figure 1). Floating WDI or
connecting WDI to a high-impedance three-state
buffer disables the watchdog feature. The internal
watchdog timer clears whenever reset is asserted,
WDI is three stated, or WDI sees a rising or falling
edge.
PFO
6
-
8
-
-
-
6
-
8
-
WDI
6
7
-
N.C.
No Connect
Active-Low Reset Output pulses low for 200ms
when triggered, and stays low whenever Vcc is
below the reset threshold (4.65V in the MAX705
and 4.40 V in the MAX706). It remains low for
200ms after Vcc rises above the reset threshold or
MR goes from low to high (Figure 3). A watchdog
timeout will not trigger RESET unless WDO is
connected to MR.
7
1
1
-
-
RESET
Watchdog Output pulls low when the internal
watchdog timer finishes its 1.6sec count and does
not go high again until the watchdog is cleared.
WDO also goes low during low-line conditions.
Whenever Vcc is below the reset threshold, WDO
stays low; however, unlike RESET, WDO does not
have a minimum pulse width. As soon as Vcc rise
above the reset threshold, WDO goes high with no
delay.
8
2
-
-
8
7
2
1
WDO
Active-High Reset Output is the inverse of RESET.
Whenever RESET is high, RESET is low, and vice
versa (Figure 2). The MAX813L has a RESET
output only.
-
-
8
2
RESET
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5
MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
Figure 2. MAX707/MAX708 Block Diagram
Figure 1. MAX705/MAX706/MAX813L Block Diagram
Detailed Description
Reset Output
A microprocessor’s (µP’s) reset input starts the µP in a known
state, whenever the µP is in an unknown state. it should be
held in reset. The MAX705-MAX708/MAX813L assert reset
during power-up and prevent code execution errors during
power-down or brownout conditions.
On power-up, once Vcc reaches 1V, RESET is a guaranteed
logic low of 0.4V or less. AS Vcc rises, RESET stays low.
When Vcc rises above the reset threshold, an internal timer
releases RESET after about 200ms. RESET pulses low
whenever Vcc dips below the reset threshold, i.e. brownout
condition. If brownout occurs in the middle of a previously
initiated reset pulse, the pulse continues for at least another
140ms. On power-down, Once Vcc falls below the reset
threshold, RESET stays low and is guaranteed to be 0.4V or
less until Vcc drops below 1V.
count. As soon as reset is released and WDI is driven high or
low, the timer will start counting. Pulse as short as 50ns can
be detected.
Typically, WDO will be connected to the non-maskable
interrupt input (NMI) of a µP. When Vcc drops below the reset
threshold, WDO will go low whether or not the watchdog timer
has timed out yet. Normally this would trigger an NMI interrupt,
but RESET goes low simultaneously, and thus overrides the
NMI interrupt.
If WDI is left unconnected, WDO can be used as a low line
output. Since floating WDI disables the internal timer, WDO
goes low only when Vcc falls below the reset threshold, thus
functioning as a low-line output.
The MAX705/MAX706 have a watchdog timer and a RESET
output. The MAX707/MAX708 have both active high and
active-low reset outputs. The MAX813L has both an
active-high reset output and a watchdog timer.
The MAX707/MAX708/MAX813L active-high RESET output is
simply the complement of the RESET output, and is
guaranteed to be valid with Vcc down to 1.1V. Some µPs,
such as Intel’s 80C51, require an active-high reset pulse.
Manual Reset
The manual-reset input (MR) allows reset to be triggered by a
pushbutton switch. The switch is effectively debounced by the
140ms minimum reset pulse width. MR is TTL/CMOS logic
compatible, so it can be driven by an external logic line. MR
can be used to force a watchdog timeout to generate a reset
pulse in the MAX705/MAX706/MAX813L. Simply connect
WDO to MR.
Watchdog Timer
The MAX705/MAX706/MAX813L watchdog circuit monitors
the µP’s activity. If the µP does not toggle the watchdog input
(WDI) within 1.6sec and WDI is not three-stated, WDO goes
low. As long as RESET is asserted or the WDI input is
three-stated, the watchdog time will stay cleared and will not
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6
MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
Power-Fail Comparator
The power-fail comparator can be used for various purposes because its output and noninverting input are not internally
connected. The inverting input is internally connected to a 1.25V reference.
Figure 3. MAX705/MAX706/MAX813L Watchdog Timing.
Figure 4. MAX705/MAX706 RESET, MR, and WDO Timing
with WDI Three-Stated. The MAX707/MAX708/MAX813L
RESET output is the inverse of RESET shown.
To build an early-warning circuit for power failure, connect the PFI pin to a voltage divider (see Typical Operating Circuit). Choose
the voltage divider ratio so that the voltage at PFI falls below 1.25V just before the +5V regulator drops out. Use PFO to interrupt
the µP so it can prepare for an orderly power-down.
Applications Information
Ensuring a Valid RESET
sensitivity to high-frequency noise on the line being monitored.
RESET can be asserted on other voltages in addition to the
+5V Vcc line. Connect PFO to MR to initiate a RESET pulse
Output Down to Vcc=0V When Vcc falls below 1V, the
MAX705-MAX708 RESET output no longer sinks current – it
becomes an open circuit. High-impedance CMOS logic inputs
can drift to undetermined voltages if left undriven. If a
pull-down resistor is added to the RESET pin as shown in
Figure 5, any stray charge or leakage currents will be drained
to ground, holding RESET low. Resistor value (R1) is not
critical. It should be about 100KΩ, large enough not to load
RESET and small enough to pull RESET to ground.
when PFI drops below 1.25V. Figure
6 shows the
MAX705-MAX708S configured to assert RESET when the
+5V supply falls below the reset threshold, or when the +12V
supply falls below approximately 11V.
Monitoring a Negative Voltage
The power-fail comparator can also monitor a negative supply
rail (Figure 7). When the negative rail is good (a negative
voltage of large magnitude), PFO is low, and when the
negative rail is degraded (a negative voltage of lesser
magnitude), PFO is high. By adding the resistors and
transistor as shown, a high PFO triggers reset. As long as
PFO remains high, the MAX705-MAX708/MAX813L will keep
reset asserted (RESET=low, RESET =high). Note that this
circuit’s accuracy depends on the PFI threshold tolerance, the
Vcc line, and the resistors.
Monitoring Voltages Other Than the
Unregulated DC Input
Monitor voltages other than the unregulated DC by connecting
a voltage divider to PFI and adjusting the ratio appropriately. If
required, add hysteresis by connecting a resistor (with a value
approximately 10 times the sun of the two resistors in the
potential divider network) between PFI and PFO. A capacitor
between PFI and GND will reduce the power-fail circuit’s
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7
MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
Figure 6. Monitoring Both +5V and +12V
Figure 7. Monitoring a Negative Voltage
Figure 8. Interfacing to µPs with Bidirectional Reset I/O
Interfacing to µPs with
Bidirectional Reset Pins
µPs with bidirectional reset pins, such as the Motorola 68HC11
series, can contend with the MAX705-MAX708 RESET output.
If, for example, the RESET output is driven high and the µP
wants to pull it low, indeterminate logic levels may result. To
correct this, connect a 4.7kΩ resistor between the RESET
output and the µP reset I/O, as in Figure 8. Buffer the RESET
output to other system components.
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8
MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
Ordering Information (continued)
PART
TEMP. RANGE
-40℃ to +85℃
-40℃ to +85℃
-40℃ to +85℃
-55℃ to +125℃
0℃ to +70℃
PIN-PACKAGE
8 Plastic DIP
8 SO
MAX705EPA
MAX705ESA
MAX705EUA
MAX705MJA
MAX706CPA
MAX706CSA
MAX706CUA
MAX706C/D
MAX706EPA
MAX706ESA
MAX706EUA
MAX706MJA
MAX707CPA
MAX707CSA
MAX707CUA
MAX707C/D
MAX707EPA
MAX707ESA
MAX707EUA
MAX707MJA
MAX708CPA
MAX708CSA
MAX708CUA
MAX708C/D
MAX708EPA
MAX708ESA
MAX708EUA
MAX708MJA
MAX813LCPA
MAX813LCSA
MAX813LCUA
MAX813LC/D
MAX813LEPA
MAX813LESA
MAX813LMUA
MAX813LMJA
8 µMAX
8 CERDIP**
8 Plastic DIP
8 SO
0℃ to +70℃
0℃ to +70℃
8 µMAX
0℃ to +70℃
Dice *
-40℃ to +85℃
-40℃ to +85℃
-40℃ to +85℃
-55℃ to +125℃
0℃ to +70℃
8 Plastic DIP
8 SO
8 µMAX
8 CERDIP**
8 Plastic DIP
8 SO
0℃ to +70℃
0℃ to +70℃
8 µMAX
0℃ to +70℃
Dice *
-40℃ to +85℃
-40℃ to +85℃
-40℃ to +85℃
-55℃ to +125℃
0℃ to +70℃
8 Plastic DIP
8 SO
Chip Topography
8 µMAX
8 CERDIP**
8 Plastic DIP
8 SO
0℃ to +70℃
0℃ to +70℃
8 µMAX
0℃ to +70℃
Dice*
-40℃ to +85℃
-40℃ to +85℃
-40℃ to +85℃
-55℃ to +125℃
0℃ to +70℃
8 Plastic DIP
8 SO
8 µMAX
8 CERDIP**
8 Plastic DIP
8 SO
0℃ to +70℃
0℃ to +70℃
8 µMAX
0℃ to +70℃
Dice*
-40℃ to +85℃
-40℃ to +85℃
-40℃ to +85℃
-55℃ to +125℃
8 Plastic DIP
8 SO
()ARE FOR MAX813L ONLY.
8 µMAX
TRANSISTOR COUNT: 572
8 CERDIP**
SUBSTRATE MUST BE LEFT UNCONNECTED.
*Dice are specified at TA=+25℃.
**Contact factory for availability and processing to
MIL-STD-883.
Pin Configuration (continued)
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9
MAX705-MAX813L
Low-Cost, µP Supervisory Circuit
Package Information
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10
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