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AT24C64AW-10SU-2.7 [ATMEL]

Two-wire Serial EEPROM 32K (4096 x 8) 64K (8192 x 8); 两线串行EEPROM 32K （ 4096 ×8 ） 64K （ 8192 ×8 ）
AT24C64AW-10SU-2.7
型号： AT24C64AW-10SU-2.7
厂家： ATMEL    ATMEL
描述：

Two-wire Serial EEPROM 32K (4096 x 8) 64K (8192 x 8)
两线串行EEPROM 32K （ 4096 ×8 ） 64K （ 8192 ×8 ）

可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器
文件： 总22页 (文件大小：688K)
中文：  中文翻译
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Features  
• Low-Voltage and Standard-Voltage Operation  
– 2.7 (VCC = 2.7V to 5.5V)  
– 1.8 (VCC = 1.8V to 5.5V)  
• Low-Power Devices (ISB = 6 µA @ 5.5V) Available  
• Internally Organized 4096 x 8, 8192 x 8  
• Two-wire Serial Interface  
• Schmitt Trigger, Filtered Inputs for Noise Suppression  
• Bidirectional Data Transfer Protocol  
• 400 kHz (1.8V, 2.5V, 2.7V, 5V) Compatibility  
• Write Protect Pin for Hardware Data Protection  
• 32-byte Page Write Mode (Partial Page Writes Allowed)  
• Self-timed Write Cycle (5 ms Max)  
Two-wire  
Serial EEPROM  
32K (4096 x 8)  
64K (8192 x 8)  
• High Reliability  
– Endurance: 1 Million Write Cycles  
– Data Retention: 100 Years  
• Automotive Devices Available  
• 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead Mini-MAP (MLP 2x3)  
and 8-lead TSSOP Packages  
• Lead-free/Halogen-free  
• Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers  
AT24C32A(1)  
AT24C64A(2)  
Description  
The AT24C32A/64A provides 32,768/65,536 bits of serial electrically erasable and  
programmable read only memory (EEPROM) organized as 4096/8192 words of 8 bits  
each. The device’s cascadable feature allows up to 8 devices to share a common two-  
wire bus. The device is optimized for use in many industrial and commercial applica-  
tions where low power and low voltage operation are essential. The AT24C32A/64A is  
available in space saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ  
SOIC, 8-lead Mini-MAP (MLP 2x3) and 8-lead TSSOP packages and is accessed via  
a 2-wire serial interface. In addition, the entire family is available in 2.7V (2.7V to 5.5V)  
and 1.8V (1.8V to 5.5V) versions.  
Notes: 1. Not recommended for  
new design; please  
refer to AT24C32C.  
2. Not recommended for  
new design; please  
refer to AT24C64C.  
Table 1. Pin Configuration  
8-lead SOIC  
8-lead Mini-MAP (MLP 2x3)  
Pin Name  
A0 – A2  
SDA  
Function  
Address Inputs  
Serial Data  
A0  
A1  
1
2
3
4
8
7
6
5
VCC  
WP  
1
2
3
4
VCC  
WP  
8
7
6
5
A0  
A1  
A2  
SCL  
SDA  
SCL  
SDA  
A2  
GND  
SCL  
Serial Clock Input  
Write Protect  
GND  
WP  
Bottom View  
8-lead PDIP  
8-lead TSSOP  
A0  
A1  
1
2
3
4
8
7
6
5
VCC  
WP  
A0  
A1  
A2  
1
2
3
4
8
7
6
5
VCC  
WP  
A2  
SCL  
SDA  
SCL  
SDA  
GND  
GND  
3054T–SEEPR–1/07  
Absolute Maximum Ratings*  
*NOTICE:  
Stresses beyond those listed under “Absolute  
Maximum Ratings” may cause permanent dam-  
age to the device. This is a stress rating only and  
functional operation of the device at these or any  
other conditions beyond those indicated in the  
operational sections of this specification is not  
implied. Exposure to absolute maximum rating  
conditions for extended periods may affect  
device reliability.  
Operating Temperature..................................–55°C to +125°C  
Storage Temperature.....................................–65°C to +150°C  
Voltage on Any Pin  
with Respect to Ground....................................–1.0V to +7.0V  
Maximum Operating Voltage .......................................... 6.25V  
DC Output Current........................................................ 5.0 mA  
Figure 1. Block Diagram  
2
AT24C32A/64A  
3054T–SEEPR–1/07  
AT24C32A/64A  
Pin Description  
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each  
EEPROM device and negative edge clock data out of each device.  
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is  
open-drain driven and may be wire-ORed with any number of other open-drain or open  
collector devices.  
DEVICE/ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs  
that are hardwired or left not connected for hardware compatibility with other AT24Cxx  
devices. When the pins are hardwired, as many as eight 32K/64K devices may be  
addressed on a single bus system (device addressing is discussed in detail under the  
Device Addressing section). If the pins are left floating, the A2, A1 and A0 pins will be  
internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is  
<3 pF. If coupling is >3 pF, Atmel recommends connecting the address pins to GND.  
WRITE PROTECT (WP): The write protect input, when connected to GND, allows nor-  
mal write operations. When WP is connected high to VCC, all write operations to the  
memory are inhibited. If the pin is left floating, the WP pin will be internally pulled down  
to GND if the capacitive coupling to the circuit board VCC plane is <3 pF. If coupling is  
>3 pF, Atmel recommends connecting the pin to GND. Switching WP to VCC prior to a  
write operation creates a software write protect function.  
Memory Organization AT24C32A/64A, 32K/64K SERIAL EEPROM: The 32K/64K is internally organized as  
128/256 pages of 32 bytes each. Random word addressing requires a 12/13-bit data  
word address.  
3
3054T–SEEPR–1/07  
Table 2. Pin Capacitance(1)  
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +1.8V  
Symbol  
CI/O  
Test Condition  
Max  
8
Units  
pF  
Conditions  
VI/O = 0V  
VIN = 0V  
Input/Output Capacitance (SDA)  
Input Capacitance (A0, A1, A2, SCL)  
CIN  
6
pF  
Note:  
1. This parameter is characterized and is not 100% tested.  
Table 3. DC Characteristics  
Applicable over recommended operating range from: TAI = –40°C to +85°C, VCC = +1.8V to +5.5V, VCC = +1.8V to +5.5V  
(unless otherwise noted)  
Symbol  
VCC1  
VCC2  
VCC3  
VCC4  
ICC1  
Parameter  
Test Condition  
Min  
1.8  
2.5  
2.7  
4.5  
Typ  
Max  
5.5  
5.5  
5.5  
5.5  
1.0  
3.0  
Units  
V
Supply Voltage  
Supply Voltage  
Supply Voltage  
Supply Voltage  
Supply Current  
Supply Current  
Standby Current  
V
V
V
VCC = 5.0V  
VCC = 5.0V  
READ at 400 kHz  
WRITE at 400 kHz  
0.4  
2.0  
mA  
mA  
ICC2  
ISB1  
ISB2  
ISB3  
ISB4  
ILI  
VCC = 1.8V  
VCC = 2.5V  
VIN = VCC or VSS  
VIN = VCC or VSS  
VIN = VCC or VSS  
VIN = VCC or VSS  
1.0  
2.0  
2.0  
6.0  
3.0  
3.0  
µA  
µA  
µA  
µA  
µA  
µA  
(1.8V option)  
Standby Current  
(2.5V option)  
Standby Current  
VCC = 2.7V  
(2.7V option)  
Standby Current  
(5V option)  
VCC = 4.5 - 5.5V  
VIN = VCC or VSS  
Input Leakage  
Current  
0.10  
0.05  
Output Leakage  
Current  
ILO  
VOUT = VCC or VSS  
(1)  
VIL  
Input Low Level  
Input High Level  
Output Low Level  
Output Low Level  
–0.6  
VCC x 0.3  
VCC + 0.5  
0.4  
V
V
V
V
(1)  
VIH  
VCC x 0.7  
VOL2  
VOL1  
VCC = 3.0V  
VCC = 1.8V  
IOL = 2.1 mA  
IOL = 0.15 mA  
0.2  
Note:  
1. VIL min and VIH max are reference only and are not tested.  
4
AT24C32A/64A  
3054T–SEEPR–1/07  
AT24C32A/64A  
Table 4. AC Characteristics  
Applicable over recommended operating range from TAI = –40°C to +85°C, VCC = +1.8V to +5.5V, CL = 1 TTL Gate and  
100 pF (unless otherwise noted)  
1.8, 2.5, 2.7, 5.0-volt  
Symbol  
fSCL  
Parameter  
Min  
Max  
Units  
kHz  
µs  
Clock Frequency, SCL  
Clock Pulse Width Low  
Clock Pulse Width High  
Noise Suppression Time(1)  
400  
tLOW  
tHIGH  
tI  
1.2  
0.6  
µs  
50  
ns  
tAA  
Clock Low to Data Out Valid  
0.1  
1.2  
0.9  
µs  
Time the bus must be free  
before a new transmission  
can start(1)  
tBUF  
µs  
tHD.STA  
tSU.STA  
tHD.DAT  
tSU.DAT  
tR  
Start Hold Time  
0.6  
0.6  
0
µs  
Start Set-up Time  
Data In Hold Time  
Data In Set-up Time  
Inputs Rise Time(1)  
Inputs Fall Time(1)  
Stop Setup Time  
Data Out Hold Time  
Write Cycle Time  
µs  
µs  
100  
ns  
0.3  
µs  
tF  
300  
ns  
tSU.STO  
tDH  
0.6  
50  
µs  
ns  
tWR  
5
ms  
Endurance(1) 5.0V, 25°C, Page Mode  
Note: 1. This parameter is ensured by characterization only.  
1M  
Write Cycles  
5
3054T–SEEPR–1/07  
Device Operation  
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter-  
nal device. Data on the SDA pin may change only during SCL low time periods (refer to  
Data Validity timing diagram). Data changes during SCL high periods will indicate a start  
or stop condition as defined below.  
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition  
which must precede any other command (see Figure 5 on page 8).  
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition.  
After a read sequence, the stop command will place the EEPROM in a standby power  
mode (see Figure 5 on page 8).  
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from  
the EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to  
acknowledge that it has received each word.  
STANDBY MODE: The AT24C32A/64A features a low power standby mode which is  
enabled: a) upon power-up and b) after the receipt of the stop bit and the completion of  
any internal operations.  
MEMORY RESET: After an interruption in protocol, power loss or system reset, any  
two-wire part can be reset by following these steps:  
(a) Clock up to 9 cycles, (b) look for SDA high in each cycle while SCL is high and then  
(c) create a start condition as SDA is high.  
6
AT24C32A/64A  
3054T–SEEPR–1/07  
AT24C32A/64A  
Figure 2. Bus Timing  
SCL: Serial Clock, SDA: Serial Data I/O  
Figure 3. Write Cycle Timing  
SCL: Serial Clock, SDA: Serial Data I/O  
SCL  
SDA  
ACK  
8th BIT  
WORDn  
(1)  
wr  
t
START  
CONDITION  
STOP  
CONDITION  
Note:  
1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.  
Figure 4. Data Validity  
7
3054T–SEEPR–1/07  
Figure 5. Start and Stop Definition  
Figure 6. Output Acknowledge  
8
AT24C32A/64A  
3054T–SEEPR–1/07  
AT24C32A/64A  
Device Addressing  
The 32K/64K EEPROM requires an 8-bit device address word following a start condition  
to enable the chip for a read or write operation (see Figure 7 on page 11). The device  
address word consists of a mandatory one, zero sequence for the first four most signifi-  
cant bits as shown. This is common to all 2-wire EEPROM devices.  
The 32K/64K uses the three device address bits A2, A1, A0 to allow as many as eight  
devices on the same bus. These bits must compare to their corresponding hardwired  
input pins. The A2, A1, and A0 pins use an internal proprietary circuit that biases them  
to a logic low condition if the pins are allowed to float.  
The eighth bit of the device address is the read/write operation select bit. A read opera-  
tion is initiated if this bit is high and a write operation is initiated if this bit is low.  
Upon a compare of the device address, the EEPROM will output a zero. If a compare is  
not made, the device will return to standby state.  
NOISE PROTECTION: Special internal circuitry placed on the SDA and SCL pins pre-  
vent small noise spikes from activating the device.  
DATA SECURITY: The AT24C32A/64A has a hardware data protection scheme that  
allows the user to write protect the entire memory when the WP pin is at VCC  
.
Write Operations  
BYTE WRITE: A write operation requires two 8-bit data word addresses following the  
device address word and acknowledgment. Upon receipt of this address, the EEPROM  
will again respond with a zero and then clock in the first 8-bit data word. Following  
receipt of the 8-bit data word, the EEPROM will output a zero and the addressing  
device, such as a microcontroller, must terminate the write sequence with a stop condi-  
tion. At this time the EEPROM enters an internally-timed write cycle, tWR, to the  
nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will  
not respond until the write is complete (see Figure 8 on page 11).  
PAGE WRITE: The 32K/64K EEPROM is capable of 32-byte page writes.  
A page write is initiated the same way as a byte write, but the microcontroller does not  
send a stop condition after the first data word is clocked in. Instead, after the EEPROM  
acknowledges receipt of the first data word, the microcontroller can transmit up to 31  
more data words. The EEPROM will respond with a zero after each data word received.  
The microcontroller must terminate the page write sequence with a stop condition (see  
Figure 9 on page 11).  
The data word address lower five bits are internally incremented following the receipt of  
each data word. The higher data word address bits are not incremented, retaining the  
memory page row location. When the word address, internally generated, reaches the  
page boundary, the following byte is placed at the beginning of the same page. If more  
than 32 data words are transmitted to the EEPROM, the data word address will “roll  
over” and previous data will be overwritten.  
ACKNOWLEDGE POLLING: Once the internally-timed write cycle has started and the  
EEPROM inputs are disabled, acknowledge polling can be initiated. This involves send-  
ing a start condition followed by the device address word. The read/write bit is  
representative of the operation desired. Only if the internal write cycle has completed  
will the EEPROM respond with a zero, allowing the read or write sequence to continue.  
9
3054T–SEEPR–1/07  
Read Operations  
Read operations are initiated the same way as write operations with the exception that  
the read/write select bit in the device address word is set to one. There are three read  
operations: current address read, random address read and sequential read.  
CURRENT ADDRESS READ: The internal data word address counter maintains the  
last address accessed during the last read or write operation, incremented by one. This  
address stays valid between operations as long as the chip power is maintained. The  
address “roll over” during read is from the last byte of the last memory page, to the first  
byte of the first page. The address “roll over” during write is from the last byte of the cur-  
rent page to the first byte of the same page.  
Once the device address with the read/write select bit set to one is clocked in and  
acknowledged by the EEPROM, the current address data word is serially clocked out.  
The microcontroller does not respond with an input zero but does generate a following  
stop condition (see Figure 10 on page 11).  
RANDOM READ: A random read requires a “dummy” byte write sequence to load in the  
data word address. Once the device address word and data word address are clocked  
in and acknowledged by the EEPROM, the microcontroller must generate another start  
condition. The microcontroller now initiates a current address read by sending a device  
address with the read/write select bit high. The EEPROM acknowledges the device  
address and serially clocks out the data word. The microcontroller does not respond  
with a zero but does generate a following stop condition (see Figure 11 on page 12).  
SEQUENTIAL READ: Sequential reads are initiated by either a current address read or  
a random address read. After the microcontroller receives a data word, it responds with  
an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to  
increment the data word address and serially clock out sequential data words. When the  
memory address limit is reached, the data word address will “roll over” and the sequen-  
tial read will continue. The sequential read operation is terminated when the  
microcontroller does not respond with a zero but does generate a following stop condi-  
tion (see Figure 12 on page 12).  
10  
AT24C32A/64A  
3054T–SEEPR–1/07  
AT24C32A/64A  
Figure 7. Device Address  
Figure 8. Byte Write  
Figure 9. Page Write  
Notes: 1. * = DON’T CARE bits  
2. † = DON’T CARE bits for the 32K  
Figure 10. Current Address Read  
11  
3054T–SEEPR–1/07  
Figure 11. Random Read  
Note:  
1. * = DON’T CARE bits  
Figure 12. Sequential Read  
12  
AT24C32A/64A  
3054T–SEEPR–1/07  
AT24C32A/64A  
AT24C32A Ordering Information(1)  
Ordering Code  
Package  
Operation Range  
AT24C32A-10PU-2.7(2)  
8P3  
8P3  
8S1  
8S1  
8S2  
8S2  
8A2  
8A2  
8Y1  
8Y6  
AT24C32A-10PU-1.8(2)  
AT24C32AN-10SU-2.7(2)  
AT24C32AN-10SU-1.8(2)  
AT24C32AW-10SU-2.7(2)  
AT24C32AW-10SU-1.8(2)  
AT24C32A-10TU-2.7(2)  
AT24C32A-10TU-1.8(2)  
AT24C32AY1-10YU-1.8(2) (Not recommended for new design)  
AT24C32AY6-10YH-1.8(3)  
Lead-free/Halogen-free/  
Industrial Temperature  
(–40°C to 85°C)  
Industrial Temperature  
AT24C32A-W1.8-11(4)  
Die Sale  
(–40°C to 85°C)  
Notes: 1. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC Characteristics  
tables.  
2. “U” designates Green Package + RoHS compliant.  
3. “H” designates Green Package + RoHS compliant, with NiPdAu Lead Finish.  
4. Available in waffle pack and wafer form; order as SL788 for inkless wafer form. Bumped die available upon request. Please  
contact Serial EEPROM Marketing.  
Package Type  
8P3  
8S1  
8S2  
8A2  
8Y1  
8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP)  
8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)  
8-lead, 0.209" Body, Plastic Small Outline (EIAJ SOIC)  
8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP)  
8-lead, 4.90 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP)  
8-lead, 2.00 mm x 3.00 mm Body, 0.50 mm Pitch, Ultra Thin Mini-MAP, Dual No Lead Package (DFN), (MLP 2x3  
mm)  
8Y6  
Options  
Low Voltage (2.7V to 5.5V)  
–2.7  
–1.8  
Low Voltage (1.8V to 5.5V)  
13  
3054T–SEEPR–1/07  
AT24C64A Ordering Information(1)  
Ordering Code  
Package  
Operation Range  
AT24C64A-10PU-2.7(2)  
8P3  
8P3  
8S1  
8S1  
8S2  
8S2  
8A2  
8A2  
8Y1  
8Y6  
AT24C64A-10PU-1.8(2)  
AT24C64AN-10SU-2.7(2)  
AT24C64AN-10SU-1.8(2)  
AT24C64AW-10SU-2.7(2)  
AT24C64AW-10SU-1.8(2)  
AT24C64A-10TU-2.7(2)  
AT24C64A-10TU-1.8(2)  
AT24C64AY1-10YU-1.8(2) (Not recommended for new design)  
AT24C64AY6-10YH-1.8(3)  
Lead-free/Halogen-free/  
Industrial Temperature  
(–40°C to 85°C)  
Industrial Temperature  
AT24C64A-W1.8-11(4)  
Die Sale  
(–40°C to 85°C)  
Notes: 1. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC Characteristics  
tables.  
2. “U” designates Green Package + RoHS compliant.  
3. “H” designates Green Package + RoHS compliant, with NiPdAu Lead Finish.  
4. Available in waffle pack and wafer form; order as SL788 for inkless wafer form. Bumped die available upon request. Please  
contact Serial EEPROM Marketing.  
Package Type  
8P3  
8S1  
8S2  
8A2  
8Y1  
8Y6  
8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP)  
8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)  
8-lead, 0.209" Body, Plastic Small Outline (EIAJ SOIC)  
8-lead, 4.4mm Body, Plastic Thin Shrink Small Outline Package (TSSOP)  
8-lead, 4.90 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP)  
8-lead, 2.00 mm x 3.00 mm Body, 0.50 mm Pitch, Ultra Thin Mini-MAP, Dual No Lead Package (DFN)  
Options  
–2.7  
–1.8  
Low Voltage (2.7V to 5.5V)  
Low Voltage (1.8V to 5.5V)  
14  
AT24C32A/64A  
3054T–SEEPR–1/07  
AT24C32A/64A  
Package Drawings  
8P3 – PDIP  
E
1
E1  
N
Top View  
c
eA  
End View  
COMMON DIMENSIONS  
(Unit of Measure = inches)  
D
e
MIN  
–
MAX  
0.210  
0.195  
0.022  
0.070  
0.045  
0.014  
0.400  
–
NOM  
–
NOTE  
SYMBOL  
D1  
A2 A  
A
2
A2  
b
0.115  
0.014  
0.045  
0.030  
0.008  
0.355  
0.005  
0.300  
0.240  
0.130  
0.018  
0.060  
0.039  
0.010  
0.365  
–
5
6
6
b2  
b3  
c
D
3
3
4
3
b2  
L
D1  
E
b3  
4 PLCS  
0.310  
0.250  
0.100 BSC  
0.300 BSC  
0.130  
0.325  
0.280  
b
E1  
e
Side View  
eA  
L
4
2
0.115  
0.150  
Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA, for additional information.  
2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3.  
3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch.  
4. E and eA measured with the leads constrained to be perpendicular to datum.  
5. Pointed or rounded lead tips are preferred to ease insertion.  
6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm).  
01/09/02  
TITLE  
DRAWING NO.  
REV.  
2325 Orchard Parkway  
San Jose, CA 95131  
8P3, 8-lead, 0.300" Wide Body, Plastic Dual  
In-line Package (PDIP)  
8P3  
B
R
15  
3054T–SEEPR–1/07  
8S1 – JEDEC SOIC  
C
1
E
E1  
L
N
Top View  
End View  
e
B
COMMON DIMENSIONS  
(Unit of Measure = mm)  
A
MIN  
1.35  
0.10  
MAX  
1.75  
0.25  
NOM  
NOTE  
SYMBOL  
A1  
A
–
–
A1  
b
0.31  
0.17  
4.80  
3.81  
5.79  
–
0.51  
0.25  
5.00  
3.99  
6.20  
C
D
E1  
E
e
–
–
D
–
–
Side View  
1.27 BSC  
L
0.40  
0˚  
–
–
1.27  
8˚  
Note:  
These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc.  
10/7/03  
REV.  
TITLE  
DRAWING NO.  
1150 E. Cheyenne Mtn. Blvd.  
Colorado Springs, CO 80906  
8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing  
8S1  
B
R
Small Outline (JEDEC SOIC)  
16  
AT24C32A/64A  
3054T–SEEPR–1/07  
AT24C32A/64A  
8S2 – EIAJ SOIC  
C
1
E
E1  
L
N
Top View  
End View  
e
b
COMMON DIMENSIONS  
(Unit of Measure = mm)  
A
MIN  
1.70  
0.05  
0.35  
0.15  
5.13  
5.18  
7.70  
0.51  
0°  
MAX  
2.16  
0.25  
0.48  
0.35  
5.35  
5.40  
8.26  
0.85  
8°  
NOM  
NOTE  
SYMBOL  
A1  
A
A1  
b
5
5
C
D
E1  
E
D
2, 3  
Side View  
L
e
1.27 BSC  
4
Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information.  
2. Mismatch of the upper and lower dies and resin burrs are not included.  
3. It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded.  
4. Determines the true geometric position.  
5. Values b and C apply to pb/Sn solder plated terminal. The standard thickness of the solder layer shall be 0.010 +0.010/−0.005 mm.  
10/7/03  
TITLE  
REV.  
DRAWING NO.  
2325 Orchard Parkway  
San Jose, CA 95131  
8S2, 8-lead, 0.209" Body, Plastic Small  
Outline Package (EIAJ)  
8S2  
C
R
17  
3054T–SEEPR–1/07  
8A2 – TSSOP  
3
2 1  
Pin 1 indicator  
this corner  
E1  
E
L1  
N
L
Top View  
End View  
COMMON DIMENSIONS  
(Unit of Measure = mm)  
MIN  
MAX  
NOM  
3.00  
NOTE  
SYMBOL  
D
2.90  
3.10  
2, 5  
A
b
E
6.40 BSC  
4.40  
E1  
A
4.30  
–
4.50  
1.20  
1.05  
0.30  
3, 5  
–
A2  
b
0.80  
0.19  
1.00  
e
A2  
–
4
D
e
0.65 BSC  
0.60  
L
0.45  
0.75  
Side View  
L1  
1.00 REF  
Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances,  
datums, etc.  
2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed  
0.15 mm (0.006 in) per side.  
3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm  
(0.010 in) per side.  
4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the  
b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between  
protrusion and adjacent lead is 0.07 mm.  
5. Dimension D and E1 to be determined at Datum Plane H.  
5/30/02  
DRAWING NO.  
TITLE  
REV.  
2325 Orchard Parkway  
San Jose, CA 95131  
8A2, 8-lead, 4.4 mm Body, Plastic  
Thin Shrink Small Outline Package (TSSOP)  
B
8A2  
R
18  
AT24C32A/64A  
3054T–SEEPR–1/07  
AT24C32A/64A  
8Y1 – MAP  
PIN 1 INDEX AREA  
A
1
3
4
2
PIN 1 INDEX AREA  
E1  
D1  
D
L
8
6
5
7
b
e
A1  
E
Bottom View  
End View  
Top View  
COMMON DIMENSIONS  
(Unit of Measure = mm)  
A
SYMBOL  
MIN  
–
MAX  
0.90  
0.05  
5.10  
3.20  
1.15  
1.15  
0.35  
NOM  
–
NOTE  
A
A1  
D
0.00  
4.70  
2.80  
0.85  
0.85  
0.25  
–
4.90  
3.00  
1.00  
1.00  
0.30  
0.65 TYP  
0.60  
Side View  
E
D1  
E1  
b
e
L
0.50  
0.70  
2/28/03  
TITLE  
DRAWING NO.  
REV.  
2325 Orchard Parkway  
San Jose, CA 95131  
8Y1, 8-lead (4.90 x 3.00 mm Body) MSOP Array Package  
(MAP) Y1  
8Y1  
C
R
19  
3054T–SEEPR–1/07  
8Y6 - MAP  
A
D2  
b
((88XX))  
Pin 11  
Inddeexx  
Areaa  
Pin 1 ID  
L (88X)  
D
e (6X)  
A2  
A1  
1.500 RREEFF.  
A3  
COMMON DIMENSIONS  
(Unit of Measure = mm)  
MIN  
MAX  
NOM  
2.00 BSC  
3.00 BSC  
1.50  
NOTE  
SYMBOL  
D
E
D2  
E2  
A
1.40  
1.60  
1.40  
0.60  
0.05  
0.55  
-
-
-
-
A1  
A2  
A3  
L
0.0  
-
0.02  
-
0.20 REF  
0.30  
0.20  
0.20  
0.40  
e
0.50 BSC  
0.25  
b
0.30  
2
Notes:  
1. This drawing is for general information only. Refer to JEDEC Drawing MO-229, for proper dimensions,  
tolerances, datums, etc.  
2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. If the  
terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area.  
8/26/05  
DRAWING NO. REV.  
TITLE  
2325 Orchard Parkway  
San Jose, CA 95131  
8Y6, 8-lead 2.0 x 3.0 mm Body, 0.50 mm Pitch, Utlra Thin Mini-Map,  
Dual No Lead Package (DFN), (MLP 2x3)  
8Y6  
C
R
20  
AT24C32A/64A  
3054T–SEEPR–1/07  
AT24C32A/64A  
Revision History  
Doc. Rev.  
Date  
Comments  
3054T  
1/2007  
Implemented revision history.  
Added Notes to Page 1 recommending new devices.  
21  
3054T–SEEPR–1/07  
Atmel Corporation  
Atmel Operations  
2325 Orchard Parkway  
San Jose, CA 95131, USA  
Tel: 1(408) 441-0311  
Fax: 1(408) 487-2600  
Memory  
RF/Automotive  
Theresienstrasse 2  
Postfach 3535  
74025 Heilbronn, Germany  
Tel: (49) 71-31-67-0  
Fax: (49) 71-31-67-2340  
2325 Orchard Parkway  
San Jose, CA 95131, USA  
Tel: 1(408) 441-0311  
Fax: 1(408) 436-4314  
Regional Headquarters  
Microcontrollers  
2325 Orchard Parkway  
San Jose, CA 95131, USA  
Tel: 1(408) 441-0311  
Fax: 1(408) 436-4314  
1150 East Cheyenne Mtn. Blvd.  
Colorado Springs, CO 80906, USA  
Tel: 1(719) 576-3300  
Europe  
Atmel Sarl  
Route des Arsenaux 41  
Case Postale 80  
CH-1705 Fribourg  
Switzerland  
Tel: (41) 26-426-5555  
Fax: (41) 26-426-5500  
Fax: 1(719) 540-1759  
Biometrics/Imaging/Hi-Rel MPU/  
High Speed Converters/RF Datacom  
Avenue de Rochepleine  
BP 123  
38521 Saint-Egreve Cedex, France  
Tel: (33) 4-76-58-30-00  
La Chantrerie  
BP 70602  
44306 Nantes Cedex 3, France  
Tel: (33) 2-40-18-18-18  
Fax: (33) 2-40-18-19-60  
Asia  
Room 1219  
Chinachem Golden Plaza  
77 Mody Road Tsimshatsui  
East Kowloon  
Hong Kong  
Tel: (852) 2721-9778  
Fax: (852) 2722-1369  
ASIC/ASSP/Smart Cards  
Zone Industrielle  
13106 Rousset Cedex, France  
Tel: (33) 4-42-53-60-00  
Fax: (33) 4-42-53-60-01  
Fax: (33) 4-76-58-34-80  
1150 East Cheyenne Mtn. Blvd.  
Colorado Springs, CO 80906, USA  
Tel: 1(719) 576-3300  
Japan  
9F, Tonetsu Shinkawa Bldg.  
1-24-8 Shinkawa  
Chuo-ku, Tokyo 104-0033  
Japan  
Tel: (81) 3-3523-3551  
Fax: (81) 3-3523-7581  
Fax: 1(719) 540-1759  
Scottish Enterprise Technology Park  
Maxwell Building  
East Kilbride G75 0QR, Scotland  
Tel: (44) 1355-803-000  
Fax: (44) 1355-242-743  
Literature Requests  
www.atmel.com/literature  
Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any  
intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI-  
TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY  
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as components in applications intended to support or sustain life.  
© 2007 Atmel Corporation. All rights reserved. Atmel®, logo and combinations thereof, Everywhere You Are® and others, are registered trade-  
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Printed on recycled paper.  
3054T–SEEPR–1/07  

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