AT27C020-15JC [ATMEL]
2-Megabit 256K x 8 OTP EPROM; 2兆位256K ×8 OTP EPROM
| 型号： | AT27C020-15JC |
| 厂家： | 
ATMEL |
| 描述： | 2-Megabit 256K x 8 OTP EPROM |
| 文件： | 总9页 (文件大小：174K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Fast Read Access Time - 55 ns
• Low Power CMOS Operation
– 100 µA max. Standby
– 25 mA max. Active at 5 MHz
• JEDEC Standard Packages
– 32-Lead 600-mil PDIP
– 32-Lead PLCC
– 32-Lead TSOP
• 5V ± 10% Supply
• High-Reliability CMOS Technology
– 2,000V ESD Protection
2-Megabit
(256K x 8)
OTP EPROM
– 200 mA Latchup Immunity
• Rapid™ Programming Algorithm - 100 µs/byte (typical)
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges
Description
AT27C020
The AT27C020 is a low-power, high performance 2,097,152-bit one-time programma-
ble read only memory (OTP EPROM) organized as 256K by 8 bits. It requires only
one 5V power supply in normal read mode operation. Any byte can be accessed in
less than 55 ns, eliminating the need for speed reducing WAIT states on high perfor-
mance microprocessor systems.
In read mode, the AT27C020 typically consumes 8 mA. Standby mode supply current
is typically less than 10 µA.
PLCC Top View
Pin Configurations
Pin Name Function
A7
A6
A5
A4
A3
5
6
7
8
9
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 07
A0 - A17
O0 - O7
CE
Addresses
Outputs
A2 10
A1 11
A0 12
O0 13
Chip Enable
Output Enable
Program Strobe
OE
PGM
TSOP Top View
Type 1
PDIP Top View
VPP
A16
A15
A12
A7
1
2
3
4
5
6
7
8
9
32 VCC
31 PGM
30 A17
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 07
A11
A9
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
07
2
A8
3
A13
A14
A17
PGM
VCC
VPP
A16
A15
A12
A7
4
5
06
A6
6
05
A5
7
04
A4
8
03
A3
9
GND
02
A2 10
A1 11
A0 12
O0 13
O1 14
O2 15
GND 16
10
11
12
13
14
15
16
01
O0
A0
A1
A2
A3
20 06
A6
19 05
Rev. 0570C-B–12/97
A5
18 04
A4
17 03
The AT27C020 is available in a choice of industry standard
JEDEC-approved one-time programmable (OTP) plastic
PDIP, PLCC, and TSOP packages. All devices feature two-
line control (CE, OE) to give designers the flexibility to pre-
vent bus contention.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the VCC and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the VCC and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
With 256K byte storage capability, the AT27C020 allows
firmware to be stored reliably and to be accessed by the
system without the delays of mass storage media.
Atmel’s 27C020 have additional features to ensure high
quality and efficient production use. The Rapid™ Program-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 100 µs/byte. The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages.
Block Diagram
AT27C020
2
AT27C020
Absolute Maximum Ratings*
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions beyond those
indicated in the operational sections of this
specification is not implied. Exposure to abso-
lute maximum rating conditions for extended
periods may affect device reliability.
Temperature Under Bias.......................-55°C to +125°C
Storage Temperature............................-65°C to +150°C
Voltage on Any Pin with
Respect to Ground ...............................-2.0V to +7.0V(1)
Voltage on A9 with
Respect to Ground ............................ -2.0V to +14.0V(1)
Note:
1. Minimum voltage is -0.6V DC which may
undershoot to -2.0V for pulses of less than 20
VPP Supply Voltage with
ns. Maximum output pin voltage is VCC
0.75V DC which may overshoot to +7.0V for
pulses of less than 20 ns.
+
Respect to Ground ............................. -2.0V to +14.0V(1)
Operating Modes
Mode/Pin
CE
VIL
X
OE
PGM
X(1)
X
Ai
VPP
X
Outputs
DOUT
Read
VIL
VIH
X
Ai
Output Disable
Standby
X
X
High Z
High Z
DIN
VIH
VIL
VIL
VIH
X
X
X
Rapid Program(2)
PGM Verify
PGM Inhibit
VIH
VIL
X
VIL
VIH
X
Ai
Ai
VPP
VPP
VPP
DOUT
X
High Z
(3)
A9 = VH
Product Identification(4)
VIL
VIL
X
A0 = VIH or VIL
A1 - A17 = VIL
X
Identification Code
Notes: 1. X can be VIL or VIH.
2. Refer to Programming Characteristics.
3. VH = 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
3
DC and AC Operating Conditions for Read Operation
AT27C020
-90
-55
-70
-12
-15
Com.
Ind.
0°C - 70°C
-40°C - 85C
5V ± 10%
0°C - 70°C
-40°C - 85C
5V ± 10%
0°C - 70°C
-40°C - 85C
5V ± 10%
0°C - 70°C
-40°C - 85C
5V ± 10%
0°C - 70°C
-40°C - 85C
5V ± 10%
Operating Temperature
(Case)
VCC Power Supply
DC and Operating Characteristics for Read Operation
Symbol
ILI
Parameter
Condition
Min
Max
Units
µA
µA
µA
µA
mA
mA
V
Input Load Current
Output Leakage Current
VPP(1) Read/Standby Current
VIN = 0V to VCC (Com., Ind.)
VOUT = 0V to VCC (Com., Ind.)
VPP = VCC
±1.0
±5.0
±10
ILO
(2)
IPP
I
I
SB1 (CMOS), CE = VCC ± 0.3V
100
ISB
VCC(1) Standby Current
SB2 (TTL), CE = 2.0 to VCC + 0.5V
1.0
ICC
VCC Active Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
f = 5 MHz, IOUT = 0 mA, CE = VIL
25
VIL
-0.6
2.0
0.8
VIH
VOL
VOH
VCC + 0.5
0.4
V
IOL = 2.1 mA
V
IOH = -400 µA
2.4
V
Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP
.
2. VPP may be connected directly to VCC except during programming. The supply current would then be the sum of ICC and IPP
.
AC Characteristics for Read Operation
AT27C020
-90
-55
-70
-12
-15
Symbol
Parameter
Condition Min Max Min Max Min Max Min Max Min Max Units
CE=OE
(3)
tACC
Address to Output Delay
55
70
90
120
150
ns
= VIL
OE = VIL
CE = VIL
(2)
tCE
CE to Output Delay
OE to Output Delay
55
20
70
30
90
35
120
35
150
40
ns
ns
(2)(3)
tOE
OE or CE High
(4)(5)
tDF
toOutputFloat,
18
20
20
30
40
ns
ns
whichever occurred first
Output Hold
from Address, CE
or OE,whichever
occurred first
tOH
7
7
0
0
0
Note:
1. 2, 3, 4, 5. See AC Waveforms for Read Operation diagram.
AT27C020
4
AT27C020
AC Waveforms for Read Operation(1)
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC
.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
Input Test Waveforms and Measurement Levels
Output Test Load (1)
For -55 devices only:
3.0V
AC
AC
1.5V
DRIVING
LEVELS
MEASUREMENT
LEVEL
0.0V
tR, tF < 5 ns (10% to 90%)
Note:
1. CL = 100 pF including jig
capacitance except -55
For -70,-90,-12,-15 devices only:
devices where CL = 30 pF.
tR, tF < 20 ns (10% to 90%)
Pin Capacitance
f = 1 MHz, T = 25°C(1)
Typ
4
Max
8
Units
Conditions
VIN = 0V
CIN
pF
pF
COUT
8
12
VOUT = 0V
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
5
Programming Waveforms (1)
Notes: 1. The Input Timing reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
3. When programming the AT27C020, a 0.1 µF capacitor is required across VPP and ground to suppress voltage transients.
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
Symbol
ILI
Parameter
Test Conditions
Min
Max
±10
Units
µA
V
Input Load Current
VIN = VIL, VIH
VIL
Input Low Level
-0.6
2.0
0.8
VIH
Input High Level
VCC + 1.0
0.4
V
VOL
VOH
ICC2
IPP2
VID
Output Low Voltage
IOL = 2.1 mA
V
Output High Voltage
VCC Supply Current (Program and Verify)
VPP Supply Current
IOH = -400 µA
2.4
V
40
20
mA
mA
V
CE = PGM = VIL
A9 Product Identification Voltage
11.5
12.5
AT27C020
6
AT27C020
AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V,VPP = 13.0 ± 0.25V
Limits
Max
Symbol Parameter
Test Condition (1)
Min
2
Units
µs
tAS
Address Setup Time
tCES
tOES
tDS
CE Setup Time
2
µs
OE Setup Time
2
µs
Input Rise and Fall Times:
(10% to 90%) 20 ns.
Data Setup Time
2
µs
tAH
Address Hold Time
0
µs
Input Pulse Levels:
0.45V to 2.4V
tDH
Data Hold Time
2
µs
tDFP
tVPS
tVCS
tPW
tOE
OE High to Output Float Delay(2)
VPP Setup Time
0
130
ns
Input Timing Reference Level:
0.8V to 2.0V
2
µs
VCC Set up Time
2
µs
Output Timing Reference Level:
0.8V to 2.0V
PGM Program Pulse Width(3)
95
105
150
µs
Data Valid from OE
ns
VPP Pulse Rise Time During
Programming
tPRT
50
ns
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
— see timing diagram.
3. Program Pulse width tolerance is 100 µs ± 5%.
Atmel’s 27C020 Integrated Product Identification Code
Pins
Codes
A0
0
O7
0
O6
0
O5
0
O4
1
O3
1
O2
1
O1
1
O0
0
Hex Data
Manufacturer
Device Type
1E
86
1
1
0
0
0
0
1
1
0
7
RapidProgramming Algorithm
A 100 µs PGM pulse width is used to program. The
address is set to the first location. VCC is raised to 6.5V and
VPP is raised to 13.0V. Each address is first programmed
with one 100 µs PGM pulse without verification. Then a
verification / reprogramming loop is executed for each
address. In the event a byte fails to pass verification, up to
10 successive 100 µs pulses are applied with a verification
after each pulse. If the byte fails to verify after 10 pulses
have been applied, the part is considered failed. After the
byte verifies properly, the next address is selected until all
have been checked. VPP is then lowered to 5.0V and VCC to
5.0V. All bytes are read again and compared with the origi-
nal data to determine if the device passes or fails.
AT27C020
8
AT27C020
Ordering Information
ICC (mA)
tACC
(ns)
Ordering Code
AT27C020-55JC
AT27C020-55PC
AT27C020-55TC
Package
32J
32P6
32T
Operation Range
Active
Standby
55
25
25
25
25
25
25
25
25
25
25
0.1
Commercial
(0°C to 70°C)
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
AT27C020-55JI
AT27C020-55PI
AT27C020-55TI
32J
32P6
32T
Industrial
(-40°C to 85°C)
70
AT27C020-70JC
AT27C020-70PC
AT27C020-70TC
32J
32P6
32T
Commercial
(0°C to 70°C)
AT27C020-70JI
AT27C020-70PI
AT27C020-70TI
32J
32P6
32T
Industrial
(-40°C to 85°C)
90
AT27C020-90JC
AT27C020-90PC
AT27C020-90TC
32J
32P6
32T
Commercial
(0°C to 70°C)
AT27C020-90JI
AT27C020-90PI
AT27C020-90TI
32J
32P6
32T
Industrial
(-40°C to 85°C)
120
150
AT27C020-12JC
AT27C020-12PC
AT27C020-12TC
32J
32P6
32T
Commercial
(0°C to 70°C)
AT27C020-12JI
AT27C020-12PI
AT27C020-12TI
32J
32P6
32T
Industrial
(-40°C to 85°C)
AT27C020-15JC
AT27C020-15PC
AT27C020-15TC
32J
32P6
32T
Commercial
(0°C to 70°C)
AT27C020-15JI
AT27C020-15PI
AT27C020-15TI
32J
32P6
32T
Industrial
(-40°C to 85°C)
Package Type
32-Lead,Plastic J-Leaded Chip Carrier (PLCC)
32J
32P6
32T
32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
32-Lead, Plastic Thin Small Outline Package (TSOP)
9
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