AT27C040 [ATMEL]

4-Megabit 512K x 8 OTP EPROM; 4兆位512K ×8 OTP EPROM
AT27C040
型号: AT27C040
厂家: ATMEL    ATMEL
描述:

4-Megabit 512K x 8 OTP EPROM
4兆位512K ×8 OTP EPROM

可编程只读存储器 电动程控只读存储器
文件: 总13页 (文件大小:190K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Features  
Fast Read Access Time – 70 ns  
Low Power CMOS Operation  
– 100 µA Max Standby  
– 30 mA Max Active at 5 MHz  
JEDEC Standard Packages  
– 32-lead, 600-mil PDIP  
– 32-lead PLCC  
– 32-lead TSOP  
5V ±10% Supply  
High Reliability CMOS Technology  
4-Megabit  
(512K x 8)  
OTP EPROM  
– 2000V ESD Protection  
– 200 mA Latchup Immunity  
Rapid™ Programming Algorithm – 100 µs/Byte (Typical)  
CMOS and TTL Compatible Inputs and Outputs  
Integrated Product Identification Code  
Commercial and Industrial Temperature Ranges  
AT27C040  
Description  
The AT27C040 chip is a low-power, high-performance, 4,194,304-bit one-time pro-  
grammable read-only memory (OTP EPROM) organized as 512K by 8 bits. The  
AT27C040 requires only one 5V power supply in normal read mode operation. Any  
byte can be accessed in less than 70 ns, eliminating the need for speed reducing  
WAIT states on high-performance microprocessor systems.  
TSOP Top View  
Pin Configurations  
A11  
A9  
1
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
OE  
A10  
CE  
07  
Pin Name  
A0 - A18  
O0 - O7  
CE  
Function  
2
A8  
3
Addresses  
Outputs  
A13  
A14  
A17  
A18  
VCC  
VPP  
A16  
A15  
A12  
A7  
4
5
06  
6
05  
7
04  
Chip Enable  
Output Enable  
8
03  
9
GND  
02  
OE  
10  
11  
12  
13  
14  
15  
16  
01  
O0  
A0  
A1  
A2  
A3  
A6  
PDIP Top View  
A5  
A4  
VPP  
1
2
3
4
5
6
7
8
9
32 VCC  
A16  
A15  
A12  
A7  
31 A18  
30 A17  
29 A14  
28 A13  
27 A8  
26 A9  
25 A11  
24 OE  
23 A10  
22 CE  
21 07  
20 06  
19 05  
18 04  
17 03  
PLCC Top View  
A6  
A5  
A4  
A3  
A7  
A6  
A5  
A4  
A3  
5
6
7
8
9
29 A14  
28 A13  
27 A8  
26 A9  
25 A11  
24 OE  
23 A10  
22 CE  
21 07  
A2 10  
A1 11  
A0 12  
O0 13  
O1 14  
O2 15  
GND 16  
A2 10  
A1 11  
A0 12  
O0 13  
0189F–EPROM–4/03  
Atmel’s scaled CMOS technology provides low active power consumption, and fast program-  
ming. Power consumption is typically 8 mA in active mode and less than 10 µA in standby  
mode.  
The AT27C040 is available in a choice of industry standard JEDEC-approved one-time pro-  
grammable (OTP) plastic PDIP, PLCC and TSOP packages. The device features two-line  
control (CE, OE) to eliminate bus contention in high-speed systems.  
Atmel’s AT27C040 has additional features to ensure high quality and efficient production use.  
The Rapid Programming Algorithm reduces the time required to program the part and guaran-  
tees reliable programming. Programming time is typically only 100 µs/byte. The Integrated  
Product Identification Code electronically identifies the device and manufacturer. This feature  
is used by industry standard programming equipment to select the proper programming algo-  
rithms and voltages.  
Switching  
Considerations  
Switching between active and standby conditions via the Chip Enable pin may produce tran-  
sient voltage excursions. Unless accommodated by the system design, these transients may  
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high  
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This  
capacitor should be connected between the VCC and Ground terminals of the device, as close  
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit  
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again  
connected between the VCC and Ground terminals. This capacitor should be positioned as  
close as possible to the point where the power supply is connected to the array.  
Block Diagram  
2
AT27C040  
0189F–EPROM–4/03  
AT27C040  
Operating Modes  
Mode/Pin  
CE  
VIL  
X
OE  
VIL  
VIH  
X
Ai  
VPP  
X(1)  
Outputs  
DOUT  
Read  
Ai  
Output Disable  
Standby  
X
X
X
High Z  
VIH  
VIL  
X
X
High Z  
Rapid Program(2)  
VIH  
VIL  
VIH  
VIL  
Ai  
Ai  
VPP  
VPP  
VPP  
X
DIN  
PGM Verify  
DOUT  
PGM Inhibit  
Product Identification(4)  
VIH  
VIL  
X
High Z  
(3)  
A9 = VH  
Identification Code  
A0 = VIH or VIL  
A1 - A18 = VIL  
Notes: 1. X can be VIL or VIH.  
2. Refer to Programming Characteristics  
3. VH = 12.0 ± 0.5V.  
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled  
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.  
Absolute Maximum Ratings*  
*NOTICE:  
Stresses beyond those listed under “Absolute  
Maximum Ratings” may cause permanent dam-  
age to the device. This is a stress rating only and  
functional operation of the device at these or any  
other conditions beyond those indicated in the  
operational sections of this specification is not  
implied. Exposure to absolute maximum rating  
conditions for extended periods may affect  
device reliability.  
Temperature Under Bias................................ -55°C to +125°C  
Storage Temperature..................................... -65°C to +150°C  
Voltage on Any Pin with  
Respect to Ground ............................................-2.0V to +7.0V  
Voltage on A9 with  
Respect to Ground .........................................-2.0V to +14.0V  
VPP Supply Voltage with  
Respect to Ground ..........................................-2.0V to +14.0V  
3
0189F–EPROM–4/03  
DC and AC Operating Conditions for Read Operation  
AT27C040-70  
0°C - 70°C  
-40°C - 85°C  
5V ± 10%  
AT27C040-90  
0°C - 70°C  
-40°C - 85°C  
5V ±10%  
AT27C040-12  
0°C - 70°C  
-40°C - 85°C  
5V ± 10%  
AT27C040-15  
0°C - 70°C  
-40°C - 85°C  
5V ± 10%  
Operating  
Temperature (Case)  
Com.  
Ind.  
VCC Power Supply  
DC and Operating Characteristics for Read Operation  
Symbol  
Parameter  
Condition  
Min  
Max  
±1  
Units  
µA  
µA  
µA  
µA  
mA  
mA  
V
ILI  
Input Load Current  
Output Leakage Current  
VIN = 0V to VCC  
VOUT = 0V to VCC  
ILO  
±5  
(2)  
IPP1  
VPP(1) Read/Standby Current VPP = VCC  
10  
ISB  
VCC1(1) Standby Current  
ISB1 (CMOS), CE = VCC ±0.3V  
SB2 (TTL), CE = 2.0 to VCC + 0.5V  
100  
1
I
ICC  
VCC Active Current  
Input Low Voltage  
Input High Voltage  
Output Low Voltage  
Output High Voltage  
f = 5 MHz, IOUT = 0 mA, CE = VIL  
30  
VIL  
-0.6  
2.0  
0.8  
VIH  
VOL  
VOH  
VCC + 0.5  
0.4  
V
IOL = 2.1 mA  
V
IOH = -400 µA  
2.4  
V
Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.  
2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP.  
AC Characteristics for Read Operation  
AT27C040  
-70  
-90  
-12  
-15  
Symbol  
Parameter  
Condition  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Units  
(3)  
tACC  
Address to Output Delay  
CE = OE  
= VIL  
70  
90  
120  
150  
ns  
(2)  
tCE  
CE to Output Delay  
OE to Output Delay  
OE = VIL  
CE = VIL  
70  
30  
20  
90  
35  
20  
120  
35  
150  
40  
ns  
ns  
ns  
(2)(3)  
tOE  
(4)(5)  
tDF  
OE or CE High to Output Float, whichever  
occurred first  
30  
30  
tOH  
Output Hold from Address, CE or OE,  
whichever occurred first  
0
0
0
0
ns  
Note:  
1. 2, 3, 4, 5 – see AC Waveforms for Read Operation  
4
AT27C040  
0189F–EPROM–4/03  
AT27C040  
AC Waveforms for Read Operation(1)  
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.  
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE  
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC  
.
.
4. This parameter is only sampled and is not 100% tested.  
5. Output float is defined as the point when data is no longer driven.  
Input Test Waveforms and Measurement Levels  
Output Test Load  
1.3V  
(1N914)  
3.3K  
OUTPUT  
PIN  
CL  
Pin Capacitance  
f = 1 MHz, T = 25° C(1)  
Symbol  
CIN  
Typ  
4
Max  
8
Units  
pF  
Conditions  
VIN = 0V  
COUT  
8
12  
pF  
VOUT = 0V  
Note:  
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.  
5
0189F–EPROM–4/03  
Programming Waveforms(1)  
Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.  
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.  
3. When programming the AT27C040 a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage  
transients.  
DC Programming Characteristics  
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V  
Limits  
Symbol  
ILI  
Parameter  
Test Conditions  
Min  
Max  
±10  
Units  
µA  
V
Input Load Current  
VIN = VIL, VIH  
VIL  
Input Low Level  
-0.6  
2.0  
0.8  
VIH  
Input High Level  
VCC + 0.7  
0.4  
V
VOL  
VOH  
ICC2  
IPP2  
VID  
Output Low Voltage  
Output High Voltage  
VCC Supply Current (Program and Verify)  
VPP Supply Current  
IOL = 2.1 mA  
IOH = -400 µA  
V
2.4  
V
40  
20  
mA  
mA  
V
CE = VIL  
A9 Product Identification Voltage  
11.5  
12.5  
6
AT27C040  
0189F–EPROM–4/03  
AT27C040  
AC Programming Characteristics  
TA = 25 ±5°C, VCC = 6.5 ±0.25V, VPP = 13.0 ±0.25V  
Limits  
Symbol  
tAS  
Parameter  
Test Conditions(1)  
Min  
2
Max  
Units  
µs  
Address Setup Time  
OE Setup Time  
Input Rise and Fall Times:  
(10% to 90%) 20 ns  
tOES  
tDS  
2
µs  
Data Setup Time  
2
µs  
Input Pulse Levels:  
0.45V to 2.4V  
tAH  
Address Hold Time  
Data Hold Time  
0
µs  
tDH  
2
µs  
Input Timing Reference Level:  
0.8V to 2.0V  
tDFP  
tVPS  
tVCS  
tPW  
OE High to Output Float Delay(2)  
VPP Setup Time  
0
130  
ns  
µs  
2
Output Timing Reference Level:  
0.8V to 2.0V  
VCC Setup Time  
2
µs  
CE Program Pulse Width(3)  
Data Valid from OE(2)  
95  
105  
150  
µs  
tOE  
ns  
ns  
tPRT  
VPP Pulse Rise Time During  
Programming  
50  
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.  
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven  
– see timing diagram.  
3. Program Pulse width tolerance is 100 µsec ±5%.  
Atmel’s AT27C040 Integrated Product Identification Code  
Pins  
Codes  
A0  
0
O7  
0
O6  
0
O5  
0
O4  
1
O3  
1
O2  
1
O1  
1
O0  
0
Hex Data  
1E  
Manufacturer  
Device Type  
1
0
0
0
0
1
0
1
1
0B  
7
0189F–EPROM–4/03  
Rapid  
Programming  
Algorithm  
A 100 µs CE pulse width is used to program. The address is set to the first location. VCC is  
raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs  
CE pulse without verification. Then a verification/reprogramming loop is executed for each  
address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are  
applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been  
applied, the part is considered failed. After the byte verifies properly, the next address is  
selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes  
are read again and compared with the original data to determine if the device passes or fails.  
8
AT27C040  
0189F–EPROM–4/03  
AT27C040  
Ordering Information  
I
CC (mA)  
tACC (ns)  
Active  
Standby  
Ordering Code  
Package  
Operation Range  
70  
30  
0.1  
AT27C040-70JC  
AT27C040-70PC  
AT27C040-70TC  
32J  
Commercial  
32P6  
32T  
(0°C to 70°C)  
30  
30  
30  
30  
30  
30  
30  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
AT27C040-70JI  
AT27C040-70PI  
AT27C040-70TI  
32J  
Industrial  
32P6  
32T  
(-40° C to 85°C)  
90  
AT27C040-90JC  
AT27C040-90PC  
AT27C040-90TC  
32J  
Commercial  
32P6  
32T  
(0°C to 70°C)  
AT27C040-90JI  
AT27C040-90PI  
AT27C040-90TI  
32J  
Industrial  
32P6  
32T  
(-40° C to 85°C)  
120  
150  
AT27C040-12JC  
AT27C040-12PC  
AT27C040-12TC  
32J  
Commercial  
32P6  
32T  
(0°C to 70°C)  
AT27C040-12JI  
AT27C040-12PI  
AT27C040-12TI  
32J  
Industrial  
32P6  
32T  
(-40° C to 85°C)  
AT27C040-15JC  
AT27C040-15PC  
AT27C040-15TC  
32J  
Commercial  
32P6  
32T  
(0°C to 70°C)  
AT27C040-15JI  
AT27C040-15PI  
AT27C040-15TI  
32J  
Industrial  
32P6  
32T  
(-40° C to 85°C)  
Package Type  
32J  
32-lead, Plastic J-leaded Chip Carrier (PLCC)  
32P6  
32T  
32-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)  
32-lead, Plastic Thin Small Outline Package (TSOP)  
9
0189F–EPROM–4/03  
Package Information  
32J – PLCC  
1.14(0.045) X 45˚  
PIN NO. 1  
IDENTIFIER  
1.14(0.045) X 45˚  
0.318(0.0125)  
0.191(0.0075)  
E2  
E1  
E
B1  
B
e
A2  
A1  
D1  
D
A
0.51(0.020)MAX  
45˚ MAX (3X)  
COMMON DIMENSIONS  
(Unit of Measure = mm)  
MIN  
3.175  
1.524  
0.381  
12.319  
11.354  
9.906  
14.859  
13.894  
12.471  
0.660  
0.330  
MAX  
3.556  
2.413  
NOM  
NOTE  
SYMBOL  
A
D2  
A1  
A2  
D
12.573  
D1  
D2  
E
11.506 Note 2  
10.922  
Notes:  
1. This package conforms to JEDEC reference MS-016, Variation AE.  
2. Dimensions D1 and E1 do not include mold protrusion.  
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1  
and E1 include mold mismatch and are measured at the extreme  
material condition at the upper or lower parting line.  
15.113  
E1  
E2  
B
14.046 Note 2  
13.487  
0.813  
3. Lead coplanarity is 0.004" (0.102 mm) maximum.  
B1  
e
0.533  
1.270 TYP  
10/04/01  
TITLE  
DRAWING NO.  
REV.  
2325 Orchard Parkway  
San Jose, CA 95131  
32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)  
32J  
B
R
10  
AT27C040  
0189F–EPROM–4/03  
AT27C040  
32P6 – PDIP  
D
PIN  
1
E1  
A
SEATING PLANE  
A1  
L
B
B1  
e
E
COMMON DIMENSIONS  
(Unit of Measure = mm)  
0º ~ 15º REF  
C
MIN  
MAX  
4.826  
NOM  
NOTE  
SYMBOL  
A
eB  
A1  
D
0.381  
41.783  
15.240  
13.462  
0.356  
1.041  
3.048  
0.203  
15.494  
42.291 Note 1  
15.875  
E
E1  
B
13.970 Note 1  
0.559  
B1  
L
1.651  
Note:  
1. Dimensions D and E1 do not include mold Flash or Protrusion.  
Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").  
3.556  
C
0.381  
eB  
e
17.526  
2.540 TYP  
09/28/01  
DRAWING NO. REV.  
32P6  
TITLE  
2325 Orchard Parkway  
San Jose, CA 95131  
32P6, 32-lead (0.600"/15.24 mm Wide) Plastic Dual  
Inline Package (PDIP)  
B
R
11  
0189F–EPROM–4/03  
32T – TSOP  
PIN 1  
0º ~ 8º  
c
Pin 1 Identifier  
D1  
D
L
b
L1  
e
A2  
E
GAGE PLANE  
A
SEATING PLANE  
COMMON DIMENSIONS  
(Unit of Measure = mm)  
A1  
MIN  
MAX  
1.20  
0.15  
1.05  
20.20  
NOM  
NOTE  
SYMBOL  
A
A1  
A2  
D
0.05  
0.95  
19.80  
18.30  
7.90  
0.50  
1.00  
Notes:  
1. This package conforms to JEDEC reference MO-142, Variation BD.  
2. Dimensions D1 and E do not include mold protrusion. Allowable  
protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.  
3. Lead coplanarity is 0.10 mm maximum.  
20.00  
18.40  
8.00  
D1  
E
18.50 Note 2  
8.10  
0.70  
Note 2  
L
0.60  
L1  
b
0.25 BASIC  
0.22  
0.17  
0.10  
0.27  
0.21  
c
e
0.50 BASIC  
10/18/01  
DRAWING NO. REV.  
32T  
TITLE  
2325 Orchard Parkway  
San Jose, CA 95131  
32T, 32-lead (8 x 20 mm Package) Plastic Thin Small Outline  
Package, Type I (TSOP)  
B
R
12  
AT27C040  
0189F–EPROM–4/03  
Atmel Corporation  
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San Jose, CA 95131  
Tel: 1(408) 441-0311  
Fax: 1(408) 487-2600  
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