AT27C512R-45 [ATMEL]

512K 64K x 8 OTP CMOS EPROM; 512K 64K ×8 OTP EPROM CMOS
AT27C512R-45
型号: AT27C512R-45
厂家: ATMEL    ATMEL
描述:

512K 64K x 8 OTP CMOS EPROM
512K 64K ×8 OTP EPROM CMOS

可编程只读存储器 电动程控只读存储器
文件: 总9页 (文件大小:252K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AT27C512R  
Features  
Fast Read Access Time - 45 ns  
Low Power CMOS Operation  
100 µA max. Standby  
20 mA max. Active at 5 MHz  
JEDEC Standard Packages  
28-Lead 600-mil PDIP  
32-Lead PLCC  
28-Lead TSOP and SOIC  
5V ± 10% Supply  
High Reliability CMOS Technology  
2,000V ESD Protection  
200 mA Latchup Immunity  
Rapid Programming Algorithm - 100 µs/byte (typical)  
CMOS and TTL Compatible Inputs and Outputs  
512K (64K x 8)  
OTP  
CMOS  
Integrated Product Identification Code  
Commercial and Industrial Temperature Ranges  
EPROM  
Description  
The AT27C512R is a low-power, high performance 524,288 bit one-time program-  
mable read only memory (OTP EPROM) organized 64K by 8 bits. It requires only  
one 5V power supply in normal read mode operation. Any byte can be accessed in  
less than 45 ns, eliminating the need for speed reducing WAIT states on high per-  
formance microprocessor systems.  
Atmel’s scaled CMOS technology provides high speed, lower active power con-  
sumption, and significantly faster programming. Power consumption is typically only  
8 mA in Active Mode and less than 10 µA in Standby.  
(continued)  
Pin Configurations  
Pin Name Function  
AT27C512R  
PDIP, SOIC Top View  
A0 - A15  
O0 - O7  
CE  
Addresses  
Outputs  
Chip Enable  
Output Enable/VPP  
No Connect  
OE /VPP  
NC  
PLCC Top View  
TSOP Top View  
Type 1  
Note: PLCC Package Pins 1 and  
17 are DON’T CONNECT.  
0015H  
3-135  
Description (Continued)  
System Considerations  
The AT27C512R is available in a choice of industry stand-  
ard JEDEC-approved one-time programmable (OTP)  
plastic PDIP, PLCC, SOIC, and TSOP packages. All de-  
vices feature two-line control (CE, OE) to give designers  
the flexibility to prevent bus contention.  
Switching between active and standby conditions via the  
Chip Enable pin may produce transient voltage excur-  
sions. Unless accommodated by the system design, these  
transients may exceed data sheet limits, resulting in de-  
vice non-conformance. At a minimum, a 0.1 µF high fre-  
quency, low inherent inductance, ceramic capacitor  
should be utilized for each device. This capacitor should  
With 64K byte storage capability, the AT27C512R allows  
firmware to be stored reliably and to be accessed by the  
system without the delays of mass storage media.  
be connected between the V and Ground terminals of  
CC  
the device, as close to the device as possible. Additionally,  
to stabilize the supply voltage level on printed circuit  
boards with large EPROM arrays, a 4.7 µF bulk electrolytic  
capacitor should be utilized, again connected between the  
Atmel’s 27C512R has additional features to ensure high  
quality and efficient production use. The Rapid Program-  
ming Algorithm reduces the time required to program the  
part and guarantees reliable programming. Programming  
time is typically only 100 µs/byte. The Integrated Product  
Identification Code electronically identifies the device and  
manufacturer. This feature is used by industry standard  
programming equipment to select the proper program-  
ming algorithms and voltages.  
V
and Ground terminals. This capacitor should be posi-  
CC  
tioned as close as possible to the point where the power  
supply is connected to the array.  
3-136  
AT27C512R  
AT27C512R  
Absolute Maximum Ratings*  
Block Diagram  
Temperature Under Bias ................ -55°C to +125°C  
Storage Temperature...................... -65°C to +150°C  
Voltage on Any Pin with  
(1)  
Respect to Ground......................... -2.0V to +7.0V  
Voltage on A9 with  
Respect to Ground ......................-2.0V to +14.0V  
(1)  
V
Supply Voltage with  
PP  
(1)  
Respect to Ground.......................-2.0V to +14.0V  
*NOTICE: Stresses beyond those listed under “Absolute Maxi-  
mum Ratings” may cause permanent damage to the device.  
This is a stress rating only and functional operation of the  
device at these or any other conditions beyond those indi-  
cated in the operational sections of this specification is not  
implied. Exposure to absolute maximum rating conditions  
for extended periods may affect device reliability.  
Note: 1. Minimum voltage is -0.6V dc which may undershoot  
to -2.0V for pulses of less than 20 ns. Maximum out-  
put pin voltage is VCC + 0.75V dc which may over-  
shoot to +7.0V for pulses of less than 20 ns.  
Operating Modes  
CE  
OE/V  
Ai  
Ai  
X
Mode \ Pin  
Read  
Outputs  
PP  
V
V
V
D
OUT  
IL  
IL  
IH  
IL  
(1)  
Output Disable  
Standby  
V
IH  
High Z  
High Z  
(1)  
V
X
X
(2)  
Rapid Program  
V
V
V
Ai  
D
IN  
IL  
PP  
PP  
(1)  
PGM Inhibit  
V
IH  
X
High Z  
(3)  
A9 = V  
H
(4)  
Product Identification  
V
IL  
V
A0 = V or V  
Identification Code  
IL  
IH  
IL  
A1 - A15 = V  
IL  
Notes: 1. X can be VIL or VIH.  
4. Two identifier bytes may be selected. All Ai inputs are held  
low (VIL), except A9 which is set to VH and A0 which is tog-  
gled low (VIL) to select the Manufacturer’s Identification byte  
and high (VIH) to select the Device Code byte.  
2. Refer to Programming Characteristics.  
3. VH = 12.0 ± 0.5V.  
3-137  
DC and AC Operating Conditions for Read Operation  
AT27C512R  
-45  
-55  
-70  
-90  
-12  
-15  
Operating  
Com. 0°C - 70°C  
0°C - 70°C  
0°C - 70°C  
0°C - 70°C  
0°C - 70°C  
0°C - 70°C  
Temp.(Case)  
Ind. -40°C - 85°C -40°C - 85°C  
5V ± 10% 5V ± 10%  
-40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C  
V
Supply  
5V ± 10%  
5V ± 10%  
5V ± 10%  
5V ± 10%  
CC  
DC and Operating Characteristics for Read Operation  
Symbol Parameter  
Condition  
Min  
Max  
Units  
I
Input Load Current  
V
= 0V to V  
CC  
±1  
±5  
µA  
µA  
µA  
LI  
IN  
I
LO  
Output Leakage Current  
V
= 0V to V  
CC  
OUT  
100  
I
I
(CMOS), CE = V ± 0.3V  
CC  
SB1  
SB2  
(1)  
I
V
V
Standby Current  
SB  
CC  
CC  
1
mA  
mA  
(TTL), CE = 2.0 to V + 0.5V  
CC  
f = 5 MHz, I  
CE = V  
= 0 mA,  
OUT  
I
Active Current  
20  
0.8  
CC  
IL  
V
V
V
V
Input Low Voltage  
Input High Voltage  
Output Low Voltage  
Output High Voltage  
-0.6  
2.0  
V
V
V
V
IL  
V
+ 0.5  
IH  
CC  
I
OL  
= 2.1 mA  
0.4  
OL  
OH  
I
= -400 µA  
2.4  
OH  
Note: 1. VCC must be applied simultaneously or before OE/VPP, and removed simultaneously or after OE/VPP  
.
AC Characteristics for Read Operation  
AT27C512R  
-70 -90  
-45  
-55  
-12  
-15  
Min Max Min Max Min Max Min Max Min Max Min Max  
Symbol Parameter  
Condition  
Units  
Address to  
CE = OE/VPP  
= VIL  
(3)  
t
t
t
45  
45  
20  
55  
55  
25  
70  
70  
30  
90  
90  
35  
120  
120  
35  
150 ns  
150 ns  
ACC  
Output Delay  
(2)  
CE to Output Delay OE/VPP = VIL  
CE  
OE  
OE/VPP to Output  
CE = VIL  
(2, 3)  
(4, 5)  
40  
35  
ns  
ns  
Delay  
OE/VPP or CE High to  
Output Float, whichever occurred first  
t
t
20  
20  
25  
25  
30  
DF  
Output Hold from  
Address, CE or OE/VPP  
,
7
7
7
0
0
0
ns  
OH  
whichever occurred first  
Notes:  
2, 3, 4, 5. - see AC Waveforms for Read Operation.  
3-138  
AT27C512R  
AT27C512R  
AC Waveforms for Read Operation (1)  
Notes: 1. Timing measurement reference level is 1.5V for -45 and 3. OE/VPP may be delayed up to tACC - tOE after the  
-55 devices. Input AC drive levels are VIL = 0.0V and  
VIH = 3.0V. Timing measurement reference levels for  
address is valid without impact on tACC.  
4. This parameter is only sampled and is not 100% tested.  
5. Output float is defined as the point when data is no longer  
driven.  
all other speed grades are VOL = 0.8V and VOH  
=
2.0V. Input AC drive levels are VIL = 0.45V and VIH  
2.4V.  
=
2. OE/VPP may be delayed up to tCE - tOE after the falling  
edge of CE without impact on tCE  
.
Input Test Waveforms and Measurement Levels  
Output Test Load  
For -45 and -55 devices  
only:  
tR, tF < 5 ns (10% to 90%)  
For -70, -90, -12, -15,  
and -20 devices:  
Note: CL = 100 pF including jig capaci-  
tance, except for the -45 and -55  
devices, where CL = 30 pF.  
tR, tF < 20 ns (10% to 90%)  
Pin Capacitance (f = 1 MHz T = 25°C) (1)  
Typ  
4
Max  
6
Units  
pF  
Conditions  
C
C
V
V
= 0V  
IN  
IN  
8
12  
pF  
= 0V  
OUT  
OUT  
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.  
3-139  
Programming Waveforms  
Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.  
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.  
DC Programming Characteristics  
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V  
Test  
Limits  
Symbol  
Parameter  
Conditions  
Min  
Units  
µA  
V
Max  
±10  
0.8  
Input Load Current  
Input Low Level  
Input High Level  
Output Low Voltage  
Output High Voltage  
VIN = VIL,VIH  
I
LI  
-0.6  
2.0  
V
V
V
V
IL  
VCC + 1  
0.4  
V
IH  
IOL = 2.1 mA  
V
OL  
OH  
IOH = -400 µA  
2.4  
V
VCC Supply Current  
(Program and Verify)  
25  
mA  
I
CC2  
PP2  
OE/VPP Current  
CE = VIL  
25  
mA  
V
I
A9 Product Identification Voltage  
11.5  
12.5  
V
ID  
3-140  
AT27C512R  
AT27C512R  
AC Programming Characteristics  
RapidProgramming Algorithm  
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V  
A 100 µs CE pulse width is used to program. The address  
is set to the first location. V  
is raised to 6.5V and  
CC  
Sym-  
bol  
Test  
Condtions*  
Limits  
Units  
OE/V is raised to 13.0V. Each address is first pro-  
PP  
(1)  
Parameter  
Min  
Max  
grammed with one 100 µs CE pulse without verification.  
Then a verification/reprogramming loop is executed for  
each address. In the event a byte fails to pass verification,  
up to 10 successive 100 µs pulses are applied with a veri-  
fication after each pulse. If the byte fails to verify after 10  
pulses have been applied, the part is considered failed.  
After the byte verifies properly, the next address is se-  
Address Setup Time  
OE/VPP Setup Time  
OE/VPP Hold Time  
Data Setup Time  
Address Hold Time  
Data Hold Time  
2
2
2
2
0
2
µs  
µs  
µs  
µs  
µs  
µs  
t
t
t
t
t
t
AS  
OES  
OEH  
DS  
AH  
lected until all have been checked. OE/V is then low-  
PP  
DH  
ered to V and V to 5.0V. All bytes are read again and  
IL  
CC  
CE High to  
compared with the original data to determine if the device  
passes or fails.  
0
130  
ns  
Output Float Delay (2)  
t
DFP  
VCC Setup Time  
2
µs  
µs  
µs  
µs  
t
t
t
t
VCS  
PW  
DV  
CE Program Pulse Width (3)  
Data Valid from CE (2)  
OE/VPP Recovery Time  
95  
105  
1
2
VR  
OE/VPP Pulse Rise  
Time During Programming  
50  
ns  
t
PRT  
*AC Conditions of Test:  
Input Rise and Fall Times (10% to 90%).............. 20 ns  
Input Pulse Levels....................................0.45V to 2.4V  
Input Timing Reference Level....................0.8V to 2.0V  
Output Timing Reference Level.................0.8V to 2.0V  
Notes: 1. VCC must be applied simultaneously or before  
OE/VPP and removed simultaneously or after  
OE/VPP  
.
2. This parameter is only sampled and is not 100%  
tested. Output Float is defined as the point where  
data is no longer driven — see timing diagram.  
3. Program Pulse width tolerance is 100 µsec ± 5%.  
Atmel’s 27C512R Integrated  
Product Identification Code  
Pins  
Hex  
Codes  
Data  
A0 O7 O6 O5 O4 O3 O2 O1 O0  
Manufacturer  
Device Type  
0
1
0
0
0
0
0
0
1
0
1
1
1
1
1
0
0
1
1E  
0D  
3-141  
Ordering Information  
t
I
(mA)  
ACC  
CC  
Ordering Code  
Package  
Operation Range  
(ns)  
Active  
Standby  
45  
20  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
AT27C512R-45JC  
AT27C512R-45PC  
AT27C512R-45RC  
AT27C512R-45TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
AT27C512R-45JI  
AT27C512R-45PI  
AT27C512R-45RI  
AT27C512R-45TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
55  
AT27C512R-55JC  
AT27C512R-55PC  
AT27C512R-55RC  
AT27C512R-55TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
AT27C512R-55JI  
AT27C512R-55PI  
AT27C512R-55RI  
AT27C512R-55TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
70  
AT27C512R-70JC  
AT27C512R-70PC  
AT27C512R-70RC  
AT27C512R-70TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
AT27C512R-70JI  
AT27C512R-70PI  
AT27C512R-70RI  
AT27C512R-70TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
90  
AT27C512R-90JC  
AT27C512R-90PC  
AT27C512R-90RC  
AT27C512R-90TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
AT27C512R-90JI  
AT27C512R-90PI  
AT27C512R-90RI  
AT27C512R-90TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
120  
AT27C512R-12JC  
AT27C512R-12PC  
AT27C512R-12RC  
AT27C512R-12TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
AT27C512R-12JI  
AT27C512R-12PI  
AT27C512R-12RI  
AT27C512R-12TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
150  
AT27C512R-15JC  
AT27C512R-15PC  
AT27C512R-15RC  
AT27C512R-15TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
(continued)  
3-142  
AT27C512R  
AT27C512R  
Ordering Information (Continued)  
t
I
(mA)  
ACC  
CC  
Ordering Code  
Package  
Operation Range  
(ns)  
Active  
Standby  
0.1  
150  
20  
AT27C512R-15JI  
AT27C512R-15PI  
AT27C512R-15RI  
AT27C512R-15TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
Package Type  
32J  
32 Lead, Plastic J-Leaded Chip Carrier (PLCC)  
28P6  
28R  
28T  
28 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)  
28 Lead, 0.330" Wide, Plastic Gull Wing Small Outline (SOIC)  
28 Lead, Thin Small Outline Package (TSOP)  
3-143  

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