ATMEGA169P-16MCHR [ATMEL]

Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 16MHz, CMOS, PBGA64,;
ATMEGA169P-16MCHR
型号: ATMEGA169P-16MCHR
厂家: ATMEL    ATMEL
描述:

Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 16MHz, CMOS, PBGA64,

微控制器 外围集成电路
文件: 总14页 (文件大小:230K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Features  
High Performance, Low Power AVR® 8-Bit Microcontroller  
Advanced RISC Architecture  
– 130 Powerful Instructions – Most Single Clock Cycle Execution  
– 32 x 8 General Purpose Working Registers  
– Fully Static Operation  
– Up to 16 MIPS Throughput at 16 MHz  
– On-Chip 2-cycle Multiplier  
Non-volatile Program and Data Memories  
– 16K bytes of In-System Self-Programmable Flash  
Endurance: 10,000 Write/Erase Cycles  
– Optional Boot Code Section with Independent Lock Bits  
In-System Programming by On-chip Boot Program  
True Read-While-Write Operation  
8-bit  
Microcontroller  
with 16K Bytes  
In-System  
Programmable  
Flash  
– 512 bytes EEPROM  
Endurance: 100,000 Write/Erase Cycles  
– 1K byte Internal SRAM  
– Programming Lock for Software Security  
JTAG (IEEE std. 1149.1 compliant) Interface  
– Boundary-scan Capabilities According to the JTAG Standard  
– Extensive On-chip Debug Support  
– Programming of Flash, EEPROM, Fuses, and Loc Bits through the JTAG Interface  
Peripheral Features  
– 4 x 25 Segment LCD Driver  
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode  
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture  
Mode  
– Real Time Counter with Separate Oscillator  
– Four PWM Channels  
– 8-channel, 10-bit ADC  
– Programmable Serial USART  
– Master/Slave SPI Serial Interface  
– Universal Serial Interface with Start Condition Detector  
– Programmable Watchdog Timer with Separate On-chip Oscillator  
– On-chip Analog Comparator  
– Interrupt and Wake-up on Pin Change  
Special Microcontroller Features  
– Power-on Reset and Programmable Brown-out Detection  
– Internal Calibrated Oscillator  
– External and Internal Interrupt Sources  
– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and  
Standby  
ATmega169P  
Automotive  
Preliminary  
I/O and Packages  
– 54 Programmable I/O Lines  
– 64-pad TQFP  
Speed Grade:  
– ATmega169P: 0 - 8 MHz @ 2.7 - 5.5V, 0 - 16 MHz @ 4.5 - 5.5V  
Temperature range:  
– -40°C to 85°C Automotive  
Ultra-Low Power Consumption  
– Active Mode:  
4 MHz, 3.0V: 2.5 mA (Typical value)  
8 MHz, 5.0V: 8 mA (Typical value)  
Summary  
– Power-down Mode:  
0.4 µA at 5.0V  
7735B–AVR–12/07  
1. Pin Configurations  
Figure 1-1. Pinout ATmega169P  
LCDCAP  
(RXD/PCINT0) PE0  
(TXD/PCINT1) PE1  
1
2
3
PA3 (COM3)  
PA4 (SEG0)  
PA5 (SEG1)  
PA6 (SEG2)  
48  
47  
46  
INDEX CORNER  
(XCK/AIN0/PCINT2) PE2  
(AIN1/PCINT3) PE3  
4
45  
5
6
PA7 (SEG3)  
PG2 (SEG4)  
PC7 (SEG5)  
PC6 (SEG6)  
PC5 (SEG7)  
44  
43  
(USCK/SCL/PCINT4) PE4  
(DI/SDA/PCINT5) PE5  
(DO/PCINT6) PE6  
7
8
9
42  
41  
40  
(CLKO/PCINT7) PE7  
(SS/PCINT8) PB0 10  
(SCK/PCINT9) PB1 11  
(MOSI/PCINT10) PB2 12  
(MISO/PCINT11) PB3 13  
39 PC4 (SEG8)  
PC3 (SEG9)  
PC2 (SEG10)  
PC1 (SEG11)  
PC0 (SEG12)  
38  
37  
36  
(OC0A/PCINT12) PB4 14  
(OC1A/PCINT13) PB5 15  
(OC1B/PCINT14) PB6 16  
35  
34  
33  
PG1 (SEG13)  
PG0 (SEG14)  
1.1  
Disclaimer  
Typical values contained in this datasheet are based on simulations and characterization of  
other AVR microcontrollers manufactured on the same process technology. Min and Max values  
will be available after the device is characterized.  
2
ATmega169P Automotive  
7735B–AVR–12/07  
ATmega169P Automotive  
2. Overview  
The ATmega169P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By execut-  
ing powerful instructions in a single clock cycle, the ATmega169P achieves throughputs approaching 1 MIPS per MHz  
allowing the system designer to optimize power consumption versus processing speed.  
2.1  
Block Diagram  
Figure 2-1. Block Diagram  
PF0 - PF7  
PA0 - PA7  
PC0 - PC7  
VCC  
GND  
PORTA DRIVERS  
PORTF DRIVERS  
PORTC DRIVERS  
DATA REGISTER  
PORTF  
DATA DIR.  
REG. PORTF  
DATA REGISTER  
PORTA  
DATA DIR.  
REG. PORTA  
DATA REGISTER  
PORTC  
DATA DIR.  
REG. PORTC  
8-BIT DATA BUS  
AVCC  
CALIB. OSC  
INTERNAL  
ADC  
OSCILLATOR  
AREF  
OSCILLATOR  
PROGRAM  
COUNTER  
STACK  
WATCHDOG  
TIMER  
JTAG TAP  
POINTER  
TIMING AND  
CONTROL  
LCD  
CONTROLLER/  
DRIVER  
PROGRAM  
FLASH  
MCU CONTROL  
REGISTER  
SRAM  
ON-CHIP DEBUG  
BOUNDARY-  
SCAN  
INSTRUCTION  
REGISTER  
TIMER/  
GENERAL  
PURPOSE  
REGISTERS  
COUNTERS  
X
Y
Z
PROGRAMMING  
LOGIC  
INSTRUCTION  
DECODER  
INTERRUPT  
UNIT  
CONTROL  
LINES  
ALU  
EEPROM  
STATUS  
REGISTER  
AVR CPU  
UNIVERSAL  
SPI  
USART  
SERIAL INTERFACE  
DATA REGISTER  
PORTE  
DATA DIR.  
DATA REGISTER  
PORTB  
DATA DIR.  
REG. PORTB  
DATA REGISTER  
PORTD  
DATA DIR.  
REG. PORTD  
DATA REG. DATA DIR.  
PORTG  
REG. PORTE  
REG. PORTG  
PORTB DRIVERS  
PORTD DRIVERS  
PORTG DRIVERS  
PORTE DRIVERS  
PE0 - PE7  
PB0 - PB7  
PD0 - PD7  
PG0 - PG4  
3
7735B–AVR–12/07  
The AVR core combines a rich instruction set with 32 general purpose working registers. All the  
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent  
registers to be accessed in one single instruction executed in one clock cycle. The resulting  
architecture is more code efficient while achieving throughputs up to ten times faster than con-  
ventional CISC microcontrollers.  
The ATmega169P provides the following features: 16K bytes of In-System Programmable Flash  
with Read-While-Write capabilities, 512 bytes EEPROM, 1K byte SRAM, 53 general purpose I/O  
lines, 32 general purpose working registers, a JTAG interface for Boundary-scan, On-chip  
Debugging support and programming, a complete On-chip LCD controller with internal step-up  
voltage, three flexible Timer/Counters with compare modes, internal and external interrupts, a  
serial programmable USART, Universal Serial Interface with Start Condition Detector, an 8-  
channel, 10-bit ADC, a programmable Watchdog Timer with internal Oscillator, an SPI serial  
port, and five software selectable power saving modes. The Idle mode stops the CPU while  
allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The  
Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip  
functions until the next interrupt or hardware reset. In Power-save mode, the asynchronous  
timer and the LCD controller continues to run, allowing the user to maintain a timer base and  
operate the LCD display while the rest of the device is sleeping. The ADC Noise Reduction  
mode stops the CPU and all I/O modules except asynchronous timer, LCD controller and ADC,  
to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator  
Oscillator is running while the rest of the device is sleeping. This allows very fast start-up com-  
bined with low-power consumption.  
The device is manufactured using Atmel’s high density non-volatile memory technology. The  
On-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPI  
serial interface, by a conventional non-volatile memory programmer, or by an On-chip Boot pro-  
gram running on the AVR core. The Boot program can use any interface to download the  
application program in the Application Flash memory. Software in the Boot Flash section will  
continue to run while the Application Flash section is updated, providing true Read-While-Write  
operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a  
monolithic chip, the Atmel ATmega169P is a powerful microcontroller that provides a highly flex-  
ible and cost effective solution to many embedded control applications.  
The ATmega169P AVR is supported with a full suite of program and system development tools  
including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators,  
and Evaluation kits.  
2.2  
Automotive Quality Grade  
The ATmega169P have been developed and manufactured according to the most stringent  
requirements of the international standard ISO-TS-16949. This data sheet contains limit values  
extracted from the results of extensive characterization (Temperature and Voltage). The quality  
and reliability of the ATmega169P have been verified during regular product qualification as per  
AEC-Q100 grade 3.  
As indicated in the ordering information paragraph, the products are available in industrial tem-  
perature grades, but with equivalent automotive quality and reliability objectives. Different  
temperature identifiers have been defined as listed in Table 2-1.  
4
ATmega169P Automotive  
7735B–AVR–12/07  
ATmega169P Automotive  
Table 2-1.  
Temperature Grade Identification for Automotive Products  
Temperature  
Temperature  
Identifier  
Comments  
-40 to +85°C  
T
Similar to Industrial Temperature Grade but with Automotive  
Quality  
5
7735B–AVR–12/07  
3. Register Summary  
Address  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Page  
(0xFF)  
(0xFE)  
(0xFD)  
(0xFC)  
(0xFB)  
(0xFA)  
(0xF9)  
(0xF8)  
(0xF7)  
(0xF6)  
(0xF5)  
(0xF4)  
(0xF3)  
(0xF2)  
(0xF1)  
(0xF0)  
(0xEF)  
(0xEE)  
(0xED)  
(0xEC)  
(0xEB)  
(0xEA)  
(0xE9)  
(0xE8)  
(0xE7)  
(0xE6)  
(0xE5)  
(0xE4)  
(0xE3)  
(0xE2)  
(0xE1)  
(0xE0)  
(0xDF)  
(0xDE)  
(0xDD)  
(0xDC)  
(0xDB)  
(0xDA)  
(0xD9)  
(0xD8)  
(0xD7)  
(0xD6)  
(0xD5)  
(0xD4)  
(0xD3)  
(0xD2)  
(0xD1)  
(0xD0)  
(0xCF)  
(0xCE)  
(0xCD)  
(0xCC)  
(0xCB)  
(0xCA)  
(0xC9)  
(0xC8)  
(0xC7)  
(0xC6)  
(0xC5)  
(0xC4)  
(0xC3)  
(0xC2)  
(0xC1)  
(0xC0)  
Reserved  
LCDDR18  
LCDDR17  
LCDDR16  
LCDDR15  
Reserved  
LCDDR13  
LCDDR12  
LCDDR11  
LCDDR10  
Reserved  
LCDDR8  
LCDDR7  
LCDDR6  
LCDDR5  
Reserved  
LCDDR3  
LCDDR2  
LCDDR1  
LCDDR0  
Reserved  
Reserved  
Reserved  
Reserved  
LCDCCR  
LCDFRR  
LCDCRB  
LCDCRA  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
UDR0  
SEG324  
248  
248  
248  
248  
SEG323  
SEG322  
SEG321  
SEG320  
SEG319  
SEG318  
SEG317  
SEG316  
SEG315  
SEG314  
SEG313  
SEG312  
SEG311  
SEG310  
SEG309  
SEG308  
SEG307  
SEG306  
SEG305  
SEG304  
SEG303  
SEG302  
SEG301  
SEG300  
SEG224  
248  
248  
248  
248  
SEG223  
SEG222  
SEG221  
SEG220  
SEG219  
SEG218  
SEG217  
SEG216  
SEG215  
SEG214  
SEG213  
SEG212  
SEG211  
SEG210  
SEG209  
SEG208  
SEG207  
SEG206  
SEG205  
SEG204  
SEG203  
SEG202  
SEG201  
SEG200  
SEG124  
248  
248  
248  
248  
SEG123  
SEG122  
SEG121  
SEG120  
SEG119  
SEG118  
SEG117  
SEG116  
SEG115  
SEG114  
SEG113  
SEG112  
SEG111  
SEG110  
SEG109  
SEG108  
SEG107  
SEG106  
SEG105  
SEG104  
SEG103  
SEG102  
SEG101  
SEG100  
SEG024  
248  
248  
248  
248  
SEG023  
SEG022  
SEG021  
SEG020  
SEG019  
SEG018  
SEG017  
SEG016  
SEG015  
SEG014  
SEG013  
SEG012  
SEG011  
SEG010  
SEG09  
SEG008  
SEG007  
SEG006  
SEG005  
SEG004  
SEG003  
SEG002  
SEG001  
SEG000  
LCDDC2  
LCDDC1  
LCDDC0  
LCDMDT  
LCDCC3  
LCDCC2  
LCDCC1  
LCDCC0  
247  
245  
244  
243  
LCDPS2  
LCDPS1  
LCDPS0  
LCDCD2  
LCDCD1  
LCDCD0  
LCDCS  
LCD2B  
LCDMUX1  
LCDMUX0  
LCDPM2  
LCDPM1  
LCDPM0  
LCDEN  
LCDAB  
LCDIF  
LCDIE  
LCDBD  
LCDCCD  
LCDBL  
USART0 I/O Data Register  
190  
194  
194  
UBRRH0  
UBRRL0  
Reserved  
UCSR0C  
UCSR0B  
UCSR0A  
USART0 Baud Rate Register High  
USART0 Baud Rate Register Low  
UMSEL0  
TXCIE0  
TXC0  
UPM01  
UDRIE0  
UDRE0  
UPM00  
RXEN0  
FE0  
USBS0  
TXEN0  
DOR0  
UCSZ01  
UCSZ02  
UPE0  
UCSZ00  
RXB80  
U2X0  
UCPOL0  
TXB80  
MPCM0  
190  
190  
190  
RXCIE0  
RXC0  
6
ATmega169P Automotive  
7735B–AVR–12/07  
ATmega169P Automotive  
Address  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Page  
(0xBF)  
(0xBE)  
(0xBD)  
(0xBC)  
(0xBB)  
(0xBA)  
(0xB9)  
(0xB8)  
(0xB7)  
(0xB6)  
(0xB5)  
(0xB4)  
(0xB3)  
(0xB2)  
(0xB1)  
(0xB0)  
(0xAF)  
(0xAE)  
(0xAD)  
(0xAC)  
(0xAB)  
(0xAA)  
(0xA9)  
(0xA8)  
(0xA7)  
(0xA6)  
(0xA5)  
(0xA4)  
(0xA3)  
(0xA2)  
(0xA1)  
(0xA0)  
(0x9F)  
(0x9E)  
(0x9D)  
(0x9C)  
(0x9B)  
(0x9A)  
(0x99)  
(0x98)  
(0x97)  
(0x96)  
(0x95)  
(0x94)  
(0x93)  
(0x92)  
(0x91)  
(0x90)  
(0x8F)  
(0x8E)  
(0x8D)  
(0x8C)  
(0x8B)  
(0x8A)  
(0x89)  
(0x88)  
(0x87)  
(0x86)  
(0x85)  
(0x84)  
(0x83)  
(0x82)  
(0x81)  
(0x80)  
(0x7F)  
(0x7E)  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
USIDR  
USI Data Register  
207  
207  
208  
USISR  
USISIF  
USIOIF  
USIOIE  
USIPF  
USIDC  
USICNT3  
USICNT2  
USICNT1  
USICNT0  
USICR  
USISIE  
USIWM1  
USIWM0  
USICS1  
USICS0  
USICLK  
USITC  
Reserved  
ASSR  
AS2  
EXCLK  
TCN2UB  
OCR2UB  
TCR2UB  
156  
Reserved  
Reserved  
OCR2A  
Timer/Counter2 Output Compare Register A  
Timer/Counter2 (8-bit)  
155  
155  
TCNT2  
Reserved  
TCCR2A  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
OCR1BH  
OCR1BL  
OCR1AH  
OCR1AL  
ICR1H  
CS22  
CS21  
CS20  
FOC2A  
WGM20  
COM2A1  
COM2A0  
WGM21  
153  
Timer/Counter1 - Output Compare Register B High Byte  
Timer/Counter1 - Output Compare Register B Low Byte  
Timer/Counter1 - Output Compare Register A High Byte  
Timer/Counter1 - Output Compare Register A Low Byte  
Timer/Counter1 - Input Capture Register High Byte  
Timer/Counter1 - Input Capture Register Low Byte  
Timer/Counter1 - Counter Register High Byte  
132  
132  
132  
132  
133  
133  
132  
132  
ICR1L  
TCNT1H  
TCNT1L  
Reserved  
TCCR1C  
TCCR1B  
TCCR1A  
DIDR1  
Timer/Counter1 - Counter Register Low Byte  
FOC1A  
ICNC1  
COM1A1  
FOC1B  
ICES1  
COM1A0  
WGM12  
CS12  
131  
130  
128  
214  
231  
WGM13  
COM1B0  
CS11  
WGM11  
AIN1D  
ADC1D  
CS10  
WGM10  
AIN0D  
ADC0D  
COM1B1  
DIDR0  
ADC7D  
ADC6D  
ADC5D  
ADC4D  
ADC3D  
ADC2D  
7
7735B–AVR–12/07  
Address  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Page  
(0x7D)  
(0x7C)  
Reserved  
ADMUX  
ADCSRB  
ADCSRA  
ADCH  
MUX4  
MUX3  
REFS1  
REFS0  
ACME  
ADSC  
ADLAR  
MUX2  
ADTS2  
ADPS2  
MUX1  
ADTS1  
ADPS1  
MUX0  
ADTS0  
ADPS0  
227  
213, 231  
229  
(0x7B)  
(0x7A)  
ADEN  
ADATE  
ADIF  
ADIE  
(0x79)  
ADC Data Register High byte  
ADC Data Register Low byte  
230  
(0x78)  
ADCL  
230  
(0x77)  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
TIMSK2  
TIMSK1  
TIMSK0  
Reserved  
PCMSK1  
PCMSK0  
Reserved  
EICRA  
(0x76)  
(0x75)  
(0x74)  
(0x73)  
(0x72)  
(0x71)  
OCIE2A  
OCIE1A  
OCIE0A  
(0x70)  
TOIE2  
TOIE1  
TOIE0  
156  
133  
104  
(0x6F)  
ICIE1  
OCIE1B  
(0x6E)  
(0x6D)  
(0x6C)  
PCINT15  
PCINT14  
PCINT13  
PCINT12  
PCINT11  
PCINT10  
PCINT9  
PCINT1  
PCINT8  
PCINT0  
63  
64  
(0x6B)  
PCINT7  
PCINT6  
PCINT5  
PCINT4  
PCINT3  
PCINT2  
(0x6A)  
(0x69)  
ISC01  
ISC00  
62  
(0x68)  
Reserved  
Reserved  
OSCCAL  
Reserved  
PRR  
(0x67)  
(0x66)  
Oscillator Calibration Register  
38  
45  
(0x65)  
PRSPI  
PRADC  
(0x64)  
PRLCD  
PRTIM1  
PRUSART0  
(0x63)  
Reserved  
Reserved  
CLKPR  
(0x62)  
CLKPS3  
WDE  
V
(0x61)  
CLKPCE  
CLKPS2  
WDP2  
N
CLKPS1  
WDP1  
Z
CLKPS0  
WDP0  
C
38  
54  
13  
15  
15  
(0x60)  
WDTCR  
SREG  
I
WDCE  
S
0x3F (0x5F)  
0x3E (0x5E)  
0x3D (0x5D)  
0x3C (0x5C)  
0x3B (0x5B)  
0x3A (0x5A)  
0x39 (0x59)  
0x38 (0x58)  
0x37 (0x57)  
0x36 (0x56)  
0x35 (0x55)  
0x34 (0x54)  
0x33 (0x53)  
0x32 (0x52)  
0x31 (0x51)  
0x30 (0x50)  
0x2F (0x4F)  
0x2E (0x4E)  
0x2D (0x4D)  
0x2C (0x4C)  
0x2B (0x4B)  
0x2A (0x4A)  
0x29 (0x49)  
0x28 (0x48)  
0x27 (0x47)  
0x26 (0x46)  
0x25 (0x45)  
0x24 (0x44)  
0x23 (0x43)  
0x22 (0x42)  
0x21 (0x41)  
0x20 (0x40)  
0x1F (0x3F)  
0x1E (0x3E)  
0x1D (0x3D)  
0x1C (0x3C)  
T
H
SPH  
SP10  
SP2  
SP9  
SP1  
SP8  
SP0  
SPL  
SP7  
SP6  
SP5  
SP4  
SP3  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
SPMCSR  
Reserved  
MCUCR  
MCUSR  
SMCR  
SPMIE  
RWWSB  
RWWSRE  
BLBSET  
PGWRT  
PGERS  
SPMEN  
291  
PUD  
JTRF  
JTD  
IVSEL  
EXTRF  
SM0  
IVCE  
PORF  
SE  
60, 88, 276  
WDRF  
SM2  
BORF  
SM1  
276  
45  
Reserved  
OCDR  
IDRD/OCDR7  
OCDR6  
ACBG  
OCDR5  
ACO  
OCDR4  
ACI  
OCDR3  
ACIE  
OCDR2  
ACIC  
OCDR1  
ACIS1  
OCDR0  
ACIS0  
255  
213  
ACSR  
ACD  
Reserved  
SPDR  
SPI Data Register  
167  
166  
165  
29  
SPSR  
SPIF  
SPIE  
WCOL  
SPE  
SPI2X  
SPR0  
SPCR  
DORD  
MSTR  
CPOL  
CPHA  
SPR1  
GPIOR2  
GPIOR1  
Reserved  
Reserved  
OCR0A  
TCNT0  
General Purpose I/O Register 2  
General Purpose I/O Register 1  
29  
Timer/Counter0 Output Compare Register A  
Timer/Counter0 (8 Bit)  
104  
104  
Reserved  
TCCR0A  
GTCCR  
EEARH  
EEARL  
FOC0A  
TSM  
CS02  
WGM00  
COM0A1  
COM0A0  
WGM01  
CS01  
PSR2  
CS00  
PSR10  
EEAR8  
102  
137, 157  
27  
EEPROM Address Register Low Byte  
EEPROM Data Register  
27  
EEDR  
27  
EECR  
EERIE  
EEMWE  
EEWE  
EERE  
27  
GPIOR0  
EIMSK  
General Purpose I/O Register 0  
29  
PCIE1  
PCIF1  
PCIE0  
PCIF0  
INT0  
62  
EIFR  
INTF0  
63  
8
ATmega169P Automotive  
7735B–AVR–12/07  
ATmega169P Automotive  
Address  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Page  
0x1B (0x3B)  
0x1A (0x3A)  
0x19 (0x39)  
0x18 (0x38)  
0x17 (0x37)  
0x16 (0x36)  
0x15 (0x35)  
0x14 (0x34)  
0x13 (0x33)  
0x12 (0x32)  
0x11 (0x31)  
0x10 (0x30)  
0x0F (0x2F)  
0x0E (0x2E)  
0x0D (0x2D)  
0x0C (0x2C)  
0x0B (0x2B)  
0x0A (0x2A)  
0x09 (0x29)  
0x08 (0x28)  
0x07 (0x27)  
0x06 (0x26)  
0x05 (0x25)  
0x04 (0x24)  
0x03 (0x23)  
0x02 (0x22)  
0x01 (0x21)  
0x00 (0x20)  
Reserved  
Reserved  
Reserved  
Reserved  
TIFR2  
OCF2A  
OCF1A  
OCF0A  
PORTG1  
DDG1  
PING1  
PORTF1  
DDF1  
TOV2  
TOV1  
TOV0  
PORTG0  
DDG0  
PING0  
PORTF0  
DDF0  
PINF0  
PORTE0  
DDE0  
PINE0  
PORTD0  
DDD0  
PIND0  
PORTC0  
DDC0  
PINC0  
PORTB0  
DDB0  
PINB0  
PORTA0  
DDA0  
PINA0  
156  
134  
105  
90  
90  
90  
90  
90  
90  
89  
89  
90  
89  
89  
89  
89  
89  
89  
88  
88  
88  
88  
88  
88  
TIFR1  
ICF1  
OCF1B  
TIFR0  
PORTG  
DDRG  
PING  
PORTG5  
DDG5  
PING5  
PORTF5  
DDF5  
PINF5  
PORTE5  
DDE5  
PINE5  
PORTD5  
DDD5  
PIND5  
PORTC5  
DDC5  
PINC5  
PORTB5  
DDB5  
PINB5  
PORTA5  
DDA5  
PINA5  
PORTG4  
DDG4  
PING4  
PORTF4  
DDF4  
PINF4  
PORTE4  
DDE4  
PINE4  
PORTD4  
DDD4  
PIND4  
PORTC4  
DDC4  
PINC4  
PORTB4  
DDB4  
PINB4  
PORTA4  
DDA4  
PINA4  
PORTG3  
DDG3  
PING3  
PORTF3  
DDF3  
PINF3  
PORTE3  
DDE3  
PINE3  
PORTD3  
DDD3  
PIND3  
PORTC3  
DDC3  
PINC3  
PORTB3  
DDB3  
PINB3  
PORTA3  
DDA3  
PINA3  
PORTG2  
DDG2  
PING2  
PORTF2  
DDF2  
PINF2  
PORTE2  
DDE2  
PINE2  
PORTD2  
DDD2  
PIND2  
PORTC2  
DDC2  
PINC2  
PORTB2  
DDB2  
PINB2  
PORTA2  
DDA2  
PINA2  
PORTF  
DDRF  
PORTF7  
DDF7  
PINF7  
PORTE7  
DDE7  
PINE7  
PORTD7  
DDD7  
PIND7  
PORTC7  
DDC7  
PINC7  
PORTB7  
DDB7  
PINB7  
PORTA7  
DDA7  
PINA7  
PORTF6  
DDF6  
PINF6  
PORTE6  
DDE6  
PINE6  
PORTD6  
DDD6  
PIND6  
PORTC6  
DDC6  
PINC6  
PORTB6  
DDB6  
PINB6  
PORTA6  
DDA6  
PINA6  
PINF  
PINF1  
PORTE1  
DDE1  
PINE1  
PORTD1  
DDD1  
PIND1  
PORTC1  
DDC1  
PINC1  
PORTB1  
DDB1  
PINB1  
PORTA1  
DDA1  
PINA1  
PORTE  
DDRE  
PINE  
PORTD  
DDRD  
PIND  
PORTC  
DDRC  
PINC  
PORTB  
DDRB  
PINB  
PORTA  
DDRA  
PINA  
Note:  
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses  
should never be written.  
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these  
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.  
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI  
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The  
CBI and SBI instructions work with registers 0x00 to 0x1F only.  
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O  
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATmega169P is a com-  
plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN  
and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD  
instructions can be used.  
9
7735B–AVR–12/07  
4. Ordering Information  
Speed (MHz)(2)  
Power Supply  
Ordering Code  
Package(2)  
Operation Range  
Automotive  
(-40°C to 85°C)  
16  
2.7 - 5.5V  
ATmega169P-15AT  
MD  
Notes: 1. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also  
Halide free and fully Green.  
2. For Speed vs. VCC, see Figure 27-1 on page 327.  
Package Type  
MD  
64-Lead, Thin (1.0 mm) Profile Plastic Gull Wing Quad Flat Package (TQFP)  
10  
ATmega169P Automotive  
7735B–AVR–12/07  
 
ATmega169P Automotive  
5. Packaging Information  
5.1  
64A  
11  
7735B–AVR–12/07  
6. Errata  
6.1  
ATmega169P Rev. G  
No known errata.  
6.2  
ATmega169P Rev. A to F  
Not sampled.  
12  
ATmega169P Automotive  
7735B–AVR–12/07  
ATmega169P Automotive  
7. Datasheet Revision History  
Please note that the referring page numbers in this section are referring to this document. The  
referring revision in this section are referring to the document revision.  
7.1  
7.2  
7735B  
7735A  
1. Remove ADC differential mode (Not validated for Automotive grade).  
2. Update to electrical characteristics after product characterization.  
New document number for automotive  
1.  
Datasheet adapted to the Automotive grade (+85 ; -40°C) derived from ATmega169  
industrial version.  
Automotive quality grade paragraph added.  
DC parameters changed to reflect actual silicon characterization results.  
Part numbering adapted with automotive -40°C; +85°C variants.  
13  
7735B–AVR–12/07  
Atmel Corporation  
Atmel Operations  
2325 Orchard Parkway  
San Jose, CA 95131, USA  
Tel: 1(408) 441-0311  
Fax: 1(408) 487-2600  
Memory  
RF/Automotive  
Theresienstrasse 2  
Postfach 3535  
2325 Orchard Parkway  
San Jose, CA 95131, USA  
Tel: 1(408) 441-0311  
Fax: 1(408) 436-4314  
74025 Heilbronn, Germany  
Tel: (49) 71-31-67-0  
Fax: (49) 71-31-67-2340  
Regional Headquarters  
Microcontrollers  
2325 Orchard Parkway  
San Jose, CA 95131, USA  
Tel: 1(408) 441-0311  
Fax: 1(408) 436-4314  
1150 East Cheyenne Mtn. Blvd.  
Colorado Springs, CO 80906, USA  
Tel: 1(719) 576-3300  
Europe  
Atmel Sarl  
Route des Arsenaux 41  
Case Postale 80  
CH-1705 Fribourg  
Switzerland  
Fax: 1(719) 540-1759  
Biometrics/Imaging/Hi-Rel MPU/  
High Speed Converters/RF Datacom  
Avenue de Rochepleine  
BP 123  
38521 Saint-Egreve Cedex, France  
Tel: (33) 4-76-58-30-00  
Fax: (33) 4-76-58-34-80  
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BP 70602  
Tel: (41) 26-426-5555  
Fax: (41) 26-426-5500  
44306 Nantes Cedex 3, France  
Tel: (33) 2-40-18-18-18  
Fax: (33) 2-40-18-19-60  
Asia  
Room 1219  
ASIC/ASSP/Smart Cards  
Zone Industrielle  
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Tel: (852) 2721-9778  
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Japan  
9F, Tonetsu Shinkawa Bldg.  
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Japan  
Fax: 1(719) 540-1759  
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Printed on recycled paper.  
7735B–AVR–12/07  
xM  

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