ATSAM9793 [ATMEL]
Speech Synthesizer, PQFP100, PLASTIC, QFP-100;
| 型号： | ATSAM9793 |
| 厂家： | 
ATMEL |
| 描述： | Speech Synthesizer, PQFP100, PLASTIC, QFP-100 PC CD PC波表合成 VCD卡拉OK 乐器 商用集成电路 |
| 文件： | 总12页 (文件大小：79K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Synthesizer, Reverb, Chorus on a Single Chip
• No External ROM or RAM
• Single-chip All-in-one Design, Only Requires External DAC
– MIDI Control Processor, Serial and Parallel Interface
– Synthesis
– Compatible Effects: Reverb and Chorus
– Programmable Spatial Effects or Four-channel Surround(1)
– 3DMIDI™: Four-speaker MIDI(1)
– 4-band Stereo Equalizer
• State-of-the-Art Synthesis for Best Quality/Price Products
– 38-voice Polyphony + Effects
Sound
– On-chip Wavetable Data, Firmware, RAM Delay Lines
• Synthesizer Chipset: ATSAM9793 + DAC
• Hardware-programmable DAC Mode
– I2S 16 to 20 Bits
Synthesis
– Japanese 16 Bits
ATSAM9793
Single-chip
Synthesizer
with Effects,
Parallel
• Typical Applications: Cost-sensitive PC Wavetable Synthesis/VCD Karaoke/Musical
Instruments
• 100-lead PQFP Package: Easy Mounting
• Ideal for Battery Operation
– Low Power
– Power-down Mode
– Wide Supply Voltage Range: 2.45V to 2.95V Core, 3V to 5.5V Periphery
Note:
Four-channel surround and 3DMIDI require additional DAC.
Description
Interface
The ATSAM9793 provides a single-chip, low-cost MIDI sound system. Equipped with
a parallel MIDI input, it provides state-of-the-art sound synthesis together with a range
of compatible effects. Its low power consumption makes it ideal for battery-powered
applications such as portable Karaoke or VCD Karaoke systems. It can also be used
for cost-sensitive PC-based wavetable synthesis applications.
Rev. 1717C-DRMSD–11/02
Typical
Figure 1. Typical Hardware Configuration
Hardware
Configuration
MIDI IN/OUT
Audio
Out
Stereo
DAC
ATSAM9793
MPU-401
(Parallel Port)
Pin Description
Pins by Function
Table 1. Power Supply Group
Pin Name
Pin Number
Type
Function
GND
5, 7, 14, 18, 19, 21,
48, 54, 58, 67, 84, 96
PWR
Digital Ground
All pins should be connected to a ground plane.
VCC
VC3
6, 16, 46, 57,
76, 85, 94
PWR
PWR
Power Supply, 3V to 5.5V
All pins should be connected to a VCC plane.
27, 52, 56, 80, 86
Core Power Supply, 2.45V to 2.95V.
All pins should be connected to nominal 2.7V.
Table 2. Serial MIDI, Parallel MIDI (MPU-401)
Pin Name
Pin Number
Type
Function
MIDI_IN
98
IN
Serial TTL MIDI_ IN. Connected to the built-in synthesizer at power-up or
after MPU reset. Connected to the D[7:0] bus (read mode) when MPU
switched to UART mode.
MIDI_OUT
D[7:0]
45
OUT
I/O
Serial TTL MIDI_OUT, not used at power-up or after MPU reset. Connected
to the D[7:0] bus (write mode) when MPU switched to UART mode.
68, 70, 73, 92, 93,
95, 97, 100
8-bit bi-directional bus under control of CS, RD, WR.
A0
40
49
51
IN
IN
IN
Select data(0) or control(1) for write, data(0) or status(1) for read.
Chip select, active low.
CS
RD
Read, active low. When CS and RD are low, data (A0 = 0) or status (A0 = 1)
is read on D[7:0]. Read data is acknowledged on the rising edge of WR.
WR
IRQ
47
43
IN
Write, active low. When CS and WR are low, data (A0 = 0 or control (A0 = 1)
are written from the D[7:0] bus to the ATSAM9793 on the rising edge of WR.
TS OUT
A rising edge indicates that a MIDI byte is available for read on D[7:0].
Acknowledged by reading the byte. This pin is floated until the ATSAM9793
is switched to MPU-401 UART mode.
Note:
Pin names exhibiting an overbar (CS for example) indicate that the signal is active low.
2
ATSAM9793
1717C–DRMSD–11/02
ATSAM9793
Table 3. Digital Audio Group
Pin Name
CLBD
Pin Number
Type
OUT
OUT
OUT
OUT
IN
Function
1
11
9
Digital audio bit clock
Digital audio left/right select
Digital audio main stereo output
WSBD
DABD0
DABD1
DACSEL
10
8
Auxiliary digital stereo output. Surround or 3DMIDI output.
DAC type : 0 = I2S 16 to 20 bits, 1 = Japanese 16 bits
Table 4. Miscellaneous Group
Pin Name
Pin Number
Type
Function
X1
X2
89, 88
–
9.6 MHz crystal connection. An external 9.6 MHz clock can also be used on
X1 (2.7V input). X2 cannot be used to drive external circuits, use CKOUT
instead.
CKOUT
2
OUT
Buffered X2 output, can be used to drive external DAC master clock
(256 x Fs).
LFT
87
90
–
PLL external RC network.
RESET
IN
Reset input, active low. This is a Schmitt trigger input, allowing direct
connection of an RC network.
PDWN
91
IN
Power-down, active low. When power-down is active, then all output pins will
be floated. The crystal oscillator will be stopped. To exit from power-down,
PDWN should be high and RESET applied.
TEST[4:0]
RUN
17, 20, 22, 23, 55
99
IN
Test pins. Should be grounded.
OUT
When high, indicates that the synthesizer is up and running.
3
1717C–DRMSD–11/02
Pinout
Figure 2. ATSAM9793 in 100-lead TQFP Package
CLBD
CKOUT
NC
1
2
3
4
5
6
7
8
9
75 NC
74 NC
73 D2
72 NC
71 NC
70 D1
69 NC
68 D0
67 GND
66 NC
65 NC
64 NC
63 NC
62 NC
61 NC
60 NC
59 NC
58 GND
57 VCC
56 VC3
55 TEST4
54 GND
53 NC
52 VC3
51 RD
NC
GND
VCC
GND
DACSEL
DABD0
DABD1 10
WSBD 11
NC 12
NC 13
GND 14
NC 15
VCC 16
TEST0 17
GND 18
GND 19
TEST1 20
GND 21
TEST2 22
TEST3 23
NC 24
NC 25
4
ATSAM9793
1717C–DRMSD–11/02
ATSAM9793
Absolute Maximum
Ratings
Table 5. Absolute Maximum Ratings
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
condtions for extended periods may affect device
reliability.
Ambient Temperature (Power applied) ............ -40°C to + 85°C
Storage Temperature.......................................-65°C to + 150°C
Voltage on any pin (except X1)....................-0.5V to VCC + 0.5V
Voltage on X1 pin..........................................-0.5 to VC3 + 0.25V
V
CC Supply Voltage............................................-0.5V to + 6.5V
C3 Supply Voltage..............................................-0.5V to +4.5V
V
Maximum IOL per I/O pin ..................................................10mA
Recommended
Operating Conditions
Table 6. Recommended Operating Conditions
Symbol
VCC
Parameter/Condition
Supply Voltage(1)
Min
3
Typ
3.3/5.0
2.7
Max
5.5
Unit
V
VC3
Supply Voltage
2.45
0
2.95
70
V
TA
Operating Ambient Temperature
°C
Note:
1. When using 3.3V VCC supply in a 5V environment, care must be taken that pin voltage does not exceed VCC + 0.5V.
Pin X1 is powered by VC3 input. If X1 is driven by a 5V device, then a minimum series resistor is required (typ. 330ꢀ).
DC
Characteristics
Table 7. DC Characteristics (TA = 25°C, VC3 = 2.7V ± 10%)
Symbol
Parameter/Condition
VCC
Min
Typ
Max
Unit
3.3
5.0
-0.5
-0.5
1.0
1.7
V
V
VIL
Low-level Input Voltage
3.3
5.0
2.3
3.3
VCC + 0.5
V
V
VIH
VOL
VOH
ICC
High-level Input Voltage
VCC + 0.5
3.3
5.0
0.45
0.45
V
V
Low-level Output Voltage (IOL = -3.2 mA)
High-level Output Voltage (IOH = 0.8 mA)
3.3
5.0
2.8
4.5
V
V
3.3
5.0
50
10
70
15
mA
mA
Power Supply Current (Crystal Freq. = 9.6 MHz)
Power-down Supply Current
70
100
µA
5
1717C–DRMSD–11/02
Timings
Parallel MPU-401
Interface
Figure 3. MPU Interface Read Cycle
A0
tAVCS
CS
tRDHCSH
tPRD
tCSLRDL
RD
tRDLDV
tDRH
D[7:0]
IRQ
Figure 4. MPU Interface Write Cycle
A0
tAVCS
CS
tWRHCSH
tCSLWRL
tPWR
WR
tDWS
tDWH
D[7:0]
6
ATSAM9793
1717C–DRMSD–11/02
ATSAM9793
Table 8. Timing Parameters
Symbol
tAVCS
Parameter
Min
0
Typ
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to Chip Select Low
Chip Select Low to RD Low
RD High to CS High
RD Pulse Width
tCSLRDL
tRDHCSH
tPRD
5
5
50
tRDLDV
tDRH
Data Out Valid from RD
Data Out Hold from RD
Chip Select Low to WR Low
WR High to CS High
WR Pulse Width
20
10
5
5
tCSLRWRL
tWRHCSH
tPWR
5
50
10
0
tDWS
Write Data Setup Time
Write Data Hold Time
tDWH
Digital Audio
Figure 5. Digital Audio Timing
tCW
tCW
tCLBD
WSBD
CLBD
tSOD
tSOD
DABD0
DABD1
Table 9. Timing Parameters
Symbol
tCW
Parameter
Min
200
200
Typ
Max
Unit
ns
CLBD Rising to WSBD Change
DABDx Valid before/after CLBD Rising
CLBD Cycle Time
tSOD
ns
tCLBD
416.67
ns
7
1717C–DRMSD–11/02
Digital Audio
Frame
Figure 6. Digital Audio Frame Format
WSBD
(I2S) (1)
WSBD(1)
(Japanese)
CLBD
DABD0
DABD1
X
X
X
X
X
X
X
X
X
X X
X
MSB
MSB
LSB
(20 bits)
LSB
(16 bits)
LSB
(18 bits)
Note:
1. Selection of I2S or Japanese format is made via pin DACSEL.
8
ATSAM9793
1717C–DRMSD–11/02
ATSAM9793
Reset and
Power-down
During power-up, the RESET input should be held low until the crystal oscillator and PLL are
stabilized, which can take about 20 ms. A typical RC/diode power-up network can be used.
After RESET, the ATSAM9793 enters an initialization routine. It will take around 50 ms before
a MIDI IN or MPU message can be processed.
If PDWN is asserted low, then all I/Os and outputs will be floated and the crystal oscillator and
PLL will be stopped. The chip enters a deep power-down sleep mode. To exit power-down,
PDWN has to be asserted high, then RESET applied.
Recommended
Board Layout
As for all HCMOS high-integration ICs, some rules of board layout should be followed for reli-
able operation:
GND, VCC, VC3
Distribution,
decouplings
All GND, VCC and VC3 pins should be connected. GND and VCC planes are strongly recom-
mended below the ATSAM9793. The board GND and VCC distribution should be in grid form.
For 5V VCC operation, if 2.7V is not available, then VC3 can be connected to VCC by three
1N4148 diodes in series.
Recommended VCC decoupling is 0.1 µF at each corner of the IC with an additional 10 µF
decoupling close to the crystal. VC3 requires a single 0.1 uF decoupling close to the IC.
Crystal, LFT
The paths between the crystal, the crystal compensation capacitors, the LFT filter R-C-R and
the ATSAM9793 should be short and shielded. The ground return from the compensation
capacitors and LFT filter should be the GND plane from ATSAM9793.
Analog Section
A specific AGND ground plane should be provided, which connects by a single trace to the
GND ground. No digital signals should cross the AGND plane. Refer to the codec vendor rec-
ommended layout for correct implementation of the analog section.
9
1717C–DRMSD–11/02
Recommended
Crystal
Figure 7. Recommended Crystal Compensation and LFT Filter
C1
X1
Compensation
and LFT Filter
22 pF
X1
9.6 MHz
C4
22 pF
X2
LFT
R1
C2
100Ω
2.2 nF
PDWN
C3
10 nF
10
ATSAM9793
1717C–DRMSD–11/02
ATSAM9793
Mechanical
Dimensions
Figure 8. 100-lead Plastic Quad Flat Pack
Table 10. Package Dimensions (in mm)
Dimension
Min
Typ
Max
A
A1
A2
D
3.40
0.25
2.55
2.8
3.05
23.90
20.00
17.90
14.00
0.88
D1
E
E1
L
0.65
0.22
1.03
0.38
P
0.65
B
11
1717C–DRMSD–11/02
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1717C–DRMSD–11/02
0M
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