ATTINY4-TSFR [ATMEL]
RISC Microcontroller, CMOS,;
| 型号： | ATTINY4-TSFR |
| 厂家： | 
ATMEL |
| 描述： | RISC Microcontroller, CMOS, 微控制器 |
| 文件： | 总17页 (文件大小：333K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Atmel 8-bit AVR Microcontroller with 512/1024 Bytes In-System
Programmable Flash
ATtiny4 / ATtiny5 / ATtiny9 / ATiny10
DATASHEET SUMMARY
Introduction
The Atmel® ATtiny4/5/9/10 is a low-power CMOS 8-bit microcontroller based
®
on the AVR enhanced RISC architecture. By executing powerful
instructions in a single clock cycle, the ATtiny4/5/9/10 achieves throughputs
close to 1 MIPS per MHz. This empowers system designer to optimize the
device for power consumption versus processing speed.
Feature
•
•
High Performance, Low Power AVR® 8-Bit Microcontroller
Advanced RISC Architecture
–
–
–
–
–
54 Powerful Instructions
Most Single Clock Cycle Execution
16 x 8 General Purpose Working Registers
Fully Static Operation
Up to 12 MIPS Throughput at 12 MHz
•
•
Non-volatile Program and Data Memories
–
512/1024 Bytes of In-System Programmable Flash Program
Memory
–
–
–
32 Bytes Internal SRAM
Flash Write/Erase Cycles: 10,000
Data Retention: 20 Years at 85°C / 100 Years at 25°C
Peripheral Features
–
QTouch® Library Support for Capacitive Touch Sensing (1
Channel)
–
One 16-bit Timer/Counter with Prescaler and Two PWM
Channels
–
–
–
Programmable Watchdog Timer with Separate On-chip Oscillator
4-channel, 8-bit Analog to Digital Converter (ATtiny5/10, only)
On-chip Analog Comparator
•
Special Microcontroller Features
In-System Programmable (at 5V, only)
–
Atmel-8127H-ATiny4/ ATiny5 /ATiny9/ ATiny10_Datasheet_Summary-11/2016
–
–
–
–
–
External and Internal Interrupt Sources
Low Power Idle, ADC Noise Reduction, and Power-down Modes
Enhanced Power-on Reset Circuit
Programmable Supply Voltage Level Monitor with Interrupt and Reset
Internal Calibrated Oscillator
•
I/O and Packages
–
–
Four Programmable I/O Lines
6-pin SOT and 8-pad UDFN
•
•
•
Operating Voltage:
1.8 - 5.5V
Programming Voltage:
5V
Speed Grade:
–
–
–
–
–
0 - 4 MHz @ 1.8 - 5.5V
0 - 8 MHz @ 2.7 - 5.5V
0 - 12 MHz @ 4.5 - 5.5V
•
•
Industrial and Extended Temperature Ranges
Low Power Consumption
–
Active Mode:
•
200μA at 1MHz and 1.8V
Idle Mode:
•
25μA at 1MHz and 1.8V
–
Power-down Mode:
•
<0.1μA at 1.8V
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Table of Contents
Introduction......................................................................................................................1
Feature............................................................................................................................ 1
1. Pin Configurations..................................................................................................... 4
1.1. Pin Descriptions............................................................................................................................4
2. Ordering Information..................................................................................................5
2.1. ATtiny4..........................................................................................................................................5
2.2. ATtiny5..........................................................................................................................................6
2.3. ATtiny9..........................................................................................................................................7
2.4. ATtiny10........................................................................................................................................8
3. Overview....................................................................................................................9
3.1. Block Diagram..............................................................................................................................9
3.2. Comparison of ATtiny4, ATtiny5, ATtiny9 and ATtiny10............................................................. 10
4. General Information................................................................................................. 11
4.1. Resources...................................................................................................................................11
4.2. Data Retention............................................................................................................................11
4.3. About Code Examples................................................................................................................11
4.4. Capacitive Touch Sensing.......................................................................................................... 11
5. Packaging Information.............................................................................................12
5.1. 6ST1...........................................................................................................................................12
5.2. 8MA4..........................................................................................................................................13
6. Errata.......................................................................................................................14
6.1. ATtiny4........................................................................................................................................14
6.2. ATtiny5........................................................................................................................................14
6.3. ATtiny9........................................................................................................................................15
6.4. ATtiny10......................................................................................................................................16
1.
Pin Configurations
Figure 1-1.ꢀPinout of ATtiny4/5/9/10
SOT-23
(PCINT0/TPIDATA/OC0A/ADC0/AIN0) PB0
GND
1
2
3
6
5
4
PB3 (RESET/PCINT3/ADC3)
VCC
(PCINT1/TPICLK/CLKI/ICP0/OC0B/ADC1/AIN1) PB1
PB2 (T0/CLKO/PCINT2/INT0/ADC2)
UDFN
(PCINT1/TPICLK/CLKI/ICP0/OC0B/ADC1/AIN1) PB1
1
2
3
4
8
7
6
5
PB2 (T0/CLKO/PCINT2/INT0/ADC2)
VCC
NC
NC
PB3 (RESET/PCINT3/ADC3)
PB0 (AIN0/ADC0/OC0A/TPIDATA/PCINT0)
GND
Power
Clock
Digital
GND
Analog
NC
1.1.
Pin Descriptions
1.1.1.
VCC
Digital supply voltage.
1.1.2.
1.1.3.
GND
Ground.
Port B (PB[3:0])
This is a 4-bit, bi-directional I/O port with internal pull-up resistors, individually selectable for each bit. The
output buffers have symmetrical drive characteristics, with both high sink and source capability. As inputs,
the port pins that are externally pulled low will source current if pull-up resistors are activated. Port pins
are tri-stated when a reset condition becomes active, even if the clock is not running.
1.1.4.
RESET
Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if
the clock is not running and provided the reset pin has not been disabled. The minimum pulse length is
given in System and Reset Characteristics of Electrical Characteristics. Shorter pulses are not
guaranteed to generate a reset.
The reset pin can also be used as a (weak) I/O pin.
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2.
Ordering Information
2.1.
ATtiny4
Supply Voltage
Speed (1)
Temperature
Package (2)
Ordering Code (3)
ATTINY4-TSUR(5)
ATTINY4-TSHR(6)(7)
1.8 – 5.5V
12MHz
6ST1
Industrial
(-40°C to 85°C) (4)
8MA4
6ST1
ATTINY4-MAHR (7)
10MHz
ATTINY4-TSFR(5)
Extended
ATTINY4-TS8R (6)(7)
(-40°C to 125°C) (8)
Note:ꢀ
1. For speed vs. supply voltage, see section Speed.
2. All packages are Pb-free, halide-free and fully green and they comply with the European directive
for Restriction of Hazardous Substances (RoHS). NiPdAu finish.
3. Tape and reel.
4. Can also be supplied in wafer form. Contact your local sales office for ordering information and
minimum quantities.
5. Marking details:
–
–
Top mark 1st line: ddddTY
Top mark 2nd line: wwxxx
dddd= device, special code
T= Type
Y= Year last digit
ww= calendar workweek
xxx = trace code
6. Not recommended for new designs.TPUBSTINY-216
7. Top/bottom markings:
–
–
Top: T4x, where x = die revision
Bottom: zHzzz or z8zzz, where H = (-40°C to 85°C), and 8 = (-40°C to 125°C)
8. For typical and Electrical characteristics for this device please consult Appendix A, ATtiny4/5/9/10
Specification at 125°C.
Table 2-1.ꢀPackage Type
6ST1
8MA4
6-lead, 2.90 x 1.60 mm Plastic Small Outline Package (SOT23)
8-pad, 2 x 2 x 0.6 mm Plastic Ultra Thin Dual Flat No Lead (UDFN)
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2.2.
ATtiny5
Supply Voltage
Speed (1)
Temperature
Package (2)
Ordering Code (3)
ATTINY5-TSUR(5)
ATTINY5-TSHR(6)(7)
1.8 – 5.5V
12MHz
6ST1
Industrial
(-40°C to 85°C) (4)
8MA4
6ST1
ATTINY5-MAHR (7)
10MHz
ATTINY5-TSFR(5)
Extended
ATTINY5-TS8R (6)(7)
(-40°C to 125°C) (8)
Note:ꢀ
1. For speed vs. supply voltage, see section Speed.
2. All packages are Pb-free, halide-free and fully green and they comply with the European directive
for Restriction of Hazardous Substances (RoHS). NiPdAu finish.
3. Tape and reel.
4. Can also be supplied in wafer form. Contact your local sales office for ordering information and
minimum quantities.
5. Marking details:
–
–
Top mark 1st line: ddddTY
Top mark 2nd line: wwxxx
dddd= device, special code
T= Type
Y= Year last digit
ww= calendar workweek
xxx = trace code
6. Not recommended for new designs.TPUBSTINY-216
7. Top/bottomside markings:
–
–
Top: T5x, where x = die revision
Bottom: zHzzz or z8zzz, where H = (-40°C to 85°C), and 8 = (-40°C to 125°C)
8. For typical and Electrical characteristics for this device please consult Appendix A, ATtiny4/5/9/10
Specification at 125°C.
Table 2-2.ꢀPackage Type
6ST1
8MA4
6-lead, 2.90 x 1.60 mm Plastic Small Outline Package (SOT23)
8-pad, 2 x 2 x 0.6 mm Plastic Ultra Thin Dual Flat No Lead (UDFN)
Atmel ATtiny4 / ATtiny5 / ATtiny9 / ATiny10 [DATASHEET]
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2.3.
ATtiny9
Supply Voltage
Speed (1)
Temperature
Package (2)
Ordering Code (3)
ATTINY9-TSUR(5)
ATTINY9-TSHR(6)(7)
1.8 – 5.5V
12MHz
6ST1
Industrial
(-40°C to 85°C) (4)
8MA4
6ST1
ATTINY9-MAHR (7)
10MHz
ATTINY9-TSFR(5)
Extended
ATTINY9-TS8R (6)(7)
(-40°C to 125°C) (8)
Note:ꢀ
1. For speed vs. supply voltage, see section Speed.
2. All packages are Pb-free, halide-free and fully green and they comply with the European directive
for Restriction of Hazardous Substances (RoHS). NiPdAu finish.
3. Tape and reel.
4. Can also be supplied in wafer form. Contact your local sales office for ordering information and
minimum quantities.
5. Marking details:
–
–
Top mark 1st line: ddddTY
Top mark 2nd line: wwxxx
dddd= device, special code
T= Type
Y= Year last digit
ww= calendar workweek
xxx = trace code
6. Not recommended for new designs.TPUBSTINY-216
7. Top/bottomside markings:
–
–
Top: T9x, where x = die revision
Bottom: zHzzz or z8zzz, where H = (-40°C to 85°C), and 8 = (-40°C to 125°C)
8. For typical and Electrical characteristics for this device please consult Appendix A, ATtiny4/5/9/10
Specification at 125°C.
Table 2-3.ꢀPackage Type
6ST1
8MA4
6-lead, 2.90 x 1.60 mm Plastic Small Outline Package (SOT23)
8-pad, 2 x 2 x 0.6 mm Plastic Ultra Thin Dual Flat No Lead (UDFN)
Atmel ATtiny4 / ATtiny5 / ATtiny9 / ATiny10 [DATASHEET]
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2.4.
ATtiny10
Supply Voltage
Speed (1)
Temperature
Package (2)
Ordering Code (3)
ATTINY10-TSUR(5)
ATTINY10-TSHR(6)(7)
1.8 – 5.5V
12MHz
6ST1
Industrial
(-40°C to 85°C) (4)
8MA4
6ST1
ATTINY10-MAHR (7)
10MHz
ATTINY10-TSFR(5)
Extended
ATTINY10-TS8R (6)(7)
(-40°C to 125°C) (8)
Note:ꢀ
1. For speed vs. supply voltage, see section Speed.
2. All packages are Pb-free, halide-free and fully green and they comply with the European directive
for Restriction of Hazardous Substances (RoHS). NiPdAu finish.
3. Tape and reel.
4. Can also be supplied in wafer form. Contact your local sales office for ordering information and
minimum quantities.
5. Marking details:
–
–
Top mark 1st line: ddddTY
Top mark 2nd line: wwxxx
dddd= device, special code
T= Type
Y= Year last digit
ww= calendar workweek
xxx = trace code
6. Not recommended for new designs.TPUBSTINY-216
7. Top/bottomside markings:
–
–
Top: T10x, where x = die revision
Bottom: zHzzz or z8zzz, where H = (-40°C to 85°C), and 8 = (-40°C to 125°C)
8. For typical and Electrical characteristics for this device please consult Appendix A, ATtiny4/5/9/10
Specification at 125°C.
Table 2-4.ꢀPackage Type
6ST1
8MA4
6-lead, 2.90 x 1.60 mm Plastic Small Outline Package (SOT23)
8-pad, 2 x 2 x 0.6 mm Plastic Ultra Thin Dual Flat No Lead (UDFN)
Atmel ATtiny4 / ATtiny5 / ATtiny9 / ATiny10 [DATASHEET]
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3.
Overview
This device is low-power CMOS 8-bit microcontrollers based on the compact AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the device achieve throughputs
approaching 1 MIPS per MHz, allowing the system designer to optimize power consumption versus
processing speed.
3.1.
Block Diagram
Figure 3-1.ꢀBlock Diagram
SRAM
FLASH
CPU
Clock generation
8MHz Calib Osc
Power
management
and clock
control
I/O
PB[3:0]
External clock
PORTS
128 kHz Internal Osc
PCINT[3:0]
INT0
D
A
T
A
B
U
S
Interrupt
ADC
Vcc
Watchdog
Timer
ADC[7:0]
Vcc
Power
Supervision
POR & RESET
RESET
GND
AIN0
Internal
AIN1
ACO
AC
Reference
ADCMUX
OC0A/B
T0
ICP0
TC 0
(16-bit)
3.1.1.
Description
The AVR core combines a rich instruction set with 16 general purpose working registers and system
registers. All registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture
is compact and code efficient while achieving throughputs up to ten times faster than conventional CISC
microcontrollers.
This device provides the following features: 512/1024 byte of In-System Programmable Flash, 32 bytes of
SRAM, four general purpose I/O lines, 16 general purpose working registers, a 16-bit timer/counter with
two PWM channels, internal and external interrupts, a programmable watchdog timer with internal
oscillator, an internal calibrated oscillator, and four software selectable power saving modes. ATtiny5/10
are also equipped with a four-channel and 8-bit Analog to Digital Converter (ADC).
Idle mode stops the CPU while allowing the SRAM, timer/counter, ADC (ATtiny5/10, only), analog
comparator, and interrupt system to continue functioning. ADC Noise Reduction mode minimizes
switching noise during ADC conversions by stopping the CPU and all I/O modules except the ADC. In
Power-down mode registers keep their contents and all chip functions are disabled until the next interrupt
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or hardware reset. In Standby mode, the oscillator is running while the rest of the device is sleeping,
allowing very fast start-up combined with low power consumption.
The device is manufactured using Atmel’s high density Non-Volatile Memory (NVM) technology. The on-
chip, in-system programmable Flash allows program memory to be re-programmed in-system by a
conventional, non-volatile memory programmer.
The ATtiny4/5/9/10AVR are supported by a suite of program and system development tools, including
macro assemblers and evaluation kits.
3.2.
Comparison of ATtiny4, ATtiny5, ATtiny9 and ATtiny10
A comparison of the devices is shown in the table below.
Table 3-1.ꢀDifferences between ATtiny4, ATtiny5, ATtiny9 and ATtiny10
Device
ATtiny4
ATtiny5
ATtiny9
ATtiny10
Flash
ADC
No
Signature
512 bytes
512 bytes
1024 bytes
1024 bytes
0x1E 0x8F 0x0A
0x1E 0x8F 0x09
0x1E 0x90 0x08
0x1E 0x90 0x03
Yes
No
Yes
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4.
General Information
4.1.
Resources
A comprehensive set of development tools, application notes, and datasheets are available for download
on http://www.atmel.com/avr.
4.2.
4.3.
Data Retention
Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM
over 20 years at 85°C or 100 years at 25°C.
About Code Examples
This documentation contains simple code examples that briefly show how to use various parts of the
device. These code examples assume that the part specific header file is included before compilation. Be
aware that not all C compiler vendors include bit definitions in the header files and interrupt handling in C
is compiler dependent. Confirm with the C compiler documentation for more details.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions
must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS”
combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
4.4.
Capacitive Touch Sensing
4.4.1.
QTouch Library
The Atmel® QTouch® Library provides a simple to use solution to realize touch sensitive interfaces on
most Atmel AVR® microcontrollers. The QTouch Library includes support for the Atmel QTouch and Atmel
QMatrix® acquisition methods.
Touch sensing can be added to any application by linking the appropriate Atmel QTouch Library for the
AVR Microcontroller. This is done by using a simple set of APIs to define the touch channels and sensors,
and then calling the touch sensing API’s to retrieve the channel information and determine the touch
sensor states.
The QTouch Library is FREE and downloadable from the Atmel website at the following location: http://
www.atmel.com/technologies/touch/. For implementation details and other information, refer to the Atmel
QTouch Library User Guide - also available for download from the Atmel website.
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5.
Packaging Information
5.1.
6ST1
Figure 5-1.ꢀ6ST1
D
A
A
5
6
4
A2
A1
E
E1
A
Pin #1 ID
0.10
C
SEATINGPLANE
1
b
3
2
C
Side View
e
Top View
A2
A
0.10
C
SEATINGPLANE
c
0.25
C
A1
SEATINGPLANE
View A-A
C
SEEVIEWB
O
L
View B
COMMON DIMENSIONS
(Unit of Measure = mm)
MIN
–
MAX
1.45
0.15
1.30
3.00
3.00
1.75
0.55
NOM
NOTE
SYMBOL
A
A1
A2
D
E
–
0
–
0.90
2.80
2.60
1.50
0.30
–
2.90
2.80
1.60
0.45
0.95 BSC
–
2
E1
L
Notes: 1. This package is compliant with JEDECspecif cation MO-178 Variation AB
2. Dimension D does not include mold Flash, protrusions or gate burrs.
Mold Flash, protrustion or gate burrs shall not exceed 0.25 mm per end.
3. Dimension b does not include dambar protrusion. Allowable dambar
protrusion shall not cause the lead width to exceed the maximum
b dimension by more than 0.08 mm
e
b
0.30
0.09
0°
0.50
0.20
8°
3
c
–
θ
–
4. Die is facing down after trim/form.
6/30/08
GPC
TAQ
DRAWING NO.
TITLE
REV.
6ST1, 6-lead, 2.90 x 1.60 mm Plastic Small Outline
Package (SOT23)
Package Drawing Contact:
packagedrawings@atmel.com
6ST1
A
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5.2.
8MA4
Figure 5-2.ꢀ8MA4
8x
0.05 c
8
7
6
5
c
0.05 c
SIDE VIEW
E
Pin 1 ID
2
1
3
4
A1
D
A
TOP VIEW
D2
e
5
8
COMMON DIMENSIONS
(Unit of Measure = mm)
K
MIN
–
MAX
0.60
0.05
0.30
2.05
1.60
2.05
1.00
–
NOM
–
NOTE
SYMBOL
A
A1
b
E2
C0.2
0.00
0.20
1.95
1.40
1.95
0.80
–
–
–
D
D2
E
2.00
1.50
2.00
0.90
0.50
0.30
–
L
4
1
b
E2
e
BOTTOMVIEW
L
0.20
0.20
0.40
–
K
1. ALL DIMENSIONS ARE IN mm. ANGLES IN DEGREES.
2.COPLANARITYAPPLIESTOTHEEXPOSED PAD ASWELLASTHE
TERMINALSCOPLANARITYSHALLNOTEXCEED 0.05 mm.
3. WARPAGESHALLNOTEXCEED 0.05 mm.
Note:
4. REFERJEDECMO-236/MO-252
12/17/09
GPC
YAG
DRAWING NO.
TITLE
REV.
8PAD, 2x2x0.6 mm body, 0.5 mm pitch,
Package Drawing Contact:
packagedrawings@atmel.com
0.9x1.5 mm expos ed pad, Saw s ingulated
Thermally enhanced plas tic ultra thin dual flat
8MA4
A
no lead package (UDFN/USON)
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6.
Errata
6.1.
ATtiny4
6.1.1.
Rev. E
• Programming Lock Bits
1. Programming Lock Bits
Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be
corrupted. The location of the corruption is random.
Problem Fix / Workaround
When programming Lock Bits, make sure lock mode is not set to present, or lower levels.
6.1.2.
Rev. D
• ESD HBM (ESD STM 5.1) level ±1000V
• Programming Lock Bits
1. ESD HBM (ESD STM 5.1) level ±1000V
The device meets ESD HBM (ESD STM 5.1) level ±1000V.
Problem Fix / Workaround
Always use proper ESD protection measures (Class 1C) when handling integrated circuits before and
during assembly.
2. Programming Lock Bits
Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be
corrupted. The location of the corruption is random.
Problem Fix / Workaround
When programming Lock Bits, make sure lock mode is not set to present, or lower levels.
6.1.3.
Rev. A – C
Not sampled.
6.2.
ATtiny5
6.2.1.
Rev. E
• Programming Lock Bits
1. Programming Lock Bits
Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be
corrupted. The location of the corruption is random.
Problem Fix / Workaround
When programming Lock Bits, make sure lock mode is not set to present, or lower levels.
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6.2.2.
Rev. D
• ESD HBM (ESD STM 5.1) level ±1000V
• Programming Lock Bits
1. ESD HBM (ESD STM 5.1) level ±1000V
The device meets ESD HBM (ESD STM 5.1) level ±1000V.
Problem Fix / Workaround
Always use proper ESD protection measures (Class 1C) when handling integrated circuits before and
during assembly.
2. Programming Lock Bits
Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be
corrupted. The location of the corruption is random.
Problem Fix / Workaround
When programming Lock Bits, make sure lock mode is not set to present, or lower levels.
6.2.3.
Rev. A – C
Not sampled.
6.3.
ATtiny9
6.3.1.
Rev. E
• Programming Lock Bits
1. Programming Lock Bits
Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be
corrupted. The location of the corruption is random.
Problem Fix / Workaround
When programming Lock Bits, make sure lock mode is not set to present, or lower levels.
6.3.2.
Rev. D
• ESD HBM (ESD STM 5.1) level ±1000V
• Programming Lock Bits
1. ESD HBM (ESD STM 5.1) level ±1000V
The device meets ESD HBM (ESD STM 5.1) level ±1000V.
Problem Fix / Workaround
Always use proper ESD protection measures (Class 1C) when handling integrated circuits before and
during assembly.
2. Programming Lock Bits
Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be
corrupted. The location of the corruption is random.
Problem Fix / Workaround
When programming Lock Bits, make sure lock mode is not set to present, or lower levels.
Atmel ATtiny4 / ATtiny5 / ATtiny9 / ATiny10 [DATASHEET]
15
Atmel-8127H-ATiny4/ ATiny5 /ATiny9/ ATiny10_Datasheet_Summary-11/2016
6.3.3.
Rev. A – C
Not sampled.
6.4.
ATtiny10
6.4.1.
Rev. E
• Programming Lock Bits
1. Programming Lock Bits
Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be
corrupted. The location of the corruption is random.
Problem Fix / Workaround
When programming Lock Bits, make sure lock mode is not set to present, or lower levels.
6.4.2.
Rev. C – D
• ESD HBM (ESD STM 5.1) level ±1000V
• Programming Lock Bits
1. ESD HBM (ESD STM 5.1) level ±1000V
The device meets ESD HBM (ESD STM 5.1) level ±1000V.
Problem Fix / Workaround
Always use proper ESD protection measures (Class 1C) when handling integrated circuits before and
during assembly.
2. Programming Lock Bits
Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be
corrupted. The location of the corruption is random.
Problem Fix / Workaround
When programming Lock Bits, make sure lock mode is not set to present, or lower levels.
6.4.3.
Rev. A – B
Not sampled.
Atmel ATtiny4 / ATtiny5 / ATtiny9 / ATiny10 [DATASHEET]
16
Atmel-8127H-ATiny4/ ATiny5 /ATiny9/ ATiny10_Datasheet_Summary-11/2016
Atmel Corporation
1600 Technology Drive, San Jose, CA 95110 USA
T: (+1)(408) 441.0311
F: (+1)(408) 436.4200
|
www.atmel.com
©
2016 Atmel Corporation. / Rev.: Atmel-8127H-ATiny4/ ATiny5 /ATiny9/ ATiny10_Datasheet_Summary-11/2016
Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, AVR® and others are registered trademarks or trademarks of Atmel Corporation in
U.S. and other countries. Other terms and product names may be trademarks of others.
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intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND
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