E1217X-B-DIT [ATMEL]
Clock IC, CMOS;
| 型号： | E1217X-B-DIT |
| 厂家： | 
ATMEL |
| 描述： | Clock IC, CMOS |
| 文件： | 总8页 (文件大小：155K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• 32-kHz Oscillator
• 1.3V to 1.8V Operating-voltage Range
• 180 nA Typical Current Consumption
• Voltage Regulator
• Integrated Capacitors, Mask Selectable
• Mask Options for Pad Designation, Motor Period and Motor Pulse Width
• Low Resistance Outputs for Bipolar Stepping Motor
• Motor Fast-test Function
32-kHz
1. Description
Standard Watch
CMOS IC
The e1217X is an integrated circuit in CMOS silicon gate technology for analog
watches. It consists of a 32-kHz oscillator, frequency dividers down to 1/64 Hz, output
pulse formers and push-pull motor drivers. Integrated capacitors are provided (select-
able mask option) for tuning of the crystal. Low current consumption and high
oscillator stability are enabled by an on-chip voltage regulator.
e1217X
4728B–CLOCK–08/06
2. Pad Configuration
Figure 2-1. Pinning
1
2
8
7
e1217X
3
4
6
5
Chip size 1.06 mm x 1.02 mm
Pad size: 112 µm x 112 µm
Pad window: 100 µm x 100 µm
Table 2-1.
Pin
Pin Description
Symbol
Function
1, 4
VSS
Negative supply voltage
Positive supply voltage
Oscillator input/output
Motor drive outputs
Reset input
5, 6, 8
VDD
1 to 4
OSCIN/OSCOUT
MOT 1/2
RESET
(7/5) or (7/6)
1 to 5, 8
1 to 5, 8
TEST
Test input/output
2
e1217X
4728B–CLOCK–08/06
e1217X
3. Functional Description
3.1
3.2
3.3
3.4
Voltage Regulator
An integrated voltage regulator provides the oscillator with a well-controlled negative supply volt-
age VREG. This improves the stability of the oscillator and keeps current consumption at a
minimum.
Oscillator
The oscillator inverter with feedback resistor generates the 32768 Hz clock frequency. A total
capacitance of 24 pF is integrated. This can be selected for COSCOUT in 2 pF increments via a
mask option.
Frequency Divider
A 21-bit binary counter is provided, dividing the oscillator frequency down to 1/64 Hz. The lead-
ing six stages are connected to VDD and VREG, while the remaining 15 stages are connected to
VDD and VSS.
Motor Drive Output
The e1217X contains two push-pull output buffers for driving bipolar stepping motors. During a
motor pulse, the n-channel device of one buffer and the p-channel device of the other buffer are
activated. The p-channel devices of both buffers are active (see Figure 6-2) between the two
pulses.
Cycle time and pulse width can be chosen via a metal mask option (Table ).
3.5
RESET
A debounced RESET input is provided. Connecting the RESET input to VDD resets the 12
low-order stages of the frequency divider, thus disabling further motor pulses. Motor pulses,
which are in progress when the reset function is applied, will be completed. After releasing the
RESET pad from VDD, the next motor pulse appears with a delay of one half motor cycle on the
drive output opposed to the former (Figure 6-3). Due to the debounce circuitry on the RESET
input, VDD must be applied for at least 31.2 ms. During RESET the input current is limited to 8
nA typically.
4. Test
A test frequency of 512 Hz is output to this pad which can be measured with a high resistance
probe (R ≥ 10 MΩ, C ≥ 20 pF). This signal can be used for testing and tuning the oscillator. Con-
necting TEST to VDD for at least 4 ms changes the motor cycle time from the selected value to
the test cycle time (mask options), while the motor pulse width remains unchanged (Figure 6-2).
This feature can be used to reduce the amount of time required for testing the mechanical parts
of the watch.
Table 4-1.
Motor Options
Motor-cycle Parameters
Cycle time TM
Value
2, 4, 6, 8, 10, 12, 20, 24, 30, 40, 60, 80, 120 s
0.98 to 14.65 ms in increments of 0.98 ms
250, 125, 62.5 ms
Motor pulse width tM
Motor test cycle time TMT
3
4728B–CLOCK–08/06
5. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
The circuit is protected against supply-voltage reversal for typically 5 minutes.
Parameters
Symbol
VSS
Value
–0.3 to +5
Unit
V
Supply voltage
Input voltage range, all inputs
Output short-circuit duration
Power dissipation (DIL package)
Operating ambient temperature range
Storage temperature range
VIN
(VSS – 0.3V) ≤ VIN ≤ (VDD + 0.3V)
indefinite
V
Ptot
Tamb
Tstg
125
mW
°C
–20 to +70
–40 to +125
°C
Lead temperature during soldering at 2 mm
distance, 10s
Tsld
260
°C
6. Operating Characteristics
VDD = 0V; VSS = –1.55V; Tamb = +25°C; CTR = 15 pF, unless otherwise specified.
All voltage levels are measured with reference to VDD. Test crystal as specified below.
Parameters
Test Conditions
Symbol
VSS
Min.
Typ.(1)
Max.
–1.8
–300
Unit
V
Operating voltage
Operating current
RESET input current
Motor Outputs
Motor output current
Motor period
Functional test (Figure 6-1)
Coscout = 16 pF, RL = R
RESET = VDD
–1.3
ISS
–180
8
nA
nA
IR
RL = 2 kΩ, VSS = –1.55V
IM
TM
±0.7
mA
s
See Table 4-1 on page 3
See Table 4-1 on page 3
See Table 4-1 on page 3
Motor pulse width
Motor test period
Oscillator
TM
TMT
ms
ms
Stability
∆VSS = 100 mV, CTR = 5 pF
∆f/f
VST
0.1
ppm
V
Start-up voltage
Integrated input capacitor
Integrated output capacitor
Startup within 2s
–1.3
COSC IN
COSC OUT
See Table 4-1 on page 3
See Table 4-1 on page 3
pF
pF
COSCOUTmax = 24 pF
Note:
Typical parameters represent the statistical mean values.
4
e1217X
4728B–CLOCK–08/06
e1217X
Figure 6-1. Functional Test Circuit
RESET
VSS
1
2
8
7
TEST
MOT1
RL
e1217X
CTR
OSCIN
MOT2
VDD
3
4
6
5
OSCOUT
Range of trimmer capacitance: CTR = 5 pF to 30 pF
6.1
6.2
Test Crystal Specification
Frequency
f = 32,768 Hz
RS = 30 kΩ
C0 = 1.5 pF
C1 = 3 fF
Series resistance
Static capacitance
Dynamic capacitance
Load capacitance
CL = 8 pF
Additional Notes
1. It is recommended to connect the quartz case to VDD (by conductive epoxy).
2. Capacitive coupling of TEST to OSCIN must be minimized by appropriate layout of the
PCB to avoid disturbancing the oscillator.
5
4728B–CLOCK–08/06
Figure 6-2. Motor Drive Outputs in Normal Mode and Motor Test
T < tTIN
T > tTIN
TEST
MOT1
MOT2
TM
TMT
tM
tM
TM/2
Figure 6-3. Motor Drive Outputs and RESET
T < tRIN
T > tRIN
(open)
RESET
tM
MOT1
TM/2
tM
tM
MOT2
TM
6
e1217X
4728B–CLOCK–08/06
e1217X
7. Ordering Information
Table 7-1.
Option List e1217X
Integrated
Option
Motor
Capacitance(1)
Cycle
(TM)
s
Pulse
(tM)
ms
Test
COSCIN COSCOUT
(TMT
)
y
–B
ms
pF
2
pF
14
14
14
14
14
14
14
14
14
14
Pad 1
VSS
Pad 2
TEST
Pad 3
OSCIN
OSCIN
OSCIN
OSCOUT
RESET
RESET
RESET
OSCOUT
OSCIN
OSCIN
Pad 4
OSCOUT
OSCOUT
OSCOUT
OSCIN
VSS
Pad 5
VDD
Pad 6
MOT2
MOT2
MOT2
MOT2
MOT2
MOT2
VDD
Pad 7
Pad 8
RESET
RESET
RESET
RESET
VDD
2
2
3.9
5.9
3.9
4.9
4.9
5.9
3.9
3.9
4.9
5.9
125
125
125
62.5
125
125
62.5
62.5
125
125
MOT1
MOT1
MOT1
MOT1
MOT1
MOT1
MOT1
MOT1
MOT1
MOT1
–S
2
VSS
TEST
VDD
–T
10
2
2
VSS
TEST
VDD
–VA
–VB
–VC
–VF
–VH
–WB
–WA
Note:
4
VSS
TEST
VDD
2
4
OSCIN
OSCIN
OSCIN
VSS
OSCOUT
OSCOUT
OSCOUT
TEST
TEST
TEST
MOT2
VDD
40
2
2
VSS
VDD
4
VSS
TEST
2
4
OSCIN
OSCOUT
OSCOUT
MOT2
MOT2
MOT2
RESET
RESET
RESET
2
4
VSS
TEST
VDD
40
2
VSS
TEST
VDD
1. On-chip stray capacitance included
Table 7-2.
Package List
Extended Type Number
e1217X-y(1)-DIT
Package
Die-in-Tray
Remarks
–
Note:
1. Option identifier, see previous table
8. Revision History
Please note that the following page numbers referred to in this section refer to the specific revision
mentioned, not to this document.
Revision No.
History
• Put datasheet in a new template
4728B-CLOCK-08/06
• Section 7 “Ordering Information” on page 7 changed
7
4728B–CLOCK–08/06
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4728B–CLOCK–08/06
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