E1217X-VF-DIT [ATMEL]
暂无描述;型号: | E1217X-VF-DIT |
厂家: | ATMEL |
描述: | 暂无描述 |
文件: | 总8页 (文件大小:116K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Features
• 32-kHz Oscillator
• 1.3 V to 1.8 V Operating-voltage Range
• 180 nA Typical Current Consumption
• Voltage Regulator
• Integrated Capacitors, Mask Selectable
• Mask Options for Pad Designation, Motor Period and Motor Pulse Width
• Low Resistance Outputs for Bipolar Stepping Motor
• Motor Fast-test Function
32-kHz
Standard Watch
CMOS IC
Description
The e1217X is an integrated circuit in CMOS silicon gate technology for analog
watches. It consists of a 32-kHz oscillator, frequency dividers down to 1/64 Hz, output
pulse formers and push-pull motor drivers. Integrated capacitors are provided (select-
able mask option) for tuning of the crystal. Low current consumption and high
oscillator stability are enabled by an on-chip voltage regulator.
e1217X
4728A–CLOCK–06/03
Pad Configuration
Figure 1. Pinning
8
7
1
2
e1217X
3
6
5
4
Chip size 1.06 mm P 1.02 mm
Pad size: 112 µm P 112 µm
Pad window: 100 µm P 100 µm
Pin Description
Pin
Symbol
Function
1, 4
VSS
Negative supply voltage
Positive supply voltage
Oscillator input/output
Motor drive outputs
Reset input
5, 6, 8
VDD
1 to 4
OSCIN/OSCOUT
MOT 1/2
RESET
(7/5) or (7/6)
1 to 5, 8
1 to 5, 8
TEST
Test input/output
2
e1217X
4728A–CLOCK–06/03
e1217X
Functional Description
Voltage Regulator
An integrated voltage regulator provides the oscillator with a well-controlled negative
supply voltage VREG. This improves the stability of the oscillator and keeps current con-
sumption at a minimum.
Oscillator
The oscillator inverter with feedback resistor generates the 32768 Hz clock frequency. A
total capacitance of 24 pF is integrated. This can be selected for COSCOUT in 2 pF
increments via a mask option.
Frequency Divider
Motor Drive Output
A 21-bit binary counter is provided, dividing the oscillator frequency down to 1/64 Hz.
The leading six stages are connected to VDD and VREG, while the remaining 15 stages
are connected to VDD and VSS.
The e1217X contains two push-pull output buffers for driving bipolar stepping motors.
During a motor pulse, the n-channel device of one buffer and the p-channel device of
the other buffer are activated. The p-channel devices of both buffers are active (see Fig-
ure 3) between the two pulses.
Cycle time and pulse width can be chosen via a metal mask option (Table 1).
RESET
A debounced RESET input is provided. Connecting the RESET input to VDD resets the
12 low-order stages of the frequency divider, thus disabling further motor pulses. Motor
pulses, which are in progress when the reset function is applied, will be completed. After
releasing the RESET pad from VDD, the next motor pulse appears with a delay of one
half motor cycle on the drive output opposed to the former (Figure 4). Due to the
debounce circuitry on the RESET input, VDD must be applied for at least 31.2 ms. Dur-
ing RESET the input current is limited to 8 nA typically.
Test
A test frequency of 512 Hz is output to this pad which can be measured with a high
resistance probe (R O 10 Mꢀ, C O 20 pF). This signal can be used for testing and tuning
the oscillator. Connecting TEST to VDD for at least 4 ms changes the motor cycle time
from the selected value to the test cycle time (mask options), while the motor pulse
width remains unchanged (Figure 3).
This feature can be used to reduce the amount of time required for testing the mechani-
cal parts of the watch.
Table 1. Motor Options
Motor-cycle Parameters
Value
Cycle time TM
2, 4, 6, 8, 10, 12, 20, 24, 30, 40, 60, 80, 120 s
0.98 to 14.65 ms in increments of 0.98 ms
250, 125, 62.5 ms
Motor pulse width tM
Motor test cycle time TMT
3
4728A–CLOCK–06/03
Absolute Maximum Ratings
Absolute maximum ratings define parameter limits which, if exceeded, may permanently change or damage the device.
All inputs and outputs on Atmel’s circuits are protected against electrostatic discharges. However, precautions to minimize
the build-up of electrostatic charges during handling are recommended.
The circuit is protected against supply-voltage reversal for typically 5 minutes.
Parameters
Symbol
VSS
Value
-0.3 to +5
Unit
V
Supply voltage
Input voltage range, all inputs
Output short-circuit duration
Power dissipation (DIL package)
Operating ambient temperature range
Storage temperature range
VIN
(VSS - 0.3 V) ? VIN ? (VDD + 0.3 V)
indefinite
V
Ptot
Tamb
Tstg
125
mW
LC
-20 to +70
-40 to +125
LC
Lead temperature during soldering at 2 mm
distance, 10 s
Tsld
260
LC
Operating Characteristics
VDD = 0 V; VSS = -1.55 V; Tamb = +25LC; CTR = 15 pF, unless otherwise specified.
All voltage levels are measured with reference to VDD. Test crystal as specified below.
Parameters
Test Conditions
Symbol
VSS
Min.
Typ.(1)
Max.
-1.8
Unit
V
Operating voltage
Operating current
RESET input current
Motor Outputs
Motor output current
Motor period
Functional test (Figure 2)
Coscout = 16 pF, RL = R
RESET = VDD
-1.3
ISS
-180
8
-300
nA
nA
IR
RL = 2 kꢀ, VSS = -1.55 V
IM
TM
TM
TMT
±0.7
mA
s
See Table 2
See Table 2
See Table 2
Motor pulse width
Motor test period
Oscillator
ms
ms
Stability
ꢁVSS = 100 mV, CTR = 5 pF
ꢁf/f
VST
0.1
ppm
V
Start-up voltage
Integrated input capacitor
Integrated output capacitor
Startup within 2 s
-1.3
COSC IN
COSC OUT
See Table 2
See Table 2
pF
pF
COSCOUTmax = 24 pF
Note:
1. Typical parameters represent the statistical mean values.
4
e1217X
4728A–CLOCK–06/03
e1217X
Figure 2. Functional Test Circuit
RESET
MOT1
VSS
8
7
1
2
TEST
RL
e1217X
CTR
OSCIN
MOT2
VDD
6
5
3
4
OSCOUT
Range of trimmer capacitance: CTR = 5 pF to 30 pF
Test Crystal
Specification
Frequency
f = 32,768 Hz
RS = 30 kꢀ
C0 = 1.5 pF
C1 = 3 fF
Series resistance
Static capacitance
Dynamic capacitance
Load capacitance
CL = 8 pF
Additional Notes
1. It is recommended to connect the quartz case to VDD (by conductive epoxy).
2. Capacitive coupling of TEST to OSCIN must be minimized by appropriate layout
of the PCB to avoid disturbancing the oscillator.
5
4728A–CLOCK–06/03
Figure 3. Motor Drive Outputs in Normal Mode and Motor Test
T > tTIN
T < tTIN
TEST
TM
TMT
MOT1
tM
tM
MOT2
TM/2
Figure 4. Motor Drive Outputs and RESET
T < tRIN
T > tRIN
(open)
RESET
tM
MOT1
tM
tM
TM/2
MOT2
TM
6
e1217X
4728A–CLOCK–06/03
e1217X
Ordering Information
Table 2. Option List e1217X
Integrated
Motor
Capacitance(1)
Cycle
(TM)
s
Pulse
(tM)
ms
Test
COSCIN COSCOUT
(TMT
)
Option
-B
ms
pF
2
pF
14
14
14
14
14
14
14
14
14
Pad 1
VSS
Pad 2
TEST
Pad 3
OSCIN
OSCIN
OSCIN
OSCOUT
RESET
RESET
RESET
OSCOUT
OSCIN
Pad 4
OSCOUT
OSCOUT
OSCOUT
OSCIN
VSS
Pad 5
VDD
Pad 6
MOT2
MOT2
MOT2
MOT2
MOT2
MOT2
VDD
Pad 7
Pad 8
RESET
RESET
RESET
RESET
VDD
2
2
3.9
5.9
3.9
4.9
4.9
5.9
3.9
3.9
4.9
125
125
125
62.5
125
125
62.5
62.5
125
MOT1
MOT1
MOT1
MOT1
MOT1
MOT1
MOT1
MOT1
MOT1
-S
2
VSS
TEST
VDD
-T
10
2
2
VSS
TEST
VDD
-VA
-VB
-VC
-VF
-VH
4
VSS
TEST
VDD
2
4
OSCIN
OSCIN
OSCIN
VSS
OSCOUT
OSCOUT
OSCOUT
TEST
TEST
TEST
MOT2
VDD
40
2
2
VSS
VDD
4
VSS
TEST
2
4
OSCIN
OSCOUT
MOT2
MOT2
RESET
RESET
-WB
2
4
VSS
TEST
VDD
Note:
1. On-chip stray capacitance included
7
4728A–CLOCK–06/03
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4728A–CLOCK–06/03
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