E1217X-WG [TEMIC]

Stepping Motor Watch, CMOS, DIE-8;
E1217X-WG
型号: E1217X-WG
厂家: TEMIC SEMICONDUCTORS    TEMIC SEMICONDUCTORS
描述:

Stepping Motor Watch, CMOS, DIE-8

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中文:  中文翻译
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e1217X  
32-kHz Standard Watch CMOS IC  
Features  
32-kHz oscillator  
Integrated capacitors, mask selectable  
Mask options for pad designation, motor period and  
motor pulse width  
1.3 V to 1.8 V operating-voltage range  
180 nA typical current consumption  
Voltage regulator  
Low resistance outputs for bipolar stepping motor  
Motor fast-test function  
Pad Configuration  
General Description  
The e1217X is an integrated circuit in CMOS Silicon  
Gate Technology for analog watches. It consists of a  
32-kHz oscillator, frequency dividers down to 1/64 Hz,  
output pulse formers and push-pull motor drivers. For  
tuning of the crystal, integrated capacitors are provided  
(selectable mask option). Low current consumption and  
high oscillator stability are enabled by an on-chip voltage  
regulator.  
1
8
7
2
e1217X  
Pin  
1, 4  
5, 6, 8  
1 to 4  
Symbol  
Function  
Negative supply voltage  
Positive supply voltage  
V
SS  
3
4
6
V
DD  
OSCIN/ Oscillator input/output  
OSCOUT  
5
(7/5) or (7/6)  
1 to 5, 8  
MOT 1/2 Motor drive outputs  
RESET Reset input  
95 9979  
1 to 5, 8  
TEST  
Test input/output  
Figure 1. Chip size 1.06 mm x 1.02 mm  
Pad size: 112 m x 112  
Pad window: 100 m x 100  
m
m
Absolute Maximum Ratings  
Parameters  
Supply voltage  
Symbol  
Value  
–0.3 to +5  
(V –0.3 V V (V + 0.3 V)  
SS ) IN DD  
Unit  
V
V
V
SS  
V
IN  
Input voltage range, all inputs  
Output short circuit duration  
Power dissipation (DIL package)  
Operating ambient temperature range  
Storage temperature range  
indefinite  
125  
–20 to +70  
–40 to +125  
260  
P
tot  
mW  
°C  
°C  
T
amb  
T
stg  
Lead temperature during soldering at 2 mm  
distance, 10 s  
T
sld  
°C  
Absolute maximum ratings define parameter limits However, precautions to minimize the build-up of elec-  
which, if exceeded, may permanently change or damage trostatic charges during handling are recommended.  
the device.  
All inputs and outputs on TEMIC Semiconductors’ The circuit is protected against supply-voltage reversal  
circuits are protected against electrostatic discharges. for typically 5 minutes.  
Rev. A1, 10-Nov-99  
1 (5)  
e1217X  
Functional Description  
Voltage Regulator  
RESET  
A debounced RESET input is provided. Connecting the  
An integrated voltage regulator provides the oscillator  
RESET input to V resets the low order 12 stages of the  
with a well controlled negative supply voltage V  
.
DD  
REG  
frequency divider, thus disabling further motor pulses.  
Motor pulses in progress when the reset function is ap-  
plied are completed. After releasing the RESET pad from  
This improves the stability of the oscillator and keeps cur-  
rent consumption at a minimum.  
Oscillator  
V
DD  
, the next motor pulse appears with a delay of one half  
motor cycle on the drive output opposed to the former  
(figure 4). Due to the debounce circuitry on the RESET  
An oscillator inverter with feedback resistor is provided  
for generation of the 32768 Hz clock frequency. A total  
capacitance of 24 pF is integrated.This can be selected for  
input, V must be applied for at least 31.2 ms. During  
DD  
RESET the input current is limited to 8 nA typically.  
C
in 2 pF increments via a mask option.  
OSCOUT  
Test  
Frequency Divider  
A test frequency of 512 Hz is output to this pad which can  
be measured with a high resistance probe (R 10 M  
C 20 pF). This signal can be used for testing and tuning  
A 21-bit binary counter is provided, dividing the oscilla-  
tor frequency down to 1/64 Hz. The leading six stages are  
connected to V  
and V  
, while the remaining  
DD  
REG  
the oscillator. Connecting TEST to V for at least 4 ms  
DD  
15 stages are connected to V and V  
.
SS  
DD  
changes the motor cycle time from the selected value to  
the test cycle time (mask options), while the motor pulse  
width remains unchanged (figure 3).  
Motor Drive Output  
The e1217X contains two push-pull output buffers for  
driving bipolar stepping motors. During a motor pulse,  
the n-channel device of one buffer and the p-channel de-  
vice of the other buffer are activated. The p-channel  
devices of both buffers are active (figure 3) between two  
the pulses.  
This feature can be used to reduce the amount of time re-  
quired for testing the mechanical parts of the watch.  
Cycle time and pulse width can be chosen via a metal-  
mask option (table1).  
Table 1. Motor options  
Cycle time T  
= 2, 4, 6, 8, 10, 12, 20, 24, 30, 40, 60, 80, 120 s  
= 0.98 to 14.65 ms in increments of 0.98 ms  
= 250, 125, 62.5 ms  
M
Motor pulse width t  
M
Motor test cycle time T  
MT  
2 (5)  
Rev. A1, 10-Nov-99  
e1217X  
Operating Characteristics  
V
DD  
= 0 V; V = –1.55 V; T  
= +25°C; C = 15 pF, unless otherwise specified.  
amb TR  
SS  
All voltage levels are measured with reference to V . Test crystal as specified below.  
DD  
Parameters  
Operating voltage  
Operating current  
RESET input current  
Motor outputs  
Motor output current  
Motor period  
Motor pulse width  
Motor test period  
Oscillator  
Test Conditions / Pins  
Functional test (figure 2)  
Symbol  
Min.  
–1.3  
Typ.  
Max.  
–1.8  
–300  
Unit  
V
nA  
nA  
V
SS  
SS  
C
= 16 pF, R =  
I
–180  
8
oscout  
L
RESET = V  
I
DD  
R
R = 2 k , V = –1.55 V  
I
± 0.7  
mA  
s
ms  
ms  
L
SS  
M
T
T
M
M
See option list  
0.1  
T
MT  
Stability  
V = 100 mV,  
f/f  
ppm  
SS  
C
TR  
= 5 pF,  
Start-up voltage  
Startup within 2 s  
V
ST  
–1.3  
V
Integrated input capacitor  
Integrated output capacitor  
C
C
See option list  
See option list  
pF  
pF  
OSC IN  
C
= 24 pF  
OSCOUTmax  
OSC  
OUT  
Note 1: Typical parameters represent the statistical mean values  
RESET  
Range of trimmer capacitance:  
= 5 pF to 30 pF  
V
SS  
C
TR  
8
7
1
2
Test Crystal Specification  
MOT1  
TEST  
Frequency  
f = 32768 Hz  
Series resistance  
Static capacitance  
Dynamic capacitance  
Load capacitance  
R = 30 k  
S
R
e1217X  
C = 1.5 pF  
0
L
C = 3 fF  
1
C
OSCIN  
TR  
MOT2  
C = 8 pF  
L
6
5
3
4
Additional Notes  
V
DD  
1. It is recommended to connect the quartz case to V  
(by conductive epoxy).  
DD  
OSCOUT  
2. Capacitive coupling of TEST to OSCIN must be  
minimized by appropriate layout of the PCB to avoid  
disturbance of the oscillator.  
95 9980  
Figure 2. Functional test circuit  
Rev. A1, 10-Nov-99  
3 (5)  
e1217X  
T< t  
T > t  
TIN  
TIN  
TEST  
MOT1  
MOT2  
T
T
MT  
M
t
t
M
M
T
M
/2  
95 9981  
Figure 3. Motor drive outputs in normal mode and motor test  
T< t  
T > t  
RIN  
RIN  
(open)  
RESET  
t
M
MOT1  
MOT2  
t
t
M
M
T
M
/2  
T
M
95 9982  
Figure 4. Motor drive outputs and RESET  
4 (5)  
Rev. A1, 10-Nov-99  
e1217X  
Table 2. Option list e1217X–  
Option  
Motor  
Integrated  
Capacitance *)  
Cycle  
(T  
s
Pulse  
Test  
C
C
OSCOUT  
OSCIN  
)
(t  
M
)
(T  
MT  
)
M
Pad 1  
Pad 2  
TEST  
Pad 3  
Pad 4  
Pad 5  
Pad 6  
Pad 7  
Pad 8  
ms  
ms  
pF  
2
pF  
14  
–B  
–E  
2
3.9  
125  
125  
125  
125  
62.5  
125  
125  
62.5  
62.5  
62.5  
125  
125  
62.5  
V
V
V
V
V
OSCIN  
OSC-  
OUT  
V
V
V
V
V
MOT2 MOT1 RESET  
MOT2 MOT1 RESET  
MOT2 MOT1 RESET  
MOT2 MOT1 RESET  
MOT2 MOT1 RESET  
SS  
SS  
SS  
SS  
SS  
DD  
DD  
DD  
DD  
DD  
2
6.8  
7.8  
5.9  
4.9  
4.9  
5.9  
5.9  
3.9  
3.9  
4.9  
5.9  
6.8  
2
2
2
4
4
2
2
4
4
4
2
2
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
TEST  
TEST  
TEST  
TEST  
OSCIN  
OSCIN  
OSCIN  
OSC-  
OUT  
–I  
2
OSC-  
OUT  
–S  
2
OSC-  
OUT  
VA  
–VB  
–VC  
–VE  
–VF  
–VH  
–WB  
–WG  
–WH  
2
OSC-  
OUT  
OSCIN  
2
OSCIN  
OSCIN  
OSC-  
OUT  
RESET  
V
V
V
V
TEST  
TEST  
TEST  
MOT2  
MOT2 MOT1  
MOT2 MOT1  
V
V
SS  
SS  
SS  
SS  
DD  
DD  
40  
2
OSC-  
OUT  
RESET  
OSC-  
OUT  
OSCIN  
V
MOT2 MOT1 RESET  
VDD MOT1 TEST  
DD  
2
OSCIN  
OSC-  
OUT  
RESET  
2
V
V
V
V
TEST  
TEST  
TEST  
TEST  
OSC-  
OUT  
OSCIN  
V
V
V
V
MOT2 MOT1 RESET  
MOT2 MOT1 RESET  
MOT2 MOT1 RESET  
MOT2 MOT1 RESET  
SS  
SS  
SS  
SS  
DD  
DD  
DD  
DD  
2
OSCIN  
OSCIN  
OSCIN  
OSC-  
OUT  
20  
40  
OSC-  
OUT  
OSC-  
OUT  
*) On-chip stray capacitance included  
We reserve the right to make changes to improve technical design and may do so without further notice.  
Parameters can vary in different applications. All operating parameters must be validated for each customer  
application by the customer. Should the buyer use TEMIC Semiconductors products for any unintended or  
unauthorized application, the buyer shall indemnify TEMIC Semiconductors against all claims, costs, damages,  
and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with  
such unintended or unauthorized use.  
TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany  
Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423  
Rev. A1, 10-Nov-99  
5 (5)  

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