T89C51IC2_技术文档

Features

• 80C52 Compatible

– 8051 pin and instruction compatible

– Four 8-bit I/O ports + 2 I/O I2C Interface pins

– Three 16-bit timer/counters

– 256 bytes scratch pad RAM

– 10 Interrupt sources with 4 priority levels

– Dual Data Pointer

• Variable length MOVX for slow RAM/peripherals

• ISP (In System Programming) using standard V_CCpower supply.

• Boot ROM contains low level FLASH programming routines and a default serial loader

• High-Speed Architecture

8-bit

– 40 MHz in standard mode

Microcontroller

with Flash and

I²C Interface

– 20 MHz in X2 mode (6 clocks/machine cycle)

• 32-Kbytes on-chip FLASH program / data Memory

– Byte and page (128 bytes) erase and write

– 10k write cycles

– On-chip 1024 bytes expanded RAM (XRAM)

– Software selectable size (0, 256, 512, 768, 1024 bytes)

– 256 bytes selected at reset for T87C51RB2/RC2 compatibility

• Keyboard interrupt interface on port P1

• 400-Kbits/s Multimaster I²C Interface

• SPI Interface (Master / Slave Mode)

• Sub clock 32kHz crystal oscillator

• 8-bit clock prescaler

T89C51IC2

Summary

• Improved X2 mode with independant selection for CPU and each peripheral

• Programmable Counter Array 5 Channels with:

– High Speed Output,

– Compare / Capture,

– Pulse Width Modulator,

– Watchdog Timer Capabilities

• Asynchronous port reset

• Full duplex Enhanced UART

• Dedicated Baud Rate Generator for UART

• Low EMI (inhibit ALE)

• Hardware Watchdog Timer (One-time enabled with Reset-Out)

• Power control modes:

– Idle Mode.

– Power-down mode.

– Power-Off Flag.

• Power supply: 4.5V to 5.5V or 2.7V to 3.6V

• Temperature ranges: Commercial (0 to +70°C) and industrial (-40°C to +85°C).

• Packages: PLC44, VQFP44

Description

T89C51IC2 is a high performance FLASH version of the 80C51 8-bit microcontrollers.

It contains a 32-Kbytes Flash memory block for program and data.

The 32-Kbytes FLASH memory can be programmed either in parallel mode or in serial

mode with the ISP capability or with software. The programming voltage is internally

generated from the standard V_CCpin.

The T89C51IC2 retains all features of the 80C52 with 256 bytes of internal RAM, a 7-

source 4-level interrupt controller and three timer/counters.

Rev. C – 3-Dec-01

1

In addition, the T89C51IC2 has a 32kHz Subsidiary clock Oscillator, a Programmable

Counter Array, an XRAM of 1024 byte, a Hardware Watchdog Timer, a Keyboard Inter-

face, a I2C Interface, a SPI Interface, a more versatile serial channel that facilitates

multiprocessor communication (EUART) and a speed improvement mechanism (X2

mode).

The fully static design of the T89C51IC2 allows to reduce system power consumption by

bringing the clock frequency down to any value, even DC, without loss of data.

The T89C51IC2 has 2 software-selectable modes of reduced activity and 8 bit clock

prescaler for further reduction in power consumption. In the Idle mode the CPU is frozen

while the peripherals and the interrupt system are still operating. In the power-down

mode the RAM is saved and all other functions are inoperative.

The added features of the T89C51IC2 make it more powerful for applications that need

pulse width modulation, high speed I/O and counting capabilities such as alarms, motor

control, corded phones, smart card readers.

Table 1. Memory Size

PLCC44

TOTAL RAM

(bytes)

VQFP44 1.4

Flash (bytes)

XRAM (bytes)

I/O

T89C51IC2

32k

1024

1280

34

Block Diagram

(2) (2)

(1)

(1) (1)

(1)

XTAL1

XTAL2

Boot

ROM

2Kx8

EUART

+

BRG

Flas h

32Kx8 or

16Kx8

RAM

256x8

XRAM

1Kx8

I²C

PCA

Timer2

ALE/ PRO G

PSEN

C51

CORE

IB-bus

CPU

EA

(2)

Timer 0

Timer 1

Parallel I/O Ports &Ext. Bus

Port 0 Port 1 Port 2 Port 3Port I2

Watch Key

Dog Board

INT

Ctrl

RD

SPI

WR

(2) (2)

(2) ( 2)

(1) (1) (1)

(1)

(1): Alternate function of Port 1

(2): Alternate function of Port 3

2

T89C51IC2

Rev. C – 3-Dec-01

T89C51IC2

SFR Mapping

The Special Function Registers (SFRs) of the T89C51IC2 fall into the following

categories:

•

C51 core registers: ACC, B, DPH, DPL, PSW, SP

I/O port registers: P0, P1, P2, P3, PI2

Timer registers: T2CON, T2MOD, TCON, TH0, TH1, TH2, TMOD, TL0, TL1, TL2,

RCAP2L, RCAP2H

•

Serial I/O port registers: SADDR, SADEN, SBUF, SCON

PCA (Programmable Counter Array) registers: CCON, CCAPMx, CL, CH, CCAPxH,

CCAPxL (x: 0 to 4)

•

Power and clock control registers: PCON

Hardware Watchdog Timer registers: WDTRST, WDTPRG

Interrupt system registers: IE0, IPL0, IPH0, IE1, IPL1, IPH1

Keyboard Interface registers: KBE, KBF, KBLS

SPI registers: SPCON, SPSTR, SPDAT

I2C Interface registers: SSCON, SSCS, SSDAT, SSADR

BRG (Baud Rate Generator) registers: BRL, BDRCON

Flash register: FCON

Clock Prescaler register: CKRL

32Khz Sub Clock Oscillator registers: CKSEL, OSSCON

Others: AUXR, AUXR1, CKCON0, CKCON1

3

Rev. C – 3-Dec-01

Table 2. SFR mapping

Table below shows all SFRs with their address and their reset value.

Bit

addressable

Non Bit addressable

0/8

1/9

2/A

3/B

4/C

5/D

6/E

7/F

CH

CCAP0H

CCAP1H

CCAPL2H

CCAPL3H

CCAPL4H

F8h

F0h

E8h

FFh

F7h

EFh

0000 0000

XXXX XXXX

B

0000 0000

CL

CCAP0L

CCAP1L

CCAPL2L

CCAPL3L

CCAPL4L

0000 0000

XXXX XXXX

ACC

0000 0000

E0h

D8h

D0h

C8h

E7h

DFh

D7h

CFh

CCON

CMOD

CCAPM0

CCAPM1

CCAPM2

CCAPM3

CCAPM4

00X0 0000

00XX X000

X000 0000

FCON (1)

PSW

0000 0000

XXXX 0000

T2CON

0000 0000

T2MOD

XXXX XX00

RCAP2L

0000 0000

RCAP2H

0000 0000

TL2

0000 0000

TH2

0000 0000

PI2 bit

addressable

SPCON

SPSTA

SPDAT

C0h

C7h

0001 0100

0000 0000

XXXX XXXX

XXXX XX11

IPL0

SADEN

B8h

B0h

A8h

A0h

98h

90h

88h

80h

BFh

B7h

AFh

A7h

9Fh

97h

8Fh

87h

X000 000

0000 0000

P3

IE1

IPL1

IPH1

IPH0

1111 1111

XXXX X000

XXXX X111

X000 0000

IE0

SADDR

CKCON1

0000 0000

XXXX XXX0

P2

AUXR1

WDTRST

WDTPRG

1111 1111

XXXX X0X0

XXXX XXXX

XXXX X000

SCON

SBUF

BRL

BDRCON

KBLS

KBE

KBF

0000 0000

XXXX XXXX

0000 0000

XXX0 0000

0000 0000

P1

SSCON

SSCS

SSDAT

SSADR

CKRL

1111 1111

0000 0000

1111 1000

1111 1111

1111 1110

1111 1111

TCON

TMOD

TL0

TL1

TH0

TH1

CKCON0

AUXR

XX0X 0000

0000 0000

P0

CKSEL

OSSCON

PCON

SP

0000 0111

DPL

0000 0000

DPH

0000 0000

1111 1111

XXXX XXX0

XXXX X001

00X1 0000

0/8

1/9

2/A

3/B

4/C

5/D

6/E

7/F

reserved

(1) FCON access is reserved for the FLASH API and ISP software.

4

T89C51IC2

Rev. C – 3-Dec-01

T89C51IC2

Pin Configurations

6

5 4 3 2 1

44 43 42 41 40

P1.5/CEX2/MISO

P1.6/CEX3/SCK

P1.7/CEx4/MOSI

RST

39

38

7

8

P0.4/AD4

P0.5/AD5

P0.6/AD6

P0.7/AD7

EA

37

9

10

11

12

13

36

35

34

33

P3.0/RxD

PI2.1/SDA

P3.1/TxD

PLCC44

PI2.0/SCL

ALE/PROG

PSEN

P3.2/INT0

P3.3/INT1

P3.4/T0

14

15

16

17

32

31

30

29

P2.7/A15

P2.6/A14

P2.5/A13

P3.5/T1

18 19 20 21 22 23 24 25 26 27 28

44 43 42 41 40 39 38 37 36 35 34

P0.4/AD4

P0.5/AD5

P0.6/AD6

P0.7/AD7

EA

33

32

P1.5/CEX2/MISO

1

2

P1.6/CEX3/SCK

P1.7/CEX4/MOSI

RST

31

3

4

30

29

28

27

P3.0/RxD

PI2.1/SDA

P3.1/TxD

5

VQFP44 1.4

PI2.0/SCL

ALE/PROG

PSEN

6

7

8

26

25

24

23

P3.2/INT0

P3.3/INT1

P3.4/T0

P2.7/A15

P2.6/A14

P2.5/A13

9

10

11

P3.5/T1

12 13 141516 17 18 192021 22

5

Rev. C – 3-Dec-01

Table 1. Pin Description for 40/44 pin packages

Pin Number

PLCC44 VQFP44 1.4

16

Type

Mnemonic

V_SS

Name and Function

22

44

I

Ground: 0V reference

Power Supply: This is the power supply voltage for normal, idle and power-down

V_CC

38

operation

P0.0-P0.7

43-36

37-30

I/O

Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to

them float and can be used as high impedance inputs. Port 0 must be polarized to V_CC

or V_SSin order to prevent any parasitic current consumption. Port 0 is also the

multiplexed low-order address and data bus during access to external program and

data memory. In this application, it uses strong internal pull-up when emitting 1s. Port 0

also inputs the code bytes during EPROM programming. External pull-ups are required

during program verification during which P0 outputs the code bytes.

P1.0-P1.7

2-9

40-44

1-3

I/O

Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that

have 1s written to them are pulled high by the internal pull-ups and can be used as

inputs. As inputs, Port 1 pins that are externally pulled low will source current because

of the internal pull-ups. Port 1 also receives the low-order address byte during memory

programming and verification.

Alternate functions for T89C51IC2 Port 1 include:

2

3

40

41

I/O

I

P1.0: Input / Output

T2 (P1.0): Timer/Counter 2 external count input/Clockout

XTALB1 (P1.0): Sub Clock input to the inverting oscillator amplifier

P1.1: Input / Output

I/O

I

T2EX: Timer/Counter 2 Reload/Capture/Direction Control

SS: SPI Slave Select

I

4

5

6

7

42

43

44

1

I/O

I

P1.2: Input / Output

ECI: External Clock for the PCA

I/O

P1.3: Input / Output

CEX0: Capture/Compare External I/O for PCA module 0

P1.4: Input / Output

CEX1: Capture/Compare External I/O for PCA module 1

P1.5: Input / Output

CEX2: Capture/Compare External I/O for PCA module 2

MISO: SPI Master Input Slave Output line

When SPI is in master mode, MISO receives data from the slave peripheral. When SPI

is in slave mode, MISO outputs data to the master controller.

8

2

3

I/O

P1.6: Input / Output

CEX3: Capture/Compare External I/O for PCA module 3

SCK: SPI Serial Clock

SCK outputs clock to the slave peripheral

P1.7: Input / Output:

9

I/O

6

T89C51IC2

Rev. C – 3-Dec-01

T89C51IC2

Pin Number

Type

Mnemonic

PLCC44

VQFP44 1.4

Name and Function

CEX4: Capture/Compare External I/O for PCA module 4

MOSI: SPI Master Output Slave Input line

I/O

When SPI is in master mode, MOSI outputs data to the slave peripheral. When SPI is

in slave mode, MOSI receives data from the master controller.

Crystal A 1: Input to the inverting oscillator amplifier and input to the internal clock

generator circuits.

XTALA1

21

15

I

XTALA2

XTALB1

20

2

14

40

O

I

Crystal A 2: Output from the inverting oscillator amplifier

Crystal B 1: (Sub Clock) Input to the inverting oscillator amplifier and input to the

internal clock generator circuits.

XTALB2

1

39

O

Crystal B 2: (Sub Clock) Output from the inverting oscillator amplifier

P2.0-P2.7

24-31

18-25

I/O

Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that

have 1s written to them are pulled high by the internal pull-ups and can be used as

inputs. As inputs, Port 2 pins that are externally pulled low will source current because

of the internal pull-ups. Port 2 emits the high-order address byte during fetches from

external program memory and during accesses to external data memory that use 16-bit

addresses (MOVX @DPTR).In this application, it uses strong internal pull-ups emitting

1s. During accesses to external data memory that use 8-bit addresses (MOVX @Ri),

port 2 emits the contents of the P2 SFR. Some Port 2 pins receive the high order

address bits during EPROM programming and verification:

P2.0 to P2.5 for 16Kb devices

P2.0 to P2.6 for 32Kb devices

P3.0-P3.7

11,

13-19

5,

7-13

I/O

Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that

have 1s written to them are pulled high by the internal pull-ups and can be used as

inputs. As inputs, Port 3 pins that are externally pulled low will source current because

of the internal pull-ups. Port 3 also serves the special features of the 80C51 family, as

listed below.

11

13

14

15

16

17

18

19

5

7

I

O

I

RXD (P3.0): Serial input port

TXD (P3.1): Serial output port

8

INT0 (P3.2): External interrupt 0

INT1 (P3.3): External interrupt 1

T0 (P3.4): Timer 0 external input

T1 (P3.5): Timer 1 external input

WR (P3.6): External data memory write strobe

RD (P3.7): External data memory read strobe

9

I

10

11

12

13

I

O

PI2.0-PI2.1

Port I2: Port I2 is an open drain. It can be used as inputs (must be polarized to Vcc

with external resistor to prevent any parasitic current consumption).

34, 12

34

28, 6

28

I/O

SCL (PI2.0): I2C Serial Clock

SCL output the serial clock to slave peripherals

SCL input the serial clock from master

12

6

SDA (PI2.1): I2C Serial Data

SDA is the bidirectional I2C data line

7

Rev. C – 3-Dec-01

Pin Number

Type

Mnemonic

PLCC44

VQFP44 1.4

Name and Function

Reset: A high on this pin for two machine cycles while the oscillator is running, resets

the device. An internal diffused resistor to V_SSpermits a power-on reset using only an

external capacitor to V_CC. This pin is an output when the hardware watchdog forces a

system reset.

RST

10

33

4

I/O

ALE/PROG

27

O (I)

Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the

address during an access to external memory. In normal operation, ALE is emitted at a

constant rate of 1/6 (1/3 in X2 mode) the oscillator frequency, and can be used for

external timing or clocking. Note that one ALE pulse is skipped during each access to

external data memory. This pin is also the program pulse input (PROG) during Flash

programming. ALE can be disabled by setting SFR’s AUXR.0 bit. With this bit set, ALE

will be inactive during internal fetches.

PSEN

32

35

26

29

O

Program Strobe ENable: The read strobe to external program memory. When

executing code from the external program memory, PSEN is activated twice each

machine cycle, except that two PSEN activations are skipped during each access to

external data memory. PSEN is not activated during fetches from internal program

memory.

EA

I

External Access Enable: EA must be externally held low to enable the device to fetch

code from external program memory locations 0000H to FFFFH (RD). If security level 1

is programmed, EA will be internally latched on Reset.

8

T89C51IC2

Rev. C – 3-Dec-01

T89C51IC2

Ordering Information

Table 2. Possible order entries

Flash

Memory

Size

Supply

Voltage

Temperature

Range

Max

Frequency

Part Number

Package

PLCC44

VQFP44

Packing

Stick

T89C51IC2-SLSCM

T89C51IC2-SLSIM

T89C51IC2-SLSIL

T89C51IC2-RLTIM

T89C51IC2-RLTIL

32 Kbytes

5V

Commercial

Industrial

20 MHz

5V

Stick

3V

Industrial

Stick

5V

Industrial

Tray

3V

Commercial

Tray

Note:

Purchase of Atmel I²C components conveys a license under the Philips I²C Patent’s right

to use these components in an I²C system, provided that the system conforms to the I²C

Standard Specification as defined by Philips.

9

Rev. C – 3-Dec-01

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Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty

which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors

which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does

not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted

by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical

components in life support devices or systems.

Printed on recycled paper.


型号：	T89C51IC2
厂家：	ATMEL
描述：	8-bit Microcontroller with Flash and I2C Interface 8位微控制器与闪存和I2C接口闪存微控制器
文件：	总10页 (文件大小：163K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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