AS8S512K32Q-15/XT [AUSTIN]

512K x 32 SRAM SRAM MEMORY ARRAY; 512K ×32的SRAM SRAM存储器阵列
AS8S512K32Q-15/XT
型号: AS8S512K32Q-15/XT
厂家: AUSTIN SEMICONDUCTOR    AUSTIN SEMICONDUCTOR
描述:

512K x 32 SRAM SRAM MEMORY ARRAY
512K ×32的SRAM SRAM存储器阵列

存储 内存集成电路 静态存储器
文件: 总14页 (文件大小:196K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
512K x 32 SRAM  
PIN ASSIGNMENT  
SRAM MEMORY ARRAY  
(Top View)  
AVAILABLE AS MILITARY  
SPECIFICATIONS  
68 Lead CQFP (Q, Q1 & Q2)  
Military SMD Pinout Option  
SMD 5962-94611 (Military Pinout)  
MIL-STD-883  
1 0  
1 1  
1 2  
1 3  
1 4  
1 5  
1 6  
1 7  
1 8  
1 9  
2 0  
2 1  
2 2  
2 3  
2 4  
2 5  
2 6  
6 0  
5 9  
5 8  
5 7  
5 6  
5 5  
5 4  
5 3  
5 2  
5 1  
5 0  
4 9  
4 8  
4 7  
4 6  
4 5  
4 4  
I/O 16  
I/O 17  
I/O 18  
I/O 19  
I/O 20  
I/O 21  
I/O 22  
I/O 23  
GND  
I/O 24  
I/O 25  
I/O 26  
I/O 27  
I/O 28  
I/O 29  
I/O 30  
I/O 31  
I/O 0  
I/O 1  
I/O 2  
I/O 3  
FEATURES  
Operation with single 5V supply  
I/O 4  
I/O 5  
I/O 6  
I/O 7  
GND  
I/O 8  
I/O 9  
I/O 10  
I/O 11  
I/O 12  
I/O 13  
I/O 14  
I/O 15  
High speed: 12, 15, 17, 20, 25 and 35ns  
Built in decoupling caps for low noise  
Organized as 512Kx32 , byte selectable  
Low power CMOS  
TTL Compatible Inputs and Outputs  
Future offerings  
3.3V Power Supply  
OPTIONS  
MARKINGS  
Operating Temperature Ranges  
Military (-55oC to +125oC)  
Industrial (-40oC to +85oC)  
XT  
IT  
68 Lead CQFP  
Commercial Pinout Option (Q & Q1 with A)  
Timing  
12ns  
15ns  
17ns  
20ns  
25ns  
35ns  
45ns  
55ns  
-12  
-15  
-17  
-20  
-25  
-35  
-45  
-55  
1 0  
1 1  
1 2  
1 3  
1 4  
1 5  
1 6  
1 7  
1 8  
1 9  
2 0  
2 1  
2 2  
2 3  
2 4  
2 5  
2 6  
6 0  
5 9  
5 8  
5 7  
5 6  
5 5  
5 4  
5 3  
5 2  
5 1  
5 0  
4 9  
4 8  
4 7  
4 6  
4 5  
4 4  
I/O 14  
I/O 13  
I/O 12  
Vss  
I/O 11  
I/O 10  
I/O 9  
I/O 8  
Vcc  
I/O 7  
I/O 6  
I/O 5  
I/O 4  
Vss  
I/O 3  
I/O 2  
I/O 1  
I/O17  
I/O18  
I/O19  
Vss  
I/O20  
I/O21  
I/O22  
I/O23  
Vcc  
I/O24  
I/O25  
I/O26  
I/O27  
Vss  
I/O28  
I/O29  
I/O30  
• Package  
Ceramic Quad Flatpack  
Ceramic Quad Flatpack  
Ceramic Quad Flatpack  
Pin Grid Array  
Q
Q1  
Q2  
P
66 Lead PGA (P)  
Low Power Data Retention Mode  
L
Military SMD Pinout  
Pinout  
Military  
Commercial  
(no indicator)  
A*  
CS  
CS  
*(available with Q package only)  
\
GENERAL DESCRIPTION  
The Austin Semiconductor, Inc. AS8S512K32 and  
AS8S512K32A are 16 Megabit CMOS SRAM Modules organized as  
512Kx32 bits. These devices achieve high speed access, low power  
consumption and high reliability by employing advanced CMOS  
memory technology.  
CS  
CS  
This military temperature grade product is ideally suited for  
military and space applications.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
1
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
CS  
CS  
CS  
CS  
C
CS4\  
M3  
CS3\  
I/O 24 - I/O 31  
M2  
CS2\  
I/O 16 - I/O 23  
M1  
I/O 8 - I/O 15  
CS1\  
M0  
WE\  
OE\  
A0 - A18  
I/O 0 - I/O 7  
COMMERCIAL PINOUT/BLOCK DIAGRAM  
MILITARY PINOUT/BLOCK DIAGRAM  
TRUTH TABLE  
OE\  
L
\ WE\  
CS  
I/O  
DOUT  
DIN  
MODE  
Read  
POWER  
ACTIVE  
L
H
X
X
L
L
ACTIVE  
Write(2)  
Standby  
H
X
STANDBY  
High Z  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
2
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
This is a stress rating only and functional operation on the  
device at these or any other conditions above those indicated  
in the operational sections of this specification is not implied.  
Exposure to absolute maximum rating conditions for extended  
periods may affect reliability.  
**Junction temperature depends upon package type, cycle time,  
loading, ambient temperature and airflow. See theApplication  
Information section at the end of this datasheet for more infor-  
mation.  
ABSOLUTE MAXIMUM RATINGS*  
Voltage of Vcc Supply Relative to Vss......................-.5V to +7V  
Storage Temperature............................................-65°C to +150°C  
Short Circuit Output Current(per I/O).................................20mA  
Voltage onAny Pin Relative to Vss....................-.5V to Vcc+1V  
Maximum JunctionTemperature**...................................+150°C  
*Stresses greater than those listed under “Absolute Maximum  
Ratings” may cause permanent damage to the device.  
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS  
(-55oC < TA < 125oC and -40oC to +85oC;Vcc = 5V +10%)  
DESCRIPTION  
CONDITIONS SYMBOL MIN  
MAX UNITS NOTES  
VIH  
VIL  
ILI1  
ILI2  
VCC+.5  
Input High (logic 1) Voltage  
Input Low (logic 1) Voltage  
Input Leakage Current ADD,OE  
Input Leakage Current WE, CE  
2.2  
-0.5  
-10  
-10  
V
1
0.8  
V
µA  
µA  
1,2  
10  
0V<VIN<VCC  
10  
Output(s) Disabled  
0V<VOUT<VCC  
Output Leakage Current I/O  
ILO  
-10  
2.4  
10  
µA  
IOH = 4.0mA  
IOL = 8.0mA  
VOH  
VOL  
VCC  
Output High Voltage  
Output Low Voltage  
Supply Voltage  
V
V
V
1
1
1
0.4  
5.5  
4.5  
MAX  
DESCRIPTION  
CONDITIONS  
SYMBOL -12 -15 -17 -20 -25 -35 -45 -55 UNITS NOTES  
CS\<VIL; VCC = MAX  
f = MAX = 1/ tRC (MIN)  
Outputs Open  
Power Supply  
Current: Operating  
Icc  
250 200 700 650 600 570 570 550 mA  
3,13  
CS\>VIH; VCC = MAX  
f = MAX = 1/ tRC (MIN)  
Outputs Open  
Power Supply  
Current: Standby  
ISBT1  
80  
80  
80 240 240 190 190 150 150 mA  
3, 13  
VIN = VCC - 0.2V, or  
VSS +0.2V  
ISBT2  
CMOS Standby  
80  
80  
80  
80  
80  
80  
80  
mA  
VCC=Max; f = 0Hz  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
3
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
CAPACITANCE (VIN = 0V, f = 1MHz, TA = 25oC)1  
SYMBOL  
PARAMETER  
A0 - A18 Capacitance  
MAX  
UNITS  
CADD  
COE  
50  
pF  
OE\ Capacitance  
50  
20  
20  
50  
pF  
pF  
pF  
pF  
CWE, CCS  
WE\ and CS\ Capacitance  
I/O 0- I/O 31 Capacitance  
WE\ Capacitance  
CIO  
CWE ("A" version)  
NOTE:  
1. This parameter is sampled.  
AC TEST CONDITIONS  
Test Specifications  
Input pulse levels.........................................VSS to 3V  
Input rise and fall times.........................................5ns  
Input timing reference levels...............................1.5V  
Output reference levels........................................1.5V  
Output load..............................................See Figure 1  
I
OL  
Current Source  
Device  
Under  
Test  
-
+
Vz = 1.5V  
(Bipolar  
Supply)  
+
Ceff = 50pf  
I
Current Source  
OH  
NOTES:  
Figure 1  
Vz is programmable from -2V to + 7V.  
IOL and IOH programmable from 0 to 16 mA.  
Vz is typically the midpoint of VOH and VOL.  
IOL and IOH are adjusted to simulate a typical resistive load  
circuit.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
4
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS  
(NOTE 5) (-55oC<TA < 125oC and -40oC to +85oC;VCC = 5V +10%)  
-12  
-15  
-17  
-20  
-25  
-35  
-45  
-55  
DESCRIPTION  
READ CYCLE  
SYMBOL  
UNITS NOTES  
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX  
tRC  
tAA  
tACS  
tOH  
tLZCS  
tHZCS  
tAOE  
tLZOE  
tHZOE  
12  
15  
READ cycle time  
17  
20  
25  
35  
45  
55  
ns  
ns  
ns  
ns  
12  
12  
15  
15  
Address access time  
17  
17  
20  
20  
25  
25  
35  
35  
45  
45  
55  
55  
Chip select access time  
Output hold from address change  
Chip select to output in Low-Z  
Chip select to output in High-Z  
Output enable access time  
Output enable to output in Low-Z  
Output disable to output in High-Z  
WRITE CYCLE  
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
ns  
ns  
ns  
ns  
ns  
4,6,7  
4,6,7  
7
7
8
8
9
9
10  
10  
12  
12  
15  
15  
20  
20  
20  
20  
0
0
0
0
0
0
0
0
4,6  
4,6  
12  
12  
12  
15  
20  
20  
tWC  
tCW  
WRITE cycle time  
12  
10  
10  
2
15  
12  
12  
2
17  
15  
15  
2
20  
15  
15  
2
25  
17  
17  
2
35  
20  
20  
2
45  
25  
25  
2
55  
25  
25  
2
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip select to end of write  
Address valid to end of write  
Address setup time  
tAW  
tAS  
tAH  
Address hold from end of write  
WRITE pulse width  
1
1
1
1
1
1
1
1
tWP1  
tWP2  
tDS  
10  
10  
8
12  
12  
10  
0
15  
15  
12  
0
15  
15  
10  
0
17  
17  
12  
0
20  
20  
15  
0
25  
25  
20  
0
25  
25  
20  
0
WRITE pulse width  
Data setup time  
tDH  
tLZWE  
tHZWE  
Data hold time  
0
Write disable to output in Low-z  
Write enable to output in High-Z  
2
2
2
2
2
2
2
2
4,6,7  
4,6,7  
7
8
9
11  
13  
15  
15  
15  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
5
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
READ CYCLE NO. 1  
t
RC  
ADDRESS  
t
AA  
t
OH  
PREVIOUS DATA VALID  
DATA VALID  
DATA I/O  
READ CYCLE NO. 2  
t
RC  
ADDRESS  
t
AA  
CS\  
t
ACS  
t
t
HZCS  
LZCS  
OE\  
t
t
HZOE  
AOE  
LZOE  
t
DATA VALID  
DATAI/O  
HIGHIMPEDANCE  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
6
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
WRITE CYCLE NO. 1  
(Chip Select Controlled)  
t
WC  
ADDRESS  
t
t
AW  
t
AH  
CW  
CS\  
t
t
AS  
WP11  
WE\  
t
LZWE  
t
t
t
HZWE  
DS  
DATA VALID  
DH  
DATAI/O  
WRITE CYCLE NO. 2  
(Write Enable Controlled)  
t
WC  
ADDRESS  
t
AW  
t
t
t
AS  
AH  
CW  
CS\  
t
WP21  
WE\  
t
t
DH  
DS  
DATA VALID  
DATAI/O  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
7
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
NOTES  
1. All voltages referenced to VSS (GND).  
2. -2V for pulse width <20ns.  
7. At any given temperature and voltage condition,  
tHZCS, is less than tLZCS, and tHZWE is less than tLZWE  
.
3. ICC is dependent on output loading and cycle rates.  
8. WE\ is HIGH for READ cycle.  
9. Device is continuously selected. Chip selects and output  
enable are held in their active state.  
10. Address valid prior to or coincident with latest occurring  
chip enable.  
11. tRC= READ cycle time.  
12. Chip enable (CS\) and write enable (WE\) can initiate and  
terminate a WRITE cycle.  
1
HZ.  
unloaded, and f=  
t
RC(MIN)  
The specified value applies with the outputs  
4. This parameter guaranteed but not tested.  
5. Test conditions as specified with output loading as  
shown in Fig. 1 unless otherwise noted.  
6. tHZCS, tHZOE and tHZWE are specified with CL= 5pF as in Fig. 2.  
Transition is measured +/- 200 mV typical from steady state  
voltage, allowing for actual tester RC time constant.  
13. ICC is for 32 bit mode.  
LOW POWER CHARACTERISTICS (L Version Only)  
DESCRIPTION  
CONDITIONS  
SYMBOL  
MIN  
MAX  
UNITS  
NOTES  
VCC for Retention Data  
VDR  
2
V
All Inputs @ Vcc + 0.2V  
or Vss + 0.2V,  
VCC = 2V  
CC = 3V  
ICCDR  
ICCDR  
20  
mA  
mA  
Data Retention Current  
V
28*  
CS\ = Vcc + 0.2V  
Chip Deselect to Data  
Retention Time  
0
ns  
ns  
4
t
CDR  
Operation Recovery Time  
4, 11  
t
t
RC  
R
* -12 and -15 have a 32mA limit.  
LOW VCC DATA RETENTION WAVEFORM  
DATA RETENTION MODE  
VCC  
4.5V  
4.5V  
VDR>2V  
tCDR  
R
t
VDR  
CS\ 1-4  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
8
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
MECHANICAL DEFINITIONS*  
ASI Case #702 (Package Designator Q)  
SMD 5962-94611, Case Outline M  
4 x D2  
DETAILA  
4 x D1  
D
R
1o - 7o  
B
b
e
L1  
SEE DETAIL A  
A1  
A
A2  
E
SMD SPECIFICATIONS  
SYMBOL  
MIN  
MAX  
A
A1  
A2  
B
b
D
0.123  
0.118  
0.000  
0.200  
0.186  
0.020  
0.010 REF  
0.800 BSC  
0.013  
0.017  
D1  
D2  
E
0.870  
0.980  
0.936  
0.890  
1.000  
0.956  
e
0.050 BSC  
R
L1  
0.005  
0.035  
---  
0.045  
*All measurements are in inches.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
9
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
MECHANICAL DEFINITIONS*  
ASI Package Designator Q2  
D2  
D1  
D
1
b
D3  
e
ASI PACKAGE SPECIFICATION  
A
Symbol  
A
Max  
.200  
.080  
.017  
Min  
A1  
b
.070  
.013  
R
.010 REF  
.800 BSC  
B
D
D1  
D2  
.870  
1.010  
.890  
1.030  
L1  
.975  
D3  
e
R
L1  
.995  
A1  
.050 BSC  
.010 TYP  
.050  
B
.065  
Dimensions in inches  
*All measurements are in inches.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
10  
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
MECHANICAL DEFINITIONS*  
ASI Case #904 (Package Designator P )  
SMD 5962-94611, Case Outline T  
4 x D  
A
D1  
D2  
A1  
Pin 56  
Pin 1  
(identified by  
0.060 square pad)  
φb1  
E1  
e
φb  
Pin 66  
Pin 11  
e
L
SMD SPECIFICATIONS  
SYMBOL  
MIN  
MAX  
0.181  
0.035  
0.020  
0.055  
1.085  
A
A1  
φb  
φb1  
D
0.144  
0.025  
0.016  
0.045  
1.065  
D1/E1  
D2  
e
1.000 TYP  
0.600 TYP  
0.100 TYP  
L
0.145  
0.155  
*All measurements are in inches.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
11  
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
MECHANICAL DEFINITIONS*  
ASI Case (Package Designator Q1)  
SMD 5962-94611, Case Outline A  
SMD SPECIFICATIONS  
SYMBOL  
MIN  
---  
0.054  
0.013  
MAX  
0.200  
---  
A
A1  
b
0.017  
0.010 TYP  
B
c
0.009  
0.980  
0.870  
0.012  
1.000  
0.890  
D/E  
D1/E1  
D2/E2  
e
0.800 BSC  
0.050 BSC  
L
0.035  
0.045  
0.010 TYP  
R
*All measurements are in inches.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
12  
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
ORDERING INFORMATION  
EXAMPLE: AS8S512K32Q-15/883C  
EXAMPLE: AS8S512K32Q1-55/IT  
Package Speed  
Device Number  
Device  
Package  
Type  
Q1  
Options** Process  
Options**  
Speed ns Process  
Type  
Q
ns  
-12  
-15  
-17  
-20  
-25  
-35  
-45  
-55  
Number  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
/*  
/*  
/*  
/*  
/*  
/*  
/*  
/*  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
-12  
-15  
-17  
-20  
-25  
-35  
-45  
-55  
/*  
/*  
/*  
/*  
/*  
/*  
/*  
/*  
Q
Q1  
Q
Q1  
Q
Q1  
Q
Q1  
Q
Q1  
Q
Q1  
Q
Q1  
EXAMPLE: AS8S512K32P-25L/XT  
EXAMPLE: AS8S512K32Q2-35L/XT  
Package Speed  
Device Number  
Device  
Package  
Type  
Q2  
Options** Process  
Options**  
Speed ns Process  
Type  
ns  
-12  
-15  
-17  
Number  
AS8S512K32  
AS8S512K32  
AS8S512K32  
P
P
P
/*  
/*  
/*  
AS8S512K32  
AS8S512K32  
AS8S512K32  
-12  
-15  
-17  
/*  
/*  
/*  
Q2  
Q2  
AS8S512K32  
P
-20  
/*  
AS8S512K32  
Q2  
-20  
/*  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
P
P
P
P
-25  
-35  
-45  
-55  
/*  
/*  
/*  
/*  
AS8S512K32  
AS8S512K32  
AS8S512K32  
AS8S512K32  
Q2  
Q2  
Q2  
Q2  
-25  
-35  
-45  
-55  
/*  
/*  
/*  
/*  
*AVAILABLE PROCESSES  
IT = IndustrialTemperature Range  
XT = Extended Temperature Range  
Q = Full Military Processing  
-40oC to +85oC  
-55oC to +125oC  
-55oC to +125oC  
-55oC to +125oC  
SPACE= Class K Equivalent  
**DEFINITION OF OPTIONS  
no indicator = Military Pinout  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
13  
SRAM  
AS8S512K32  
& AS8S512K32A  
Austin Semiconductor, Inc.  
ASI TO DSCC PART NUMBER  
CROSS REFERENCE  
Package Designator Q  
Package Designator P  
ASI Part #  
AS8S512K32Q-12/Q  
AS8S512K32Q-15/Q  
AS8S512K32Q-17/Q  
AS8S512K32Q-20/Q  
AS8S512K32Q-25/Q  
AS8S512K32Q-35/Q  
AS8S512K32Q-45/Q  
AS8S512K32Q-55/Q  
SMD Part #  
5962-9461120HMX  
5962-9461119HMX  
5962-9461110HMX  
5962-9461109HMX  
5962-9461108HMX  
5962-9461107HMX  
5962-9461106HMX  
5962-9461105HMX  
ASI Part #  
AS8S512K32P-12/Q  
AS8S512K32Q-15/Q  
AS8S512K32P-17/Q  
AS8S512K32P-20/Q  
AS8S512K32P-25/Q  
AS8S512K32P-35/Q  
AS8S512K32P-45/Q  
AS8S512K32P-55/Q  
SMD Part #  
5962-9461120HTA  
5962-9461119HTA  
5962-9461110HTA  
5962-9461109HTA  
5962-9461108HTA  
5962-9461107HTA  
5962-9461106HTX  
5962-9461105HTX  
AS8S512K32Q-12/Q  
AS8S512K32Q-15/Q  
AS8S512K32Q-17/Q  
AS8S512K32Q-20/Q  
AS8S512K32Q-25/Q  
AS8S512K32Q-35/Q  
AS8S512K32Q-45/Q  
AS8S512K32Q-55/Q  
5962-9461118HMX  
5962-9461117HMX  
5962-9461116HMX  
5962-9461115HMX  
5962-9461114HMX  
5962-9461113HMX  
5962-9461112HMX  
5962-9461111HMX  
AS8S512K32Q-15/Q  
AS8S512K32P-12/Q  
AS8S512K32P-17/Q  
AS8S512K32P-20/Q  
AS8S512K32P-25/Q  
AS8S512K32P-35/Q  
AS8S512K32P-45/Q  
AS8S512K32P-55/Q  
5962-9461117HTA  
5962-9461118HTA  
5962-9461116HTA  
5962-9461115HTA  
5962-9461114HTA  
5962-9461113HTA  
5962-9461112HTA  
5962-9461111HTA  
Package Designator Q1  
ASI Part #  
AS8S512K32Q1-12/Q  
AS8S512K32Q1-15/Q  
AS8S512K32Q1-17/Q  
AS8S512K32Q1-20/Q  
AS8S512K32Q1-25/Q  
AS8S512K32Q1-35/Q  
AS8S512K32Q1-45/Q  
AS8S512K32Q1-55/Q  
SMD Part #  
5962-9461120HAX  
5962-9461119HAX  
5962-9461110HAX  
5962-9461109HAX  
5962-9461108HAX  
5962-9461107HAX  
5962-9461106HAX  
5962-9461105HAX  
AS8S512K32Q1-12/Q  
AS8S512K32Q1-15/Q  
AS8S512K32Q1-17/Q  
AS8S512K32Q1-20/Q  
AS8S512K32Q1-25/Q  
AS8S512K32Q1-35/Q  
AS8S512K32Q1-45/Q  
AS8S512K32Q1-55/Q  
5962-9461118HAX  
5962-9461117HAX  
5962-9461116HAX  
5962-9461115HAX  
5962-9461114HAX  
5962-9461113HAX  
5962-9461112HAX  
5962-9461111HAX  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8S512K32 & AS8S512K32A  
Rev. 6.0 6/05  
14  

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