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MT5C1001C-20L/XT [AUSTIN]

1M x 1 SRAM SRAM MEMORY ARRAY; 1M ×1 SRAM SRAM存储器阵列
MT5C1001C-20L/XT
型号： MT5C1001C-20L/XT
厂家： AUSTIN SEMICONDUCTOR    AUSTIN SEMICONDUCTOR
描述：

1M x 1 SRAM SRAM MEMORY ARRAY
1M ×1 SRAM SRAM存储器阵列

存储 静态存储器
文件： 总13页 (文件大小：95K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
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SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
1M x 1 SRAM  
SRAM MEMORY ARRAY  
PIN ASSIGNMENT  
(Top View)  
32-Pin LCC (EC)  
32-Pin SOJ (DCJ)  
AVAILABLE AS MILITARY  
28-Pin DIP (C)  
(400 MIL)  
SPECIFICATIONS  
• SMD 5962-92316  
• MIL-STD-883  
A10  
A11  
A12  
NC  
A13  
A14  
A15  
NC  
A16  
A17  
A18  
A19  
NC  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
Vcc  
NC  
A9  
A8  
A7  
A6  
A5  
A4  
A3  
NC  
A2  
NC  
A1  
A0  
D
A10  
A11  
A12  
A13  
A14  
A15  
NC  
1
2
3
4
5
6
7
8
9
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
Vcc  
A9  
A8  
A7  
A6  
A5  
A4  
NC  
A3  
A2  
A1  
A0  
D
FEATURES  
• High Speed: 20, 25, 35, and 45  
• Battery Backup: 2V data retention  
• Low power standby  
• Single +5V (+10%) Power Supply  
• Easy memory expansion with CE\ and OE\ options.  
• All inputs and outputs are TTL compatible  
• Three-state output  
9
A16  
A17  
10  
11  
12  
13  
14  
15  
16  
A18 10  
A19 11  
Q
12  
Q
WE\  
Vss  
WE\ 13  
Vss 14  
CE\  
CE\  
32-Pin Flat Pack (F)  
OPTIONS  
• Timing  
MARKING  
1
A10  
Vcc  
NC  
A9  
A8  
A7  
A6  
A5  
A4  
A3  
NC  
A2  
NC  
A1  
A0  
D
3 2  
2
A11  
A12  
NC  
A13  
A14  
A15  
NC  
A16  
A17  
A18  
A19  
NC  
3 1  
3
3 0  
20ns access  
25ns access  
35ns access  
45ns access  
55ns access  
70ns access  
-20  
4
2 9  
5
2 8  
-25  
-35  
-45  
-55*  
-70*  
6
2 7  
7
2 6  
8
2 5  
9
2 4  
1 0  
1 1  
1 2  
1 3  
1 4  
1 5  
1 6  
2 3  
2 2  
2 1  
2 0  
1 9  
1 8  
1 7  
Q
WE\  
Vss  
• Package(s)  
CE\  
Ceramic DIP (400 mil)  
CeramicLCC  
Ceramic Flatpack  
Ceramic SOJ  
C
EC  
F
No. 109  
No. 207  
No. 303  
No. 501  
GENERAL DESCRIPTION  
DCJ  
The MT5C1001 employs low power, high-performance  
silicon-gate CMOS technology. Static design eliminates the  
need for external clocks or timing strobes while CMOS circuitry  
reduces power consumption and provides for greater  
reliability.  
• OperatingTemperature Ranges  
Industrial (-40oC to +85oC)  
Military (-55oC to +125oC)  
IT  
XT  
For flexibility in high-speed memory applications, ASI  
offers chip enable (CE\) and output enable (OE\) capability.  
These enhancements can place the outputs in High-Z for addi-  
tional flexibility in system design. Writing to these devices is  
accomplished when write enable (WE|) and CE\ inputs are both  
LOW. Reading is accomplished when WE\ remains HIGH while  
CE\ and OE\ go LOW. The devices offer a reduced power  
standby mode when disabled. This allows system designs to  
achieve low standby power requirements.  
• 2V data retention/low power  
L
*Electrical characteristics identical to those provided for the  
45ns access devices.  
For more products and information  
please visit our web site at  
The “L” version provides an approximate 50 percent  
www.austinsemiconductor.com  
reduction in CMOS standby current (ISBC2) over the standard  
version.  
All devices operation from a single +5V power supply  
and all inputs and outputs are fully TTL compatible.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
1
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
FUNCTIONAL BLOCK DIAGRAM  
VCC  
Vss  
A6  
A5  
D
A4  
Q
1,048,576-BIT  
MEMORY ARRAY  
A3  
CE\  
A15  
A14  
A13  
A8  
512 rows x 2048  
columns  
WE\  
POWER  
DOWN  
A7  
COLUMN DECODER  
A2 A1 A16 A0 A17 A18 A19 A10 A9 A12 A11  
TRUTHTABLE  
PIN ASSIGNMENTS  
PIN  
ASSIGNMENT  
MODE  
CE\  
WE\  
X
H
OUTPUT  
HIGH-Z  
Q
POWER  
STANDBY  
ACTIVE  
STANDBY  
READ  
H
L
A0-A19  
Address Inputs  
WE\  
CE\  
D
Write Enable  
Chip Enable  
Data Input  
WRITE  
L
L
HIGH-Z  
ACTIVE  
Q
NC  
Data Output  
No Connection  
VCC  
VSS  
+5V Power Supply  
Ground  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
2
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
*Stresses greater than those listed under "Absolute Maximum  
Ratings" may cause permanent damage to the device. This is  
a stress rating only and functional operation of the device at  
these or any other conditions above those indicated in the  
operation section of this specification is not implied. Exposure  
to absolute maximum rating conditions for extended periods  
may affect reliability.  
ABSOLUTE MAXIMUM RATINGS*  
Voltage onAny Input Relative to Vss................................-.5V to +7V  
Voltage on Vcc Supply Relative to Vss...............................-.5V to +7V  
VoltageApplied to Q............................................................-.5V to +6V  
Storage Temperature......................................................-65oC to +150oC  
Power Dissipation..............................................................................1W  
Short Circuit Output Current.........................................................20mA  
Lead Temperature (soldering 10 seconds)....................................+260oC  
Junction Temperature..................................................................+175oC  
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS  
(-55oC < TC < 125oC; VCC = 5V +10%)  
DESCRIPTION  
CONDITIONS  
SYMBOL  
MIN  
2.2  
-0.5  
-5  
MAX  
VCC+0.5  
0.8  
UNITS  
NOTES  
1
VIH  
V
Input High (Logic 1) Voltage  
Input Low (Logic 0) Voltage  
Input Leakage Current  
VIL  
ILI  
V
1, 2  
µA  
0V ≤ VIN ≤ VCC  
5
Output(s) disabled  
0V < VOUT < VCC  
ILO  
Output Leakage Current  
µA  
V
-5  
5
0.4  
I
OH = -4.0mA  
VOH  
VOL  
Output High Voltage  
Output Low Voltage  
2.4  
1
1
IOL = 8.0mA  
V
MAX  
PARAMETER  
CONDITIONS  
SYM  
-20  
-25  
-35  
-45 UNITS NOTES  
CE\ < VIL; VCC = MAX  
f = MAX = 1/tRC (MIN)  
Output Open  
Power Supply  
Current: Operating  
125  
50  
120  
115  
110  
35  
mA  
mA  
3
I
cc  
CE\ > VIH; VCC = MAX  
f = MAX = 1/tRC (MIN)  
Output Open  
Power Supply  
Current: Standby  
45  
25  
40  
25  
ISBT1  
CE\ > VIH; All Other Inputs  
ISBT2  
25  
25  
mA  
< VIH or > VIH, VCC = MAX  
f = 0 Hz  
CE\ > VCC -0.2V; VCC = MAX  
VIL < VSS +0.2V  
ISBC2  
10  
5
10  
5
10  
5
10  
5
mA  
mA  
VIH > VCC -0.2V; f = 0 Hz  
ISBC2  
"L" Version Only  
CAPACITANCE  
PARAMETER  
CONDITIONS  
SYMBOL  
MAXIMUM  
UNITS  
NOTES  
CI  
Input Capacitance (A3-A5, A15 -A17)  
Output Capactiance (Q)  
10  
pF  
pF  
pF  
4
4
TA = 25oC, f = 1MHz  
Co  
CI  
8
8
VCC = 5V  
s)  
Input Capacitance: (All Other Input  
4
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
3
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS  
(Note 5) (-55oC < TC < 125oC;VCC = 5V +10%)  
-20  
-25  
-35  
-45  
DESCRIPTION  
READ CYCLE  
MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES  
SYMBOL  
tRC  
tAA  
tACE  
tOH  
READ cycle time  
20  
25  
35  
45  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address access time  
20  
20  
25  
25  
35  
35  
45  
45  
Chip Enable access time  
Output hold from address change  
Chip Enable to output in Low-Z  
Chip disable to output in High-Z  
Chip Enable to power-up time  
3
3
3
3
3
3
3
3
tLZCE  
tHZCE  
tPU  
4, 6, 7  
8
10  
25  
15  
35  
15  
45  
4, 6, 7  
0
0
0
0
4
4
tPD  
Chip disable to power-down time  
WRITE CYCLE  
20  
tWC  
tCW  
tAW  
WRITE cycle time  
20  
15  
15  
0
25  
16  
16  
0
35  
20  
20  
0
45  
25  
25  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip Enable to end of write  
Address valid to end of write  
Address setup time  
tAS  
tAH  
Address hold from end of write  
WRITE pulse width  
1
1
1
1
tWP  
15  
8
16  
10  
0
20  
13  
0
25  
15  
0
tDS  
Data setup time  
tDH  
Data hold time  
0
tLZWE  
tHZWE  
Write disable to output in Low-Z  
Write Enable to output in High-Z  
3
3
3
3
7
0
9
0
10  
0
13  
0
13  
4, 6, 7  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
4
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
ACTEST CONDITIONS  
167Ω  
167Ω  
Input pulse levels ................................... Vss to 3.0V  
Input rise and fall times ....................................... 5ns  
Input timing reference levels ............................. 1.5V  
Output reference levels ..................................... 1.5V  
Output load .............................. See Figures 1 and 2  
Q
Q
VTH =1.73V  
VTH =1.73V  
30pF  
5pF  
Fig. 1 Output Load  
Equivalent  
Fig. 2 Output Load  
Equivalent  
allowing for actual tester RC time constant.  
7. At any given temperature and voltage condition,  
NOTES  
1. All voltages referenced to VSS (GND).  
2. -3V for pulse width < 20ns  
tHZCE is less than tLZCE, and tHZWE is less than tLZWE and  
3. ICC is dependent on output loading and cycle rates.  
The specified value applies with the outputs  
t
HZOE is less than tLZOE.  
8. WE\ is HIGH for READ cycle.  
unloaded, and f =  
1
Hz.  
9. Device is continuously selected. Chip enables and  
output enables are held in their active state.  
10. Address valid prior to, or coincident with, latest  
occurring chip enable.  
11. tRC = Read Cycle Time.  
12. Chip enable (CE\) and write enable (WE\) can initiate and  
terminate a WRITE cycle.  
tRC (MIN)  
4. This parameter is guaranteed but not tested.  
5. Test conditions as specified with the output loading  
as shown in Fig. 1 unless otherwise noted.  
6. tLZCE, tLZWE, tLZOE, t HZCE, tHZOE and tHZWE are  
specified with CL = 5pF as in Fig. 2. Transition is  
measured ±200mV typical from steady state voltage,  
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)  
DESCRIPTION  
CC for Retention Data  
SYMBOL  
VDR  
MIN  
2
MAX  
--  
UNITS  
V
NOTES  
CONDITIONS  
V
VCC = 2V  
VCC = 3V  
ICCDR  
1.0  
mA  
CE\ > (VCC - 0.2V)  
and  
Data Retention Current  
VIN > (VCC - 0.2V)  
1.5  
--  
mA  
ns  
or < 0.2V  
tCDR  
tR  
Chip Deselect to Data  
Retention Time  
0
4
tRC  
4, 11  
Operation Recovery Time  
ns  
LOWVcc DATA RETENTIONWAVEFORM  
DATA RETENTION MODE  
VCC  
4.5V  
4.5V  
VDR > 2V  
tCDR  
tR  
VIH  
VIL  
VDR  
CE\  
DON’T CARE  
UNDEFINED  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
5
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
READ CYCLE NO. 1 8, 9  
t
RC
VALID  
ADDRESS  
DQ  
t
AA
tOH  
PREVIOUS DATA VALID  
DATA VALID  
READ CYCLE NO. 2 7, 8, 10  
tR  
C
CE\  
tLZCE  
t
tHZCE  
E  
ACE  
DATA VALID  
Q  
Icc  
tPU  
tP  
D
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
6
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
WRITE CYCLE NO. 1 12  
(Chip Enabled Controlled)  
tWC  
ADDRESS  
tA  
W
tAH  
tAS  
tCW  
CE\  
tW  
P
WE\  
tDH  
t
DS  
DATA VAILD  
D
Q
HIGH Z  
7, 12  
WRITE CYCLE NO. 2  
(Write Enabled Controlled)  
tW  
C
ADDRESS  
tAW  
tAW  
tAH  
tCW  
CE\  
tAS  
t
WP  
WE\  
tDS  
tDH  
tDH  
D
Q
DATA VALID  
tHZWE  
tLZWE  
HIGH-Z  
DON’T CARE  
UNDEFINED  
NOTE: Output enable (OE\) is inactive (HIGH).  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
7
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
MECHANICAL DEFINITIONS*  
ASI Case #109 (Package Designator C)  
SMD #5962-92316, Case Outline T  
D
A
Q
Pin 1  
L
b
e
b1  
E
NOTE  
c
0o to 15o  
E1  
SMD SPECIFICATIONS  
SYMBOL  
MIN  
MAX  
0.095  
0.020  
0.060  
0.012  
1.414  
0.405  
0.410  
A
b
b1  
c
D
E
E1  
e
0.075  
0.016  
0.040  
0.008  
1.386  
0.385  
0.390  
0.100 BSC  
L
Q
0.125  
0.040  
0.175  
0.060  
NOTE: These dimensions are per the SMD. ASI's package dimensional limits  
may differ, but they will be within the SMD limits.  
*All measurements are in inches.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
8
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
MECHANICAL DEFINITIONS*  
ASI Case #207 (Package Designator EC)  
SMD# 5962-92316, Case OutlineY  
A
D1  
L1  
D
L
b1  
e
b
E
b2  
SMD SPECIFICATIONS  
SYMBOL  
MIN  
MAX  
0.100  
0.028  
0.014  
0.066  
0.835  
0.760  
0.408  
A
b
b1  
b2  
D
0.080  
0.022  
0.004  
0.054  
0.815  
0.740  
0.392  
D1  
E
e
0.050 BSC  
L
L1  
0.070  
0.090  
0.080  
0.110  
NOTE: These dimensions are per the SMD. ASI's package dimensional limits  
may differ, but they will be within the SMD limits.  
*All measurements are in inches.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
9
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
MECHANICAL DEFINITIONS*  
ASI Case #303 (Package Designator F)  
SMD #5962-92316, Case Outline Z  
E1  
L
Pin 1  
Index  
e
32  
1
D
b
D1  
17  
16  
Bottom View  
Top View  
A
c
Q
E
SMD SPECIFICATIONS  
MIN MAX  
SYMBOL  
A
b
c
D
D1  
E
E1  
e
0.097  
0.015  
0.004  
0.812  
0.745  
0.324  
0.405  
0.117  
0.019  
0.006  
0.828  
0.755  
0.336  
0.415  
0.050 BSC  
L
Q
0.290  
0.032  
0.310  
0.038  
NOTE: These dimensions are per the SMD. ASI's package dimensional limits  
may differ, but they will be within the SMD limits.  
*All measurements are in inches.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
10  
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
MECHANICAL DEFINITIONS*  
ASI Case #501 (Package Designator DCJ)  
SMD #5962-92316, Case Outline U  
A
D
e
D1  
B1  
E2  
E1  
b
E
A2  
SMD SPECIFICATIONS  
SYMBOL  
MIN  
MAX  
0.153  
0.036  
0.040  
0.019  
0.828  
0.760  
0.415  
0.445  
0.380  
A
A2  
B1  
b
D
D1  
E
E1  
E2  
e
0.135  
0.026  
0.030  
0.015  
0.812  
0.745  
0.405  
0.435  
0.360  
0.050 BSC  
NOTE: These dimensions are per the SMD. ASI's package dimensional limits  
may differ, but they will be within the SMD limits.  
*All measurements are in inches.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
11  
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
ORDERING INFORMATION  
EXAMPLE: MT5C1001EC-45/XT  
EXAMPLE: MT5C1001C-20L/IT  
Device  
Number  
Package Speed  
Device  
Number  
Package Speed  
Options** Process  
Options** Process  
Type  
C
ns  
-20  
-25  
-35  
-40  
-55  
-70  
Type  
EC  
EC  
EC  
EC  
EC  
EC  
ns  
-20  
-25  
-35  
-40  
-55  
-70  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
L
L
L
L
L
L
/*  
/*  
/*  
/*  
/*  
/*  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
L
L
L
L
L
L
/*  
/*  
/*  
/*  
/*  
/*  
C
C
C
C
C
EXAMPLE: MT5C1001DCJ-70/XT  
EXAMPLE: MT5C1001F-25L/883C  
Device  
Number  
Package Speed  
Device  
Number  
Package Speed  
Options** Process  
Options** Process  
Type  
ns  
-20  
-25  
-35  
-40  
-55  
-70  
Type  
DCJ  
DCJ  
DCJ  
DCJ  
DCJ  
DCJ  
ns  
-20  
-25  
-35  
-40  
-55  
-70  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
F
F
F
F
F
F
L
L
L
L
L
L
/*  
/*  
/*  
/*  
/*  
/*  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
MT5C1001  
L
L
L
L
L
L
/*  
/*  
/*  
/*  
/*  
/*  
*AVAILABLE PROCESSES  
IT = IndustrialTemperature Range  
XT = Extended Temperature Range  
883C = Full Military Processing  
-40oC to +85oC  
-55oC to +125oC  
-55oC to +125oC  
** OPTIONS  
L = 2V Data Retention/Low Power  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
12  
SRAM  
MT5C1001  
Limited Availability  
Austin Semiconductor, Inc.  
ASITO DSCC PART NUMBER  
CROSS REFERENCE*  
ASI Package Designator EC  
ASI Package Designator C  
ASI Part #  
SMD Part #  
ASI Part #  
SMD Part #  
MT5C1001EC-20L/883C  
MT5C1001EC-20/883C  
MT5C1001EC-25L/883C  
MT5C1001EC-25/883C  
MT5C1001EC-35L/883C  
MT5C1001EC-35/883C  
MT5C1001EC-45L/883C  
MT5C1001EC-45/883C  
5962-9231608MYA  
5962-9231604MYA  
5962-9231607MYA  
5962-9231603MYA  
5962-9231606MYA  
5962-9231602MYA  
5962-9231605MYA  
5962-9231601MYA  
MT5C1001C-20L/883C  
MT5C1001C-20/883C  
MT5C1001C-25L/883C  
MT5C1001C-25/883C  
MT5C1001C-35L/883C  
MT5C1001C-35/883C  
MT5C1001C-45L/883C  
MT5C1001C-45/883C  
5962-9231608MTA  
5962-9231604MTA  
5962-9231607MTA  
5962-9231603MTA  
5962-9231606MTA  
5962-9231602MTA  
5962-9231605MTA  
5962-9231601MTA  
ASI Package Designator DCJ  
ASI Package Designator F  
ASI Part #  
SMD Part #  
ASI Part #  
SMD Part #  
MT5C1001DCJ-20L/883C  
MT5C1001DCJ-20/883C  
MT5C1001DCJ-25L/883C  
MT5C1001DCJ-25/883C  
MT5C1001DCJ-35L/883C  
MT5C1001DCJ-35/883C  
MT5C1001DCJ-45L/883C  
MT5C1001DCJ-45/883C  
5962-9231608MUA  
5962-9231604MUA  
5962-9231607MUA  
5962-9231603MUA  
5962-9231606MUA  
5962-9231602MUA  
5962-9231605MUA  
5962-9231601MUA  
MT5C1001F-20L/883C  
MT5C1001F-20/883C  
MT5C1001F-25L/883C  
MT5C1001F-25/883C  
MT5C1001F-35L/883C  
MT5C1001F-35/883C  
MT5C1001F-45L/883C  
MT5C1001F-45/883C  
5962-9231608MZA  
5962-9231604MZA  
5962-9231607MZA  
5962-9231603MZA  
5962-9231606MZA  
5962-9231602MZA  
5962-9231605MZA  
5962-9231601MZA  
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C1001  
Rev. 2.1 06/05  
13  

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