AMMP-6120-BLK [AVAGO]
8-24 GHz x2 Frequency Multiplier 5x5mm Surface Mount Package; 8-24 GHz的X2倍频器的5x5mm表面贴装封装
| 型号： | AMMP-6120-BLK |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | 8-24 GHz x2 Frequency Multiplier 5x5mm Surface Mount Package |
| 文件： | 总7页 (文件大小：282K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AMMP-6120
8-24 GHz x2 Frequency Multiplier
Data Sheet
Description
Features
• 5x5mm Surface Mount Package
Avago Technologies’ AMMP-6120 is an easy-to-use in-
tegrated frequency multiplier (x2) in a surface mount
package designed for commercial communication
systems. The MMIC takes a 4 to 12 GHz input signal and
doubles it to 8 to 24 GHz. It has integrated amplification,
matching, harmonic suppression, and bias networks. The
input/output are matched to 50 Ω and fully DC blocked.
The MMIC is fabricated using PHEMT technology.
• Frequency Range : 8-24 GHz output
(Useable to 26 GHz)
• Broad input power range: -11 to +5 dBm
• Output Power : +16 to +18 dBm
• Harmonic Suppression : 20 dBc (Fundamental)
• DC requirements : -1.4V and 5V, 112 mA @ Pin=
The backside of the package is both RF and DC ground.
This helps simplify the assembly process and reduces
assembly related performance variations and costs. The
surface mount package allows elimination of“chip & wire”
assembly for lower cost. This MMIC is a cost effective al-
ternative to hybrid (discrete-FET), passive, and diode
doublers that require complex tuning and assembly pro-
cesses.
+3dBm
Applications
• Microwave Radio systems
• Satellite VSAT and DBS systems
• 802.16 & 802.20 WiMax BWA systems
• WLL and MMDS loops
Package Diagram
Functional Block Diagram
NC
3
Vd
1
Vg
2
Vd
1
Vg
2
3
Pin Function
1
2
3
4
5
6
7
8
Vd
Vg
RF IN
8
4
RF OUT
4 RFout
X2
RFin 8
RF Out
RF In
7
6
5
NC
NC
NC
7
6
5
top view
package base: RF and DC GND
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A) = 40V
ESD Human Body Model (Class 1A) = 250V
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Note: MSL Rating = Level 2A
Electrical Specifications
1. Small/Large -signal data measured in a fully de-embedded test fixture form TA = 25°C.
2. Pre-assembly into package performance verified 100% on-wafer.
3. This final package part performance is verified by a functional test correlated to actual performance at one or more
frequencies.
4. Specifications are derived from measurements in a 50 Ω test environment. Aspects of the amplifier performance
may be improved over a more narrow bandwidth by application of additional conjugate, linearity, or low noise
(Гopt) matching.
Table 1. RF Electrical Characteristics
TA=25°C, Vd=50V, Vg=-1.4V, Idq=85mA, Zin=Zout=50 Ω
Parameter
Output Power, Pout
Min
13
Typ.
16
2
Max
Unit
dBm
dBm
Input Power at 1dB Gain Compression,
IP-1dB
Input Return Loss, RLin
-15
-10
25
dB
Output Return Loss, RLout
dB
Fundamental Suppresion, Sup
3rd Harmonic Suppression, Sup3
4th Harmonic Suppression, Sup4
18
dBc
dBc
dBc
dBc
25
35
Single Side Band Phase Noise, SSBPN
(@100kHz offset, fout=15.6GHz)
-140
Table 2. Recommended Operating Range
1. Ambient operational temperature TA = 25°C unless otherwise noted.
2. Channel-to-backside Thermal Resistance (Tchannel (Tc) = 34°C) as measured using infrared microscopy. Thermal Re-
sistance at backside temperature (Tb) = 25°C calculated from measured data.
Description
Min.
Typical
Max.
Unit
Comments
Drain Supply Current, Id
85
110
mA
Vd = 5V, Under any RF power
drive and temperature
Gate Current, Ig
9
uA
Table 3. Thermal Properties
Parameter
Test Conditions
Value
Thermal Resistance, qch-b
Channel-to-backside Thermal Resistance Tchannel(Tc)=34°C
Thermal Resistance at backside temperature Tb=25°C
qch-b = 34 °C/W
Absolute Minimum and Maximum Ratings
Table 4. Minimum and Maximum Ratings
Description
Min.
Max.
7
Unit
V
Comments
Drain Supply Voltage, Vd
Gate Supply Voltage, Vg
Drain Current, Idq
-3.0
+0.5
120
15
V
mA
dBm
°C
CW Input Power, Pin
Channel Temperature, Tch
Storage Temperature , Tstg
Maximum Assembly Temperature, Tmax
Notes:
+150
+150
+300
-65
°C
°C
60 second maximum
1. Operation in excess of any one of these conditions may result in permanent damage to this device.
2
AMMP-6120 Typical Performances
(T = 25°C,Z = Z = 50 Ω, Vd=5V, Vg=-1.4V)
A
in
out
20
15
10
5
0
-5
20
15
10
5
0
-5
-40°C [2H]
+25°C [2H]
+85°C [2H]
-40°C [1H]
+25°C [1H]
+85°C [1H]
2H
1H
3H
4H
-10
-15
-20
-25
-30
-10
-15
-20
-25
-30
8
10 12 14 16 18 20 22 24 26
Output Frequency (GHz)
8
10 12 14 16 18 20 22 24 26
Output Frequency (GHz)
Figure 1. Output Power vs. Output Freq. @ Pin=+3dBm
Figure 2. Output Power vs. Output Freq. over temp @ Pin=+3dBm
19
18
17
16
15
14
13
10
15
20
25
30
Pin=-2dBm
Pin=-2dBm
Pin= 0dBm
Pin=+2dBm
Pin=+4dBm
12
11
10
Pin= 0dBm
Pin=+2dBm
Pin=+4dBm
35
40
8
10
12
14
16
18
20
22
24
26
8
10
12
14
16
18
20
22
24
26
Output Frequency (GHz)
Output Frequency [GHz]
Figure 3. Output Power [2H] vs. Output Freq. at variable Pin
Figure 4. Fundamental Suppression at variable Pin
0
-5
160
Vg=-1.2V, Vd=4.5V
150
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
140
-10
-15
-20
-25
-30
130
120
110
100
90
S11
S22
4
6
8
10 12 14 16 18 20 22 24 26
Frequncy (GHz)
80
-11 -9 -7 -5 -3 -1
1
3
5
7
9
11
Input Power [1H] (dBm)
Figure 5. Input and Output Return Loss
Figure 6. Variation of total drain current with input power
3
20
18
16
14
12
10
8
20
25
30
35
40
45
Vg=-1.2V, Vd=4.5V
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
Fout=8GHz
6
Fout=8GHz
Vg=-1.2V, Vd=4.5V
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
4
2
0
-11 -9 -7 -5 -3 -1
1
3
5
7
9
11
-11 -9
-7 -5
-3
-1
1
3
5
7
9
11
Input Power [1H] (dBm)
Input Power [1H] (dBm)
Figure 7. 2H Output Power Vs Input Power @ Fout=8GHz
Figure 8. Fundamental Supp. Vs Input Power @ Fout=8GHz
20
20
Fout=10GHz
Vg=-1.2V, Vd=4.5V
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
18
16
14
12
10
8
25
30
35
40
45
6
Fout=10GHz
Vg=-1.2V, Vd=4.5V
4
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
2
0
-11 -9 -7 -5 -3 -1
Input Power [1H] (dBm)
1
3
5
7
9
11
-11 -9 -7
-5
-3
-1
1
3
5
7
9
11
Input Power [1H] (dBm)
Figure 9. 2H Output Power Vs Input Power @ Fout=10GHz
Figure 10. Fundamental Supp. Vs Input Power @ Fout=10GHz
20
18
10
Vg=-1.2V, Vd=4.5V
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
16
15
Fout=14GHz
14
12
10
8
20
25
6
Vg=-1.2V, Vd=4.5V
4
30
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
Fout=14GHz
2
0
35
-11 -9
-7
-5
-3
-1
1
3
5
7
9
11
-11 -9 -7 -5 -3 -1
1
3
5
7
9
11
Input Power [1H] (dBm)
Input Power [1H] (dBm)
Figure 12. Fundamental Supp. Vs Input Power @ Fout=14GHz
Figure 11. 2H Output Power Vs Input Power @ Fout=14GHz
4
20
18
16
14
12
10
8
10
15
20
25
30
35
Fout=16GH
Fout=16GHz
6
Vg=-1.2V, Vd=4.5V
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
Vg=-1.2V, Vd=4.5V
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
4
2
0
-11 -9 -7
-5
-3
-1
1
3
5
7
9
11
-11 -9
-7
-5
-3
-1
1
3
5
7
9
11
Input Power [1H] (dBm)
Input Power [1H] (dBm)
Figure 14. Fundamental Supp. Vs Input Power @ Fout=16GHz
Figure 13. 2H Output Power Vs Input Power @ Fout=16GHz
5
20
18
16
14
12
Fout=20GHz
10
15
20
10
8
Fout=20GHz
25
6
Vg=-1.2V, Vd=4.5V
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.2V, Vd=4.5V
4
Vg=-1.2V, Vd=5.0V
30
Vg=-1.4V, Vd=4.5V
2
Vg=-1.4V, Vd=5.0V
Vg=-1.4V, Vd=5.0V
35
-11
0
-9 -7
-5
-3 -1
Input Power [1H] (dBm)
1
3
5
7
9
11
-11 -9
-7
-5
-3
-1
1
3
5
7
9
11
Input Power [1H] (dBm)
Figure 15. 2H Output Power Vs Input Power @ Fout=20GHz
Figure 16. Fundamental Supp. Vs Input Power @ Fout=20GHz
5
20
18
16
14
12
Vg=-1.2V, Vd=4.5V
10
15
20
25
30
35
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
10
8
Fout=22GHz
Vg=-1.2V, Vd=4.5V
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
6
4
2
0
Fout=22GHz
-11
-9 -7
-5 -3
-1
1
3
5
7
9
11
-11 -9 -7
-5 -3
-1
1
3
5
7
9
11
Input Power [1H] (dBm)
Input Power [1H] (dBm)
Figure 17. 2H Output Power Vs Input Power @ Fout=22GHz
Figure 18. Fundamental Supp. Vs Input Power @ Fout=22GHz
5
5
20
18
16
14
12
10
Fout=26GHz
Fout=26GHz
Vd=4.5V, Vg=-1.2V
10
15
20
25
30
35
8
Vg=-1.2V, Vd=4.5V
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
Vg=-1.2V, Vd=4.5V
Vg=-1.2V, Vd=5.0V
Vg=-1.4V, Vd=4.5V
Vg=-1.4V, Vd=5.0V
6
4
2
0
-11 -9
-7
-5
-3
-1
1
3
5
7
9
11
-11 -9
-7
-5
-3
-1
1
3
5
7
9
11
Input Power [1H] (dBm)
Input Power [1H] (dBm)
Figure 19 . 2H Output Power Vs Input Power @ Fout=26GHz
Figure 20 . Fundamental Supp. Vs Input Power @ Fout=26GHz
-50
-60
-70
-80
-90
Fout=15.6GHz
F1
-100
-110
-120
-130
-140
-150
-160
-170
Active
Balun
M/N
@ fo
Filter
@ 2fo
S
Amp
F2
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
1.E+07
Oꢀset Frequency [Hz]
Figure 21. SSB Phase Noise of frequency doubler
(Pin=+2dBm, fout=15.6GHz)
Figure 22. Top Level Schematic of Frequency doubler
Biasing and Operation
The frequency doubler MMIC consists of a balun. The The AMMP-6120 performance changes with Drain Voltage
outputs of this balun feed the gates of balanced FETs and
the drains are connected to form the single-ended output.
(Vd) and Gate bias (Vg) as shown in the previous graphs.
Improvements in output power or fundamental suppres-
This results in fundamental frequency & odd harmon- sion performance are possible by optimizing the Vg from
ics cancellation. The even harmonic drain currents are in -1.2V to -1.4V and/or Vd from 4.5 to 5.0V.
phase and thus add in phase. The input matching network
A simplified schematic of the frequency multiplier is
(M/N) is designed to provide good match at fundamental
shown in figure 22. The active balun circuit and the output
frequencies and produces high impedance mismatch to
amplifier of the circuit are self biased. The Vg negative bias
higher harmonics.
(below pinch off) is only applied to FETs ‘F1’ and ‘F2’. FETs
‘F1’ and ‘F2’ have no significant contribution to total drain
The AMMP-6120 is biased with a single positive drain
supply Vdd and a single negative gate supply using sepa- current therefore Vg cannot be used to set drain current.
rate bypass capacitors. It is normally biased with the drain
supply connected to Vd and the gate supply connected to
Vg. For most applications it is recommended to use a Vg
=-1.2V to -1.4V and Vd=4.5V to 5.0V.
It should only be used to optimize the output power
and fundamental & higher harmonics suppression of the
doubler.
Refer to the Absolute Maximum Ratings table for allowed
DC and thermal conditions.
The RF input and output ports are AC coupled thus no DC
voltage is present at either port. The ground connection is
made via the package base.”
6
Typical Scattering Parameters
Please refer to <http://www.avagotech.com> for typical scattering parameters data.
Package Dimension, PCB Layout and Tape and Reel information
Please refer to Avago Technologies Application Note 5520, AMxP-xxxx production Assembly Process (Land Pattern A).
AMMP-6120 Part Number Ordering Information
Devices Per
Part Number
Container
Container
Antistatic bag
7”Reel
AMMP-6120-BLK
AMMP-6120-TR1
AMMP-6120-TR2
10
100
500
7”Reel
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. Obsoletes AV01-0119EN
AV02-0441EN - July 8, 2013
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