HCPL-4731-560 [AVAGO]
2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 0.300 INCH, SURFACE MOUNT, DIP-8;
| 型号： | HCPL-4731-560 |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | 2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 0.300 INCH, SURFACE MOUNT, DIP-8 输出元件 |
| 文件： | 总17页 (文件大小：440K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HCPL-4701/-4731/-070A/-073A
VeryLow Power Consumption High Gain Optocouplers
DataSheet
Features
Applications
• Ultra low input current capability - 40 µA
• Battery operated applications
• Specified for 3 V operation
Typical power consumption: <1 mW
Input power: <50 µW
• ISDN telephone interface
• Ground isolation between logic families – TTL, LSTTL,
CMOS, HCMOS, HL-CMOS, LV-HCMOS
Output power: <500 µW
• Low input current line receiver
• EIA RS-232C line receiver
• Telephone ring detector
• Will operate with V as low as 1.6 V
CC
• High current transfer ratio: 3500% at IF = 40 µA
• TTL and CMOS compatible output
• AC line voltage status indicator – low input power
dissipation
• Specified ac and dc performance over temperature:
0°C to 70°C
• Low power systems – ground isolation
• Portable system I/ O interface
• Safety approval:
UL recognized – 3750 V rms for 1 minute and
5000 V rms* for 1 minute per UL1577
CSA approved
IEC/ EN/ DIN EN 60747-5-2 approved with
VIORM = 630 V peak
(Option 060) for HCPL-4701
• 8-pin product compatible with 6N138/ 6N139 and
HCPL-2730/ HCPL-2731
• Available in 8-Pin DIP and SOIC-8 footprint
• Through hole and surface mount assembly available
Functional Diagram
HCPL-4701/070A
HCPL-4731/073A
NC
ANODE
CATHODE
NC
1
2
3
4
8
7
6
5
ANODE
CATHODE
CATHODE
ANODE
1
2
3
4
8
7
6
5
V
V
V
V
V
V
CC
O1
O2
1
1
2
2
CC
B
O
GND
GND
TRUTH TABLE
LED
V
O
ON
OFF
LOW
HIGH
*5000 V rms/1 Minute rating is for Option 020 (HCPL-4701 and HCPL-4731) products only.
A 0.1 µF bypass capacitor connected between pins 8 and 5 is recommended.
CAUTION: It is a dvised tha t nor ma l sta tic pr eca utions be ta ken in ha ndling a nd a ssembly of this component to
pr event da ma ge a nd/or degr a da tion which ma y be induced by ESD.
Description
These devices are very low power consumption, high
gain single and dual channel optocouplers. The
HCPL-4701 represents the single channel 8-Pin DIP
These devices are designed for use in CMOS, LSTTL
or other low power applications. They are especially
well suited for ISDN telephone interface and battery
configuration and is pin compatible with the industry operated applications due to the low power
standard 6N139. The HCPL-4731 represents the dual consumption. A 700% minimum current transfer ratio
channel 8-Pin DIP configuration and is pin
compatible with the popular standard HCPL-2731.
The HCPL-070A and HCPL-073A are the equivalent
single and dual channel products in an SO-8 footprint.
Each channel can be driven with an input current as
is guaranteed from 0°C to 70°C operating temperature
range at 40 µA of LED current and VCC ≥ 3 V.
The SO-8 does not require “through holes” in a PCB.
This package occupies approximately one-third the
low as 40 µA and has a typical current transfer ratio of footprint area of the standard dual-in-line package.
3500%.
The lead profile is designed to be compatible with
standard surface mount processes.
These high gain couplers use an AlGaAs LED and an
integrated high gain photodetector to provide an
extremely high current transfer ratio between input
and output. Separate pins for the photodiode and
output stage results in TTL compatible saturation
voltages and high speed operation. Where desired, the
V
CC
and V terminals may be tied together to achieve
O
conventional Darlington operation (single channel
package only).
Selection Guide
Widebody
Package
(400 mil)
8-Pin DIP
(300 Mil)
Hermetic
Single and
Dual
Channel
Packages
HCPL-
Small Outline SO-8
Dual
Channel Channel
Single
Dual
Minimum
Input ON
Current
(IF)
Absolute
Maxi-
mum
Single
Channel
Package
HCPL-
Single
Channel
Package
Channel
Package
Package
HCPL-
Package
HCPL-
Minimum
CTR
V
CC
6N139[1]
6N138[1]
2731[1]
2730[1]
4731
0701[1]
0700[1]
070A
0731[1]
0730[1]
0730A
HCNW139[1]
HCNW138[1]
0.5 mA
1.6 mA
40 µA
400%
300%
800%
300%
18 V
7 V
HCPL-4701
18 V
20 V
0.5 mA
5701[1]
5700[1]
5731[1]
5730[1]
Notes:
1. Technical data are on separate Avago publication.
2
Ordering Information
HCPL-4701, HCPL-4731, HCPL-070A and HCPL-073A are UL Recognized with 3750 Vrms for 1 minute per
UL1577 and are approved under CSA Component Acceptance Notice #5, File CA 88324.
Option
Part
RoHS
non RoHS
Surface Gull
Tape
UL 5000 Vrms/ IEC/ EN/ DIN
Number Compliant Compliant Package
Mount
Wing & Reel 1 Minute rating EN 60747-5-2 Quantity
-000E
-300E
no option 300 mil DIP-8
50 per tube
-300
X
X
X
X
50 per tube
1000 per reel
50 per tube
50 per tube
1000 per reel
50 per tube
50 per tube
1000 per reel
100 per tube
1500 per reel
100 per tube
1500 per reel
-500E
-500
X
X
HCPL-4701 -020E
HCPL-4731 -320E
-520E
-020
X
X
X
-320
X
X
X
X
-520
-060E
-060
X
X
X
-360E
-360
X
X
X
X
-560E
-560
X
X
X
-000E
no option SO-8
HCPL-070A -500E
HCPL-073A -060E
-560E
-500
-060
-560
X
X
X
X
X
X
To order, choose a part number from the part number column and combine with the desired option from
the option column to form an order entry.
Example 1:
HCPL-4701-560E to order product of 300 mil DIP Gull Wing Surface Mount package in Tape and Reel
packaging with IEC/EN/DIN EN 60747-5-2 Safety Approval and RoHS compliant.
Example 2:
HCPL-070A to order product of Surface Mount Small Outline SO-8 package and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for
information.
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since July
15, 2001 and RoHS compliant will use ‘–XXXE.’
3
Schematic
HCPL-4701 and HCPL-070A
HCPL-4731 and HCPL-073A
V
I
CC
8
I
CC
1
+
F1
V
CC
8
I
CC
V
F1
I
F
2
+
ANODE
–
2
I
O1
V
F
V
O1
–
3
7
6
5
I
CATHODE
O
6
5
V
O
3
I
–
B
I
O2
7
V
B
V
O2
V
F2
GND
SHIELD
+
I
4
F2
GND
SHIELD
USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED
BETWEEN PINS 5 AND 8 IS RECOMMENDED (SEE NOTE 8)
4
Package Outline Draw ings
8-Pin DIP Package (HCPL-4701, HCPL-4731)
7.62 ± 0.25
(0.300 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
8
1
7
6
5
TYPE NUMBER
6.35 ± 0.25
(0.250 ± 0.010)
OPTION CODE*
DATE CODE
A XXXXZ
YYWW
2
3
4
1.78 (0.070) MAX.
1.19 (0.047) MAX.
+ 0.076
- 0.051
0.254
5° TYP.
+ 0.003)
- 0.002)
(0.010
3.56 ± 0.13
(0.140 ± 0.005)
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
*MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 020
"V" = OPTION 060
1.080 ± 0.320
(0.043 ± 0.013)
0.65 (0.025) MAX.
2.54 ± 0.25
(0.100 ± 0.010)
OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
8-Pin DIP Package w ith Gull Wing Surface Mount Option 300 (HCPL-4701, HCPL-4731)
LAND PATTERN RECOMMENDATION
9.65 ± 0.25
1.016 (0.040)
(0.380 ± 0.010)
6
5
8
1
7
6.350 ± 0.25
(0.250 ± 0.010)
10.9 (0.430)
2.0 (0.080)
2
3
4
1.27 (0.050)
9.65 ± 0.25
(0.380 ± 0.010)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
7.62 ± 0.25
(0.300 ± 0.010)
+ 0.076
- 0.051
0.254
3.56 ± 0.13
(0.140 ± 0.005)
+ 0.003)
- 0.002)
(0.010
1.080 ± 0.320
(0.043 ± 0.013)
0.635 ± 0.25
(0.025 ± 0.010)
12° NOM.
0.635 ± 0.130
(0.025 ± 0.005)
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
5
Small-Outline SO-8 Package (HCPL-070A, HCPL-073A)
LAND PATTERN RECOMMENDATION
8
1
7
2
6
5
4
5.994 ± 0.203
(0.236 ± 0.008)
XXX
YWW
3.937 ± 0.127
(0.155 ± 0.005)
TYPE NUMBER
(LAST 3 DIGITS)
7.49 (0.295)
DATE CODE
3
PIN ONE
1.9 (0.075)
0.406 ± 0.076
(0.016 ± 0.003)
1.270
(0.050)
BSC
0.64 (0.025)
0.432
45° X
7°
* 5.080 ± 0.127
(0.200 ± 0.005)
(0.017)
3.175 ± 0.127
(0.125 ± 0.005)
0.228 ± 0.025
(0.009 ± 0.001)
1.524
(0.060)
0.203 ± 0.102
(0.008 ± 0.004)
* TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 ± 0.254 (0.205 ± 0.010)
0.305
(0.012)
MIN.
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
Solder Reflow Thermal Profile
300
PREHEATING RATE 3°C + 1°C/–0.5°C/SEC.
REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.
PEAK
TEMP.
245°C
PEAK
TEMP.
240°C
PEAK
TEMP.
230°C
200
2.5°C ± 0.5°C/SEC.
SOLDERING
TIME
200°C
30
160°C
SEC.
150°C
140°C
30
SEC.
3°C + 1°C/–0.5°C
100
PREHEATING TIME
150°C, 90 + 30 SEC.
50 SEC.
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
0
0
50
100
150
200
250
TIME (SECONDS)
Note: Non-halide flux should be used.
Figure 1a. Solder Reflow Thermal Profile.
6
Recommended Pb-Free IR Profile
Regulatory Information
The HCPL-4701/4731 and HCPL-
070A/073A have been approved
by the following organizations:
TIME WITHIN 5 °C of ACTUAL
PEAKTEMPERATURE
t
p
20-40 SEC.
260 +0/-5 °C
T
T
p
UL
217 °C
L
RAMP-UP
3 °C/SEC. MAX.
150 - 200 °C
Recognized under UL 1577,
Component Recognition
Program, File E55361.
RAMP-DOWN
6 °C/SEC. MAX.
T
smax
T
smin
t
s
t
L
60 to 150 SEC.
PREHEAT
60 to 180 SEC.
CSA
Approved under CSA Component
Acceptance Notice # 5, File CA
88324.
25
t 25 °C to PEAK
TIME
NOTES:
THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX.
= 200 °C, T = 150 °C
IEC/EN/DIN EN 60747-5-2
T
smax
smin
Approved under:
Note: Non-halide flux should be used.
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884
Teil 2):2003-01.
Figure 1b. Pb-Free IR Profile.
(Option 060 only)
Insulation Related Specifications
8-Pin DIP
(300 Mil) SO-8
Paramet er
Symbol
Value
Value Unit s
Condit ions
Minimum External Air
Gap (External
Clearance)
L(101)
7.1
4.9
mm
mm
mm
Measured from input terminals to
output terminals, shortest distance
through air.
Minimum External
Tracking (External
Creepage)
L(102)
7.4
4.8
Measured from input terminals to
output terminals, shortest distance
path along body.
Minimum Internal Plastic
Gap (Internal Clearance)
0.08
0.08
Through insulation distance, conductor
to conductor, usually the direct
distance between the photoemitter and
photodetector inside the optocoupler
cavity.
Tracking Resistance
(Comparative Tracking
Index)
CTI
200
IIIa
200
IIIa
Volts DIN IEC 112/ VDE 0303 Part 1
Isolation Group
Material Group DIN VDE 0110,
1/89, Table 1)
Option 300 – surface mount classification is Class A in accordance with CECC 00802.
7
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics (HCPL-4701 OPTION 060 ONLY)
Descript ion
Symbol
Charact erist ic
Unit s
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 300 V rms
I-IV
I-III
for rated mains voltage ≤ 450 V rms
Climatic Classification
55/85/21
2
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
V
630
V peak
V peak
IORM
V
IORM x 1.87 = V , 100% Production Test with tm = 1 sec,
V
1181
945
PR
PR
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = V , Type and sample test,
V
V peak
V peak
PR
PR
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec)
V
6000
IOTM
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 16, Thermal Derating curve.)
Case Temperature
Input Current
Output Power
TS
IS,INPUT
PS,OUTPUT
175
230
600
°C
mA
mW
Insulation Resistance at TS, V = 500 V
RS
> 109
Ω
IO
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN
60747-5-2, for a detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in
application.
8
Absolute Maximum Ratings
(No Derating Required up to 70°C)
Parameter
Storage Temperature
Symbol
TS
Minimum
-55
Maximum
Units
°C
125
85
10
5
Operating Temperature
TA
-40
°C
Average Forward Input Current (HCPL-4701/4731)
Average Forward Input Current (HCPL-070A/073A)
IF(AVG)
IF(AVG)
IFPK
mA
mA
mA
Peak Transient Input Current (HCPL-4701/4731)
(50% Duty Cycle, 1 ms Pulse Width)
20
Peak Transient Input Current (HCPL-070A/073A)
(50% Duty Cycle, 1 ms Pulse Width)
IFPK
10
mA
Reverse Input Voltage
V
2.5
15
V
mW
mA
V
R
Input Power Dissipation (Each Channel)
Output Current (Each Channel)
P
I
IO
60
Emitter Base Reverse Voltage (HCPL-4701/070A)
Output Transistor Base Current (HCPL-4701/070A)
Supply Voltage
V
0.5
5
EB
IB
mA
V
V
-0.5
-0.5
18
CC
Output Voltage
V
18
V
O
Output Power Dissipation (Each Channel)
Total Power Dissipation (Each Channel)
Lead Solder Temperature (for Through Hole Devices)
PO
PT
100
115
mW
mW
260°C for 10 sec., 1.6 mm below seating plane
See Package Outline Draw ings section
Reflow Temperature Profile
(for SOIC-8 and Option # 300)
Recommended Operating Conditions
Paramet er
Power Supply Voltage
Symbol
Min.
1.6
40
0
Max.
18
Unit s
V
V *
CC
Forward Input Current (ON)
Forward Input Voltage (OFF)
Operating Temperature
IF(ON)
5000
0.8
µA
V
V
F(OFF)
TA
0
70
°C
*See Note 1.
9
Electrical Specifications
0°C ≤ TA ≤ 70°C, 4.5 V ≤ VCC ≤ 20 V, 1.6 mA ≤ IF(ON) ≤ 5 mA, 0 V ≤ V
≤ 0.8 V, unless otherwise
F(OFF)
specified. All Typicals at TA = 25°C. See note 8.
Device
Symbol HCPL-
Parameter
Current
Min. Typ.* Max. Units
Test Conditions
Fig. Note
CTR
800 3500 25k
%
IF = 40 µA, V = 0.4 V 4, 5
2
O
Transfer
Ratio
V
CC = 4.5 V
IF = 0.5 mA,
CC = 4.5 V
600 3000 8k
V
700 3200 25k
500 2700 8k
0.06 0.4
IF = 40 µA
IF = 0.5 mA
IF = 40 µA, IO = 280 µA 2, 3
IF = 0.5 mA, IO = 2.5 mA
Logic Low
Output Voltage
V
OL
V
0.04 0.4
Logic High
Output Current
IOH
0.01
5
µA
V = VCC = 3 to 7 V,
IF = 0 mA
O
0.02
80
V = VCC = 18 V,
IF = 0 mA
O
Logic Low
Supply Current
ICCL
4701/070A
4731/073A
0.02 0.2
0.1
0.04 0.4
0.2 2.0
mA IF = 40 µA VO = Open
IF = 0.5 mA
1
IF = 40 µA
IF = 0.5 mA
Logic High
Supply Current
ICCH
4701/070A
4731/073A
< 0.01 10
< 0.01 20
µA
IF = 0 mA
VO = Open
Input Forward
Voltage
V
F
1.1 1.25 1.4
V
IF = 40 to 500 µA,
T = 25°C
A
6
0.95
3.0
1.5
IF = 40 to 500 µA
Input Reverse
Breakdown
Voltage
BV
5.0
V
IR = 100 µA, T = 25°C
R
A
2.5
IR = 100 µA
Temperature
∆V /∆T
-2.0
mV/°C IF = 40 µA
F
A
Coefficient of
Forward Voltage
Input Capacitance
-1.6
18
IF = 0.5 mA
CIN
pF
f = 1 MHz, V = 0 V
F
*All typical values at TA = 25°C and VCC = 5 V, unless otherwise noted.
10
Sw itching Specifications (AC)
Over Recommended Operating Conditions T = 0°C to 70°C, VCC = 3 V to 18 V, unless otherwise specified.
A
Device
Parameter
Symbol
HCPL- Min. Typ.* Max. Units
Test Conditions
Fig. Note
Propagation
Delay Time
to Logic Low
at Output
tPHL
65
500
µs
IF = 40 µA, RL = 11 to 16 kΩ,
7, 9 9, 10
VCC = 3.3 to 5 V
3
25
30
T = 25°C
A
IF = 0.5 mA,
RL = 4.7 kΩ
Propagation
Delay Time
to Logic High
Output
tPLH
70
34
500
µs
IF = 40 µA, RL = 11 to 16 kΩ,
CC = 3.3 to 5 V
T = 25°C
7, 9 9, 10
V
60
90
IF = 0.5 mA,
A
RL = 4.7 kΩ
4701/4731
070A/073A
130
Common Mode | CMH|
Transient
Immunity at
Logic High
1,000 10,000
V/µs IF = 0 mA, RL = 4.7 to 11 kΩ,
CM = 10 V ,
8
8
6, 7
6, 7
V
p-p
T = 25°C,
A
Output
Common Mode | CML|
Transient
Immunity at
Logic Low
Output
1,000 10,000
2,000
V/µs IF = 0.5 mA, RL = 4.7 to 11 kΩ,
| V | = 10 V ,
CM
p-p
T = 25°C
A
IF = 40 µA, RL = 11 to 16 kΩ,
| V | = 10 V
CM
p-p
V
CC = 3.3 to 5 V, T = 25°C
A
*All typical values at T = 25°C and VCC = 5 V, unless otherwise noted.
A
Package Characteristics
Device
Parameter
Symbol HCPL- Min. Typ.* Max. Units Test Conditions Fig. Note
Input-Output Momentary
Withstand Voltage**
V
ISO
3750
V rms RH ≤ 50%,
t = 1 min.,
3, 4
TA = 25°C
Option 020
4701 5000
4731
3, 4a
Resistance
(Input-Output)
RI-O
CI-O
II-I
1012
0.6
Ω
V
I-O = 500 VDC
3
3
5
RH ≤ 45%
Capacitance
(Input-Output)
pF
µA
f = 1 MHz
Insulation Leakage
Current (Input-Input)
4731
073A
0.005
1011
RH ≤ 45%, t = 5 s,
V = 500 VDC
I-I
Resistance (Input-Input)
RI-I
CI-I
Ω
Capacitance
(Input-Input)
4731
073A
0.03
0.25
pF
f = 1 MHz
5
*All typical values at TA = 25°C and V = 5 V.
CC
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics
Table (if applicable), your equipment level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output
Endurance Voltage.”
11
Not es:
detection current limit, II-O ≤ 5 µA.
This test is performed before the
100% production test for partial
discharge (Method b) shown in the
IEC/EN/DIN EN 60747-5-2 Insulation
Characteristics Table.
5. Measured between pins 1 and 2
shorted together, and pins 3 and 4
shorted together.
6. Common transient immunity in a
Logic High level is the maximum
tolerable (positive) dVCM/dt on the
leading edge of the common mode
pulse, VCM, to assure that the output
will remain in a Logic High state (i.e.,
7. In applications where dV/dt may
1. Specification information is available
form the factory for 1.6 V operation.
Call your local field sales office for
further information.
2. DC CURRENT TRANSFER RATIO is
defined as the ratio of output
collector current, IO, to the forward
LED input current, IF, times 100%.
3. Device considered a two terminal
device: pins 1, 2, 3, and 4 shorted
together, and pins 5, 6, 7, and 8
shorted together.
4. In accordance with UL 1577, each
optocoupler is proof tested by
applying an insulation test voltage
≥ 4500 VRMS for 1 second (leakage
detection current limit, II-O ≤ 5 µA.
4a. In accordance with UL 1577, each
optocoupler is proof tested by
applying an insulation test voltage
≥ 6000 VRMS for 1 second (leakage
exceed 50,000 V/µs (such as static
discharge) a series resistor, RCC
,
should be included to protect the
detector IC form destructively high
surge currents. The recommended
value is RCC = 220 Ω.
8. Use of a 0.1 µF bypass capacitor con-
nected between pins 8 and 5 adjacent
to the device is recommended.
9. Pin 7 open for single channel product.
10. Use of resistor between pins 5 and 7
will decrease gain and delay time.
Significant reduction in overall gain
can occur when using resistor values
below 47 kΩ for single channel
product.
11. The Applications Information section
of this data sheet references the
HCPL-47XX part family, but applies
equally to the HCPL-070A and HCPL-
073A parts.
V > 2.0 V). Common transient
O
immunity in a Logic Low level is he
maximum tolerable (negative)
dVCM/dt on the trailing edge of the
common mode pulse, VCM, to assure
that the output will remain in a Logic
Low state (i.e., V < 0.8 V).
O
27
7
1.25
T
V
= 25°C
= 5 V
NORMALIZED
A
CC
T
V
= 25°C
A
24
21
18
15
12
9
I
V
V
= 40 µA
F
6
5
4
3
2
1
0
= 5 V
CC
= 0.4 V
= 5 V
O
1.0
25°C
70°C
CC
0.75
0.5
0.25
0
0°C
I
= 50 µA
F
6
3
0
0
1.0
– OUTPUT VOLTAGE – V
2.0
0
1.0
V – OUTPUT VOLTAGE – V
O
2.0
0.01
0.1
1.0
10
V
I
– FORWARD CURRENT – mA
O
F
Figure 2. DC Transfer Characteristics
(IF = 0.5 mA to 2.5 mA).
Figure 3. DC Transfer Characteristics
(IF = 50 µA to 250 µA).
Figure 4. Current Transfer Ratio vs.
Forw ard Current.
100
9
T
= 25°C
A
70
V
V
= 0.4 V
= 5 V
O
CC
I
R
= 0.5 mA
8
7
6
5
4
3
2
F
I
F
= 4.7 kΩ
25°C
70°C
L
60
50
40
30
20
10
0
+
10
1.0
V
F
0°C
–
t
t
PLH
0.1
PHL
1
0
0.01
0
0.1
0.2
0.3
0.4
0.5
0
10
20 30 40 50 60 70
T – TEMPERATURE – °C
A
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
I
– INPUT DIODE FORWARD CURRENT – mA
V
– FORWARD VOLTAGE
F
F
Figure 6. Input Diode Forw ard
Current vs. Forw ard Voltage.
Figure 7. Propagation Delay vs.
Temperature.
Figure 5. Output Current vs. Input
Diode Forw ard Current.
12
R
(SEE NOTE 7)
+5 V
CC
8
7
6
5
I
F
1
2
3
4
10 V
90% 90%
220 Ω
V
CM
B
A
10%
10%
0 V
R
0.1 µF
L
t
r
t
f
V
O
V
V
FF
5 V
V
O
SWITCH AT A: I = 0 mA
F
V
V
O
CM
OL
+
–
SWITCH AT B: I = 0.5 mA
F
PULSE GEN.
Figure 8. Test Circuit for Transient Immunity and Typical Waveforms.
I
F
I
PULSE
GEN.
F
0
8
7
6
5
+5 V
1
2
3
4
Z
t
= 50 Ω
= 5 ns
O
r
5 V
V
O
R
L
10% DUTY CYCLE
1/f < 100 µs
(SATURATED
RESPONSE)
1.5 V
1.5 V
V
O
V
OL
0.1 µF
I
MONITOR
F
t
t
PHL
PLH
* C = 15 pF
L
R
M
* C IS APPROXIMATELY 15 pF, WHICH INCLUDES
L
PROBE AND STRAY WIRING CAPACITANCE.
Figure 9. Sw itching Test Circuit.
Applications Information
Low -Pow er Operation
Current Gain
(generally less than 500 µA). This
level of input forward current
conducting through the LED can
control a worst-case total output
(Iol) and power supply current
(Iccl) of two and a half
milliamperes. Typically, the
HCPL-47XX can control a total
output and supply current of 15
mA. The output current, IO is
determined by the LED forward
current multiplied by the current
gain of the optocoupler,
with a worst case design Current
Transfer Ratio (CTR) of 800%.
Typically, the CTR and the
corresponding Iol, are 4 times
larger. For low-power operation,
Table 1 lists the typical power
dissipations that occur for both
the 3.3 Vdc and 5 Vdc
HCPL-47XX optocoupler applica-
tions. These approximate power
dissipation values are listed
respectively for the LED, for the
output VCC and for the open-
collector output transistor. Those
values are summed together for a
comparison of total power dissi-
pation consumed in either the 3.3
Vdc or 5 Vdc applications.
There are many applications
where low-power isolation is
needed and can be provided by
the single-channel HCPL-4701, or
the dual-channel HCPL-4731 low-
power optocouplers. Either or
both of these two devices are
referred to in this text as HCPL-
47XX product(s). These opto-
couplers are Avago’s lowest input
current, low-power optocouplers.
Low-power isolation can be
IO = IF (CTR)/100%. In particular
with the HCPL-47XX opto-
couplers, the LED can be driven
with a very small IF of 40 µA to
control a maximum IO of 320 µA
defined as less than a milliwatt of
input power needed to operate
the LED of an optocoupler
13
Table 1. Typical HCPL-4701 Pow er Dissipation for 3 V and 5 V Applications
V
CC
= 3.3 Vdc
V
CC
= 5 Vdc
Pow er Dissipat ion
(µW)
PLED
PVcc
IF = 40 µA
IF = 500 µA
IF = 40 µA
50
IF = 500 µA
50
65
625
330
625
500
100
[1]
PO-C
20
10
25
20
[2]
PTOTAL
135 µW
965 µW
175 µW
1,145 µW
Not es:
1. RL of 11 kΩ open-collector (o-c) pull-up resistor was used for both 3.3 Vdc and 5 Vdc calculations.
2. For typical total interface circuit power consumption in 3.3 Vdc application, add to PTOTAL approximately 80 µW for 40 µA
(1,025 µW for 500 µA) LED current-limiting resistor, and 960 µW for the 11 kΩ pull-up resistor power dissipations. Similarly, for 5
Vdc applications, add to PTOTAL approximately 150 µW for 40 µA (1,875 µW for 500 µA) LED current-limiting resistor and 2,230
µW for the 11 kΩ pull-up resistor power dissipations.
Propagation Delay
Applications
Battery-Operated Equipment
supplied-power sensing. In
particular, Integrated Services
Digital Network (ISDN) applica-
tions, as illustrated in Figure 10,
can severely restrict the input
power that an optocoupler inter-
face circuit can use (approxi-
mately 3 mW). Figure 10 shows
three isolated signals that can be
served by the small input LED
current of the HCPL-47XX dual-
and single-channel optocouplers.
Very low, total power dissipation
occurs with these series of
When the HCPL-47XX optocoup-
ler is operated under very low
input and output current condi-
tions, the propagation delay times
will lengthen. When lower input
drive current level is used to
switch the high-efficiency AlGaAs
LED, the slower the charge and
discharge time will be for the
LED. Correspondingly, the propa-
gation delay times will become
longer as a result. In addition, the
split-Darlington (open-collector)
output amplifier needs a larger,
pull-up load resistance to ensure
the output current is within a
controllable range. Applications
that are not sensitive to longer
propagation delay times and that
are easily served by this HCPL-
47XX optocoupler, typically 65 µs
or greater, are those of status
monitoring of a telephone line,
power line, battery condition of a
portable unit, etc. For faster
HCPL-47XX propagation delay
times, approximately 30 µs, this
optocoupler needs to operate at
higher IF (≥ 500 µA) and Io
Common applications for the
HCPL-47XX optocoupler are
within battery-operated, portable
equipment, such as test or
medical instruments, computer
peripherals and accessories where
energy conservation is required to
maximize battery life. In these
applications, the optocoupler
would monitor the battery voltage
and provide an isolated output to
another electrical system to
indicate battery status or the need
to switch to a backup supply or
begin a safe shutdown of the
equipment via a communication
port. In addition, the HCPL-47XX
optocouplers are specified to
operate with 3 Vdc CMOS logic
family of devices to provide logic-
signal isolation between similar or
different logic circuit families.
devices.
Sw itched-Mode Pow er
Supplies
Within Switched-Mode Power
Supplies (SMPS) the less power
consumed the better. Isolation for
monitoring line power, regulation
status, for use within a feedback
path between primary and
secondary circuits or to external
circuits are common applications
for optocouplers. Low-power
HCPL-47XX optocoupler can help
keep higher energy conversion
efficiency for the SMPS. The block
diagram of Figure 11 shows where
low-power isolation can be used.
Telephone Line Interfaces
Applications where the HCPL-
47XX optocoupler would be best
used are in telephone line inter-
face circuitry for functions of ring
detection, on-off hook detection,
line polarity, line presence and
(≥ 1 mA) levels.
14
TELEPHONE LINE
ISOLATION BARRIER
RECEIVE
2-WIRE
ISDN
LINE
PROTECTION
CIRCUIT
TRANSMIT
LINE POLARITY
LINE PRESENCE
HCPL-4731
HCPL-4701
TELEPHONE
LINE
INTERFACE
CIRCUIT
PRIMARY–SECONDARY
POWER ISOLATION
BARRIER
SECONDARY/
EMERGENCY
POWER
EMERGENCY
POWER
SWITCHED–
MODE
V
V
CC
CC
SECONDARY
POWER
VAC
PRIMARY
P0WER
SUPPLY
– RETURN
POWER
SUPPLY
NOTE: THE CIRCUITS SHOWN IN THIS FIGURE REPRESENT POSSIBLE, FUNCTIONAL APPLICATION OF THE HCPL-47XX
OPTOCOUPLER TO AN ISDN LINE INTERFACE. THIS CIRCUIT ARRANGEMENT DOES NOT GUARANTEE COMPLIANCE,
CONFORMITY, OR ACCEPTANCE TO AN ISDN, OR OTHER TELECOMMUNICATION STANDARD, OR TO FCC OR TO OTHER
GOVERNMENTAL REGULATORY AGENCY REQUIREMENTS. THESE CIRCUITS ARE RECOMMENDATIONS THAT MAY MEET
THE NEEDS OF THESE APPLICATIONS. Agilent DOES NOT IMPLY, REPRESENT, NOR GUARANTEE THAT
THESE CIRCUIT ARRANGEMENTS ARE FREE FROM PATENT INFRINGEMENT.
Figure 10. HCPL-47XX Isolated Monitoring Circuits for 2-Wire ISDN Telephone Line.
ISOLATION
BARRIER
EMI FILTER
V
RECTIFIER
AND
FILTER
O
115/230
VAC
SWITCHING
ELEMENT
AND
CURRENT
LIMITER
GND 2
1
2
ERROR
FEEDBACK
VIA CNR200
CONTROL
CIRCUIT
SOFT START
COMMAND
HCPL-4701
INTERRUPT FLAG
POWER DOWN
POWER
SUPPLY
FILTER
CAPACITOR
1
2
1
Figure 11. Typical Optical Isolation Used for Pow er-Loss Indication and Regulation Signal Feedback.
RECOMMENDED V
FILTER
CC
100 Ω
1
2
8
7
V
V
CC
O
+
0.1 µF
10 µF
R
L
6
5
3
4
HCPL-4701 OR HCPL-4731
Figure 12. Recommended Pow er Supply Filter for HCPL-47XX Optocouplers.
15
the LED quickly when the LED is
turned off. Upon turn-on of the
LED, the silicon diode capaci-
tance will provide a rapid
charging path (peaking current)
for the LED. In addition, this
silicon diode prevents common-
mode current from entering the
LED anode when the driver IC is
on and no operating LED current
exists.
Data Communication and
Input/Output Interfaces
this optocoupler. First, use good
high-frequency circuit layout
practices to minimize coupling of
common-mode signals between
input and output circuits. Keep
input traces away from output
traces to minimize capacitive
coupling of interference between
input and output sections. If
In data communication, the
HCPL-47XX can be used as a line
receiver on a RS-232-C line or
this optocoupler can be part of a
proprietary data link with low
input current, multi-drop stations
along the data path. Also, this
low-power optocoupler can be
used within equipment that
monitors the presence of high-
voltage. For example, a benefit of
the low input LED current (40
µA) helps the input sections of a
Programmable Logic Controller
(PLC) monitor proximity and limit
switches. The PLC I/O sections
can benefit from low input
current optocouplers because the
total input power dissipation
when monitoring the high voltage
(120 Vac - 220 Vac) inputs is
minimized at the I/O connections.
This is especially important when
many input channels are stacked
together.
possible, parallel, or shunt switch
the LED current as shown in
Figure 13, rather than series
In general, series switching the low
input current of the HCPL-47XX
LED is not recommended. This is
particularly valid when in a high
common-mode interference
environment. However, if series
switching of the LED current must
be done, use an additional pull-up
resistor from the cathode of the
LED to the input VCC as shown in
Figure 15. This helps minimize any
differential-mode current from
conducting in the LED while the
LED is off, due to a common-mode
switch the LED current as
illustrated in Figure 15. Not only
will CMR be enhanced with these
circuits (Figures 13 and 14), but
the switching speed of the opto-
coupler will be improved as well.
This is because in the parallel
switched case the LED current is
current-steered into or away from
the LED, rather than being fully
turned off as in the series switched
case. Figure 13 illustrates this
type of circuit. The Schottky
diode helps quickly to discharge
and pre-bias the LED in the off
state. If a common-mode voltage
across the optocoupler suddenly
attempts to inject a current into
the off LED anode, the Schottky
diode would divert the interfering
current to ground. The combina-
tion of the Schottky diode forward
voltage and the Vol saturation
voltage of the driver output stage
(on-condition) will keep the LED
voltage at or below 0.8 V. This will
prevent the LED (off-condition)
from conducting any significant
forward current that might cause
the HCPL-47XX to turn on. Also,
if the driver stage is an active
totem-pole output, the Schottky
diode allows the active output
pull-up section to disconnect from
the LED and pull high.
signal occurring on the input V
CC
(anode) of the LED. The common-
mode signal coupling to the anode
and cathode could be slightly
different. This could potentially
create a LED current to flow that
would rival the normal, low input
current needed to operate the
optocoupler. This additional
parallel resistor can help shunt any
leakage current around the LED
should the drive circuit, in the off
state, have any significant leakage
current on the order of 40 µA.
With the use of this parallel
resistor, the total drive current
conducted when the LED is on is
the sum of the parallel resistor and
LED currents. In the series circuit
of Figure 15 with the LED off, if a
common-mode voltage were to
couple to the LED cathode, there
can be enough imbalance of
common-mode voltage across the
LED to cause a LED current to
flow and, inadvertently, turn on the
optocoupler. This series, switching
circuit has no protection against a
negative-transition, input common-
mode signal.
Circuit Design Issues
Pow er Supply Filtering
Since the HCPL-47XX is a high-
gain, split-Darlington amplifier,
any conducted electrical noise on
the VCC power supply to this
optocoupler should be minimized.
A recommended VCC filter circuit
is shown in Figure 12 to improve
the power supply rejection (psr)
of the optocoupler. The filter
should be located near the
combination of pin 8 and pin 5 to
provide best filtering action. This
filter will drastically limit any
sudden rate of change of VCC with
time to a slower rate that cannot
interfere with the optocoupler.
Common-Mode Rejection &
LED Driver Circuits
As shown in Figure 14, most
active output driver integrated
circuits can source directly the
forward current needed to operate
the LED of the HCPL-47XX
optocoupler. The advantage of
using the silicon diode in this
circuit is to conduct charge out of
With the combination of a high-
efficiency AlGaAs LED and a
high-gain amplifier in the HCPL-
47XX optocoupler, a few circuit
techniques can enhance the
common-mode rejection (CMR) of
16
V
CC
V
– V
F
I
F
CC
+
R1 =
4.7 µF
0.1 µF
FOR V
CC
R1 = 91 kΩ (TYPICAL)
R1 = 75 kΩ (WORST CASE)
= 5 Vdc, I = 40 µA
F
V
– V
F
OH
I
R1 =
R1
F
*
FOR V
= 5 Vdc, I = 40 µA
CC
F
R1 = 36 kΩ (TYPICAL)
R1 = 30 kΩ (WORST CASE)
*
R1
HCPL-47XX
ACTIVE OUTPUT
OR
OPEN COLLECTOR
HCPL-47XX
ACTIVE OUTPUT
*
USE ANY SIGNAL DIODE.
*
USE ANY STANDARD SCHOTTKY DIODE.
Figure 13. Recommended Parallel LED Driver Circuit for
HCPL-4701/-4731.
Figure 14. Recommended Alternative LED Driver Circuit for
HCPL-4701/-4731 .
V
– V – V
F OL
CC
R1 =
R2 =
I
F
0.8 V
I
OH MAX
TOTAL DRIVE CURRENT USED:
800
V
– V – V
F
V
– V
CC OL
R2
CC
OL
P
(mW)
I
=
+
S
TOTAL
R1
700
600
500
400
300
200
100
0
I
(mA)
S
V
FOR V
R1 = 82 kΩ (TYPICAL)
R1 = 62 kΩ (WORST CASE)
R2 = 8.2 kΩ AT I
= 5 Vdc, I = 40 µA
F
CC
CC
+
4.7 µF
0.1 µF
R2
R1
= 100 µA
OH
= 640 µA (TYPICAL)
I
TOTAL
HCPL-47XX
ACTIVE OUTPUT
OR
OPEN COLLECTOR
0
25 50 75 100 125 150 175 200
– CASE TEMPERATURE – °C
T
S
Figure 15. Series LED Driver Circuit for HCPL-4701/-4731.
Figure 16. Thermal Derating Curve,
Dependence of Safety Limiting Value w ith
Case Temperature per VDE 0884.
For product information and a complete list of distributors, please go to our website: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. Obsoletes 5989-2106EN
AV01-0547EN June 24, 2007
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