HFBR-5803E [AVAGO]
DATACOM, ETHERNET TRANSCEIVER, XFO, LOW PROFILE, SIP-9;
| 型号： | HFBR-5803E |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | DATACOM, ETHERNET TRANSCEIVER, XFO, LOW PROFILE, SIP-9 以太网：16GBASE-T 电信 电信集成电路 |
| 文件： | 总20页 (文件大小：363K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HFBR-5803/-5803T FDDI, 100 Mb/s
ATM, and Fast Ethernet Transceivers
in Low Cost 1 x 9 Package Style
Data Sheet
Features
•
Full compliance with the optical
performance requirements of the
FDDI PMD standard
•
•
Full compliance with the FDDI
LCF-PMD standard
Full compliance with the optical
performance requirements of the
ATM 100 Mb/s physical layer
Full compliance with the optical
performance requirements of
100 Base-FX version of IEEE 802.3u
Multisourced 1 x 9 package style
with choice of duplex SC or
duplex ST* receptacle
Description
The HFBR-5800 family of trans-
ceivers from Agilent provide the
system designer with products to
implement a range of Fast
Ethernet, FDDI and ATM
(Asynchronous Transfer Mode)
designs at the 100 Mb/s-125 MBd
rate.
The HFBR-5803/-5803T is useful
for both ATM 100 Mb/s interfaces
and Fast Ethernet 100 Base-FX
interfaces. The ATM Forum User-
Network Interface (UNI) Standard,
Version 3.0, defines the Physical
Layer for 100 Mb/s Multimode
Fiber Interface for ATM in Section
2.3 to be the FDDI PMD Standard.
Likewise, the Fast Ethernet
Alliance defines the Physical
Layer for 100 Base-FX for Fast
Ethernet to be the FDDI PMD
Standard.
•
•
•
•
•
Wave solder and aqueous wash
process compatible
Manufactured in an ISO 9002
certified facility
Single +3.3 V or +5 V power
supply
The transceivers are all supplied
in the industry standard 1 x 9 SIP
package style with either a duplex
SC or a duplex ST* connector
interface.
Applications
FDDI PMD, ATM and Fast Ethernet
2 km Backbone Links
ATM applications for physical
layers other than 100 Mb/s
Multimode Fiber Interface are
supported by Agilent. Products
are available for both the single
mode and the multimode fiber
SONET OC-3c (STS-3c) ATM
interfaces and the 155 Mb/s-194
MBd multimode fiber ATM
interface as specified in the ATM
Forum UNI.
•
•
Multimode fiber backbone links
Multimode fiber wiring closet to
desktop links
The HFBR-5803/-5803T are
1300 nm products with optical
performance compliant with the
FDDI PMD standard. The FDDI
PMD standard is ISO/IEC 9314-3:
1990 and ANSI X3.166 - 1990.
•
•
Very low cost multimode fiber
links from wiring closet to
desktop
Multimode fiber media converters
*ST is a registered trademark of AT&T
Lightguide Cable Connectors.
These transceivers for 2 km
multimode fiber backbones are
supplied in the small 1 x 9 duplex
SC or ST package style.
Note: The “T” in the product numbers
indicates a transceiver with a duplex ST
connector receptacle.
Product numbers without a “T” indicate
transceivers with a duplex SC connector
receptacle.
Contact your Agilent sales
representative for information on
these alternative Fast Ethernet,
FDDI and ATM products.
Ordering Information
Package
The electrical subassembly con-
sists of a high volume multilayer
printed circuit board on which the
IC chips and various surface-
mounted passive circuit elements
are attached.
The HFBR-5803/-5803T 1300 nm
products are available for
production orders through the
Agilent Component Field Sales
Offices and Authorized
The overall package concept for
the Agilent transceivers consists
of the following basic elements;
two optical subassemblies, an
electrical subassembly and the
housing as illustrated in Figure 1
and Figure 1a.
Distributors world wide.
The package includes internal
shields for the electrical and
SC Receptacle
HFBR-5803E = Extended Shield
HFBR-5803F = Flush Shield
The package outline drawings and optical subassemblies to ensure
pin out are shown in Figures 2, 2a, low EMI emissions and high
HFBR-5803P = Mezzanine Height 2b, 2c and 3. The details of this
package outline and pin out are
immunity to external EMI fields.
ST Receptacle
The outer housing including the
duplex SC connector receptacle
or the duplex ST ports is molded
of filled nonconductive plastic to
provide mechanical strength and
electrical isolation. The solder
posts of the Agilent design are
isolated from the circuit design of
the transceiver and do not require
connection to a ground plane on
the circuit board.
compliant with the multisource
definition of the 1 x 9 SIP. The low
profile of the Agilent transceiver
design complies with the
HFBR-5803TE = Extended Shield
HFBR-5803TF = Flush Shield
HFBR-5803TP = Mezzanine Height
maximum height allowed for the
duplex SC connector over the
entire length of the package.
Transmitter Sections
The transmitter section of the
HFBR-5803 and HFBR-5805 series
utilize 1300 nm Surface Emitting
Figure 2b shows the outline
InGaAsP LEDs. These LEDs are
drawing for options that include
packaged in the optical
mezzanine height with flush shield
and Figure 2c is the outline for
mezzanine height with extended
shield option.
subassembly portion of the
transmitter section. They are
driven by a custom silicon IC
which converts differential PECL
The transceiver is attached to a
printed circuit board with the nine
signal pins and the two solder
posts which exit the bottom of the
housing. The two solder posts
provide the primary mechanical
strength to withstand the loads
imposed on the transceiver by
mating with duplex or simplex SC
or ST connectored fiber cables.
logic signals, ECL referenced
(shifted) to a +3.3 V or +5 V
supply, into an analog LED drive
current.
The optical subassemblies utilize
a high volume assembly process
together with low cost lens
elements which result in a cost
effective building block.
Receiver Sections
The receiver sections of the
HFBR-5803 and HFBR-5805 series
utilize InGaAs PIN photodiodes
coupled to a custom silicon
transimpedance preamplifier IC.
These are packaged in the optical
subassembly portion of the
receiver.
ELECTRICAL SUBASSEMBLY
DUPLEX SC
RECEPTACLE
DIFFERENTIAL
DATA OUT
PIN PHOTODIODE
SINGLE-ENDED
SIGNAL
QUANTIZER IC
DETECT OUT
PREAMP IC
These PIN/preamplifier combi-
nations are coupled to a custom
quantizer IC which provides the
final pulse shaping for the logic
output and the Signal Detect
function. The data output is dif-
ferential. The signal detect output
is single-ended. Both data and
signal detect outputs are PECL
compatible, ECL referenced
(shifted) to a +3.3 V or +5 V power
supply.
OPTICAL
SUBASSEMBLIES
DIFFERENTIAL
DATA IN
LED
DRIVER IC
TOP VIEW
Figure 1. SC Connector Block Diagram.
2
ELECTRICAL SUBASSEMBLY
QUANTIZER IC
DUPLEX ST
RECEPTACLE
DIFFERENTIAL
DATA OUT
PIN PHOTODIODE
SINGLE-ENDED
SIGNAL
DETECT OUT
PREAMP IC
OPTICAL
SUBASSEMBLIES
DIFFERENTIAL
DATA IN
LED
DRIVER IC
TOP VIEW
Figure 1a. ST Connector Block Diagram.
39.12
(1.540)
12.70
(0.500)
MAX.
6.35
(0.250)
AREA
RESERVED
FOR
PROCESS
PLUG
25.40
(1.000)
12.70
(0.500)
MAX.
HFBR-5ꢀ03
AGILENT
DATE CODE (YYWW)
5.93 0.1
(0.233 0.004)
SINGAPORE
+ 0.0ꢀ
0.75
- 0.05
3.30 0.3ꢀ
(0.130 0.015)
+ 0.003
10.35
(0.407)
)
(0.030
MAX.
- 0.002
2.92
(0.115)
1ꢀ.52
(0.729)
4.14
(0.163)
+ 0.25
1.27
- 0.05
+ 0.010
- 0.002
0.46
(0.01ꢀ)
)
Ø
(9x)
(0.050
NOTE 1
NOTE 1
23.55
(0.927)
20.32
(0.ꢀ00)
16.70
(0.657)
17.32 20.32 23.32
(0.6ꢀ2) (0.ꢀ00) (0.91ꢀ)
[ꢀx(2.54/.100)]
0.ꢀ7
(0.034)
23.24
(0.915)
15.ꢀꢀ
(0.625)
NOTE 1: THE SOLDER POSTS AND ELECTRICAL PINS ARE PHOSPHOR BRONZE WITH TIN LEAD OVER NICKEL PLATING.
DIMENSIONS ARE IN MILLIMETERS (INCHES).
Figure 2. SC Connector Package Outline Drawing with standard height.
3
42
(1.654)
MAX.
5.99
(0.236)
24.ꢀ
(0.976)
12.7
(0.500)
25.4
(1.000)
MAX.
HFBR-5ꢀ03T
DATE CODE (YYWW)
SINGAPORE
+ 0.0ꢀ
- 0.05
0.5
(0.020)
+ 0.003
(
- 0.002
(
12.0
(0.471)
MAX.
3.2
(0.126)
3.3 0.3ꢀ
0.3ꢀ
0.015)
20.32
(0.130 0.015)
(
0.46
Ø
(0.01ꢀ)
2.6
Ø
1.27
+ 0.25
- 0.05
+ 0.010
- 0.002
NOTE 1
(0.102)
(0.050)
(
)
20.32
17.4
(0.6ꢀ5)
[(ꢀx (2.54/0.100)]
20.32
(0.ꢀ00)
(0.ꢀ00)
22.ꢀ6
(0.900)
21.4
(0.ꢀ43)
3.6
(0.142)
1.3
(0.051)
23.3ꢀ
(0.921)
1ꢀ.62
(0.733)
NOTE 1: PHOSPHOR BRONZE IS THE BASE MATERIAL FOR THE POSTS & PINS WITH TIN LEAD OVER NICKEL PLATING.
DIMENSIONS IN MILLIMETERS (INCHES).
Figure 2a. ST Connector Package Outline Drawing with standard height.
1 = VEE
N/C
2 = RD
Rx
Tx
3 = RD
4 = SD
5 = VCC
6 = VCC
7 = TD
ꢀ = TD
9 = VEE
N/C
TOP VIEW
Figure 3. Pin Out Diagram.
4
0.51
(0.02)
29.6
(1.16)
SLOT DEPTH
UNCOMPRESSED
39.6
(1.56)
12.7
(0.50)
4.7
(0.1ꢀ5)
MAX.
AREA
RESERVED
FOR
PROCESS
PLUG
25.4
(1.00)
12.7
(0.50)
MAX.
2.0 0.1
(0.079 0.004)
SLOT WIDTH
26.4
(1.04)
MAX.
+0.1
-0.05
+0.004
-0.002
2.09
(0.0ꢀ)
0.25
10.2
(0.40)
UNCOMPRESSED
MAX.
(
0.010
)
9.ꢀ MAX.
(0.3ꢀ6)
1.3
(0.05)
3.3 0.3ꢀ
(0.130 0.015)
20.32
(0.ꢀ00)
15.ꢀ 0.15
(0.622 0.006)
+0.25
-0.05
+0.25
-0.05
+0.010
-0.002
0.46
9X Ø
+0.010
-0.002
1.27
)
(
0.01ꢀ
2X Ø
(
0.050
)
ꢀX
20.32
(0.ꢀ00)
23.ꢀ
(0.937)
2.54
(0.100)
20.32
(0.ꢀ00)
1.3
(0.051)
2X Ø
DIMENSIONS ARE IN MILLIMETERS (INCHES).
ALL DIMENSIONS ARE 0.025 mm UNLESS
OTHERWISE SPECIFIED.
Figure 2b. Package Outline Drawing with mezzanine height and extended shield.
5
2.2
(0.09)
SLOT DEPTH
39.6
12.7
(0.50)
MAX.
(1.56)
4.7
(0.1ꢀ5)
AREA
RESERVED
FOR
PROCESS
PLUG
12.7
(0.50)
25.4
(1.00)
MAX.
29.7
(1.17)
2.0 0.1
SLOT WIDTH
(0.079 0.004)
25.ꢀ
MAX.
(1.02)
+0.1
-0.05
+0.004
-0.002
0.25
10.2
(0.40)
(
0.010
)
MAX.
14.4
(0.57)
9.ꢀ MAX.
(0.3ꢀ6)
22.0
(0.ꢀ7)
3.3 0.3ꢀ
(0.130 0.015)
20.32
(0.ꢀ00)
15.ꢀ 0.15
(0.622 0.006)
+0.25
-0.05
0.46
+0.25
-0.05
+0.010
9X Ø
+0.010
-0.002
1.27
)
(
0.01ꢀ
2X Ø
(
0.050
)
-0.002
AREA
RESERVED
ꢀX
20.32
(0.ꢀ00)
20.32
(0.ꢀ00)
23.ꢀ
(0.937)
2.54
(0.100)
FOR
PROCESS
PLUG
1.3
(0.051)
2X Ø
DIMENSIONS ARE IN MILLIMETERS (INCHES).
ALL DIMENSIONS ARE 0.025 mm UNLESS
OTHERWISE SPECIFIED.
Figure 2c. Package Outline Drawing with mezzanine height and flush shield.
6
Application Information
Figure 4 was generated with a
Agilent fiber optic link model
containing the current industry
conventions for fiber cable
specifications and the FDDI PMD
and LCF-PMD optical parameters.
These parameters are reflected in
the guaranteed performance of
When used in Fast Ethernet, FDDI
and ATM 100 Mb/s applications
the performance of the 1300 nm
transceivers is guaranteed over
the signaling rate of 10 MBd to
125 MBd to the full conditions
listed in individual product
specification tables.
The Applications Engineering
group in the Agilent Fiber Optics
Communication Division is
available to assist you with the
technical understanding and
design trade-offs associated with
these transceivers. You can
contact them through your Agilent the transceiver specifications in
2.5
sales representative.
this data sheet. This same model
has been used extensively in the
ANSI and IEEE committees,
including the ANSI X3T9.5
committee, to establish the optical
performance requirements for
various fiber optic interface
standards. The cable parameters
used come from the ISO/IEC
JTC1/SC 25/WG3 Generic Cabling
for Customer Premises per
2.0
1.5
1.0
The following information is
provided to answer some of the
most common questions about the
use of these parts.
Transceiver Optical Power Budget
versus Link Length
0.5
0
Optical Power Budget (OPB) is
the available optical power for a
fiber optic link to accommodate
fiber cable losses plus losses due
to in-line connectors, splices,
optical switches, and to provide
margin for link aging and
0.5
0
25 50
75 100 125 150 175 200
SIGNAL RATE (MBd)
DIS 11801 document and the
EIA/TIA-568-A Commercial
CONDITIONS:
1. PRBS 27-1
Building Telecommunications
Cabling Standard per SP-2840.
2. DATA SAMPLED AT CENTER OF DATA SYMBOL.
3. BER = 10-6
4. TA = +25° C
5. VCC = 3.3 V to 5 V dc
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
unplanned losses due to cable
plant reconfiguration or repair.
12
HFBR-5ꢀ03, 62.5/125 µm
10
Figure 5. Transceiver Relative Optical Power
Budget at Constant BER vs. Signaling Rate.
Figure 4 illustrates the predicted
OPB associated with the
ꢀ
The transceivers may be used for
other applications at signaling
rates outside of the 10 MBd to
125 MBd range with some penalty
in the link optical power budget
primarily caused by a reduction of
receiver sensitivity. Figure 5 gives
an indication of the typical
HFBR-5ꢀ03
transceiver series specified in this
data sheet at the Beginning of Life
(BOL). These curves represent the
attenuation and chromatic plus
modal dispersion losses
associated with the 62.5/125 µm
and 50/125 µm fiber cables only.
The area under the curves
represents the remaining OPB at
any link length, which is available
for overcoming non-fiber cable
related losses.
50/125 µm
6
4
2
0
0.3 0.5
1.0
1.5
2.0
2.5
FIBER OPTIC CABLE LENGTH (km)
performance of these 1300 nm
products at different rates.
Figure 4. Optical Power Budget at BOL versus
Fiber Optic Cable Length.
These transceivers can also be
used for applications which
require different Bit Error Rate
(BER) performance. Figure 6
illustrates the typical trade-off
between link BER and the
receivers input optical power
level.
Transceiver Signaling Operating
Rate Range and BER Performance
For purposes of definition, the
symbol (Baud) rate, also called
signaling rate, is the reciprocal of
Agilent LED technology has
produced 1300 nm LED devices
with lower aging characteristics
than normally associated with
these technologies in the industry. the shortest symbol time. Data
The industry convention is 1.5 dB
aging for 1300 nm LEDs. The
Agilent 1300 nm LEDs will
rate (bits/sec) is the symbol rate
divided by the encoding factor
used to encode the data
experience less than 1 dB of aging (symbols/bit).
over normal commercial equip-
ment mission life periods. Contact
your Agilent sales representative
for additional details.
7
1 x 10-2
the typical contribution of the
Agilent transceivers is well below
electrostatic discharge (ESD). The
HFBR-5800 series of transceivers
1 x 10-3
1 x 10-4
these maximum allowed amounts. meet MIL-STD-883C Method
3015.4 Class 2 products.
HFBR-5ꢀ03 SERIES
Recommended Handling Precautions
1 x 10-5
1 x 10-6
1 x 10-7
1 x 10-ꢀ
1 x 10-9
1 x 10-10
1 x 10-11
1 x 10-12
Agilent recommends that normal
static precautions be taken in the
handling and assembly of these
transceivers to prevent damage
which may be induced by
Care should be used to avoid
shorting the receiver data or
signal detect outputs directly to
ground without proper current
limiting impedance.
CENTER OF SYMBOL
-6
-4
-2
0
2
4
RELATIVE INPUT OPTICAL POWER - dB
CONDITIONS:
1. 155 MBd
2. PRBS 27-1
3. CENTER OF SYMBOL SAMPLING
4. TA = +25°C
5. VCC = 3.3 V to 5 V dc
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
Rx
Tx
Figure 6. Bit Error Rate vs. Relative Receiver
Input Optical Power.
NO INTERNAL CONNECTION
NO INTERNAL CONNECTION
Transceiver Jitter Performance
The Agilent 1300 nm transceivers
are designed to operate per the
system jitter allocations stated in
Tables E1 of Annexes E of the
FDDI PMD and LCF-PMD
standards.
HFBR-5ꢀ03
TOP VIEW
Rx
Rx
VCC
5
Tx
Tx
VEE
RD
2
RD
3
SD
4
VCC
TD
7
TD
ꢀ
VEE
The Agilent 1300 nm transmitters
will tolerate the worst case input
electrical jitter allowed in these
tables without violating the worst
case output jitter requirements of
Sections 8.1 Active Output
1
6
9
C1
C2
Interface of the FDDI PMD and
LCF-PMD standards.
VCC
R2
R3
C5
L1
L2
C4
TERMINATION
AT PHY
DEVICE
INPUTS
The Agilent 1300 nm receivers will
tolerate the worst case input
optical jitter allowed in Sections
8.2 Active Input Interface of the
FDDI PMD and LCF-PMD
standards without violating the
worst case output electrical jitter
allowed in the Tables E1 of the
Annexes E.
R1
R4
VCC
C3
V
CC FILTER
AT VCC PINS
TRANSCEIVER
R9
R5
R7
TERMINATION
AT TRANSCEIVER
INPUTS
R6
Rꢀ
R10
RD
RD
SD
VCC
TD
TD
The jitter specifications stated in
the following 1300 nm transceiver
specification tables are derived
from the values in Tables E1 of
Annexes E. They represent the
worst case jitter contribution that
the transceivers are allowed to
make to the overall system jitter
without violating the Annex E
allocation example. In practice
NOTES:
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT
OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT
BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.
R1 = R4 = R6 = Rꢀ = R10 = 130 OHMS FOR +5.0 V OPERATION, ꢀ2 OHMS FOR +3.3 V OPERATION.
R2 = R3 = R5 = R7 = R9 = ꢀ2 OHMS FOR +5.0 V OPERATION, 130 OHMS FOR +3.3 V OPERATION.
C1 = C2 = C3 = C5 = C6 = 0.1 µF.
C4 = 10 µF.
L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.
Figure 7. Recommended Decoupling and Termination Circuits
8
Solder and Wash Process
Compatibility
from these transceivers. Figure 7
provides a good example of a
schematic for a power supply
Board Layout - Art Work
The Applications Engineering
group has developed Gerber file
The transceivers are delivered
with protective process plugs
inserted into the duplex SC or
duplex ST connector receptacle.
This process plug protects the
optical subassemblies during
wave solder and aqueous wash
processing and acts as a dust
cover during shipping.
decoupling circuit that works well artwork for a multilayer printed
with these parts. It is further
recommended that a contiguous
ground plane be provided in the
circuit board directly under the
transceiver to provide a low
inductance ground for signal
return current. This recommenda-
tion is in keeping with good high
frequency board layout practices.
circuit board layout incorporating
the recommendations above.
Contact your local Agilent sales
representative for details.
Board Layout - Mechanical
For applications providing a
choice of either a duplex SC or a
duplex ST connector interface,
while utilizing the same pinout on
the printed circuit board, the ST
port needs to protrude from the
chassis panel a minimum of
9.53 mm for sufficient clearance
to install the ST connector.
These transceivers are compatible
with either industry standard
wave or hand solder processes.
Board Layout - Hole Pattern
The Agilent transceiver complies
with the circuit board “Common
Transceiver Footprint” hole
Shipping Container
The transceiver is packaged in a
shipping container designed to
protect it from mechanical and
ESD damage during shipment or
storage.
pattern defined in the original
multisource announcement which
defined the 1 x 9 package style.
This drawing is reproduced in
Figure 8 with the addition of ANSI
Y14.5M compliant dimensioning to
be used as a guide in the mechani-
cal layout of your circuit board.
Please refer to Figure 8a for a
mechanical layout detailing the
recommended location of the
duplex SC and duplex ST trans-
ceiver packages in relation to the
chassis panel.
Board Layout - Decoupling Circuit
and Ground Planes
It is important to take care in the
layout of your circuit board to
achieve optimum performance
For both shielded design options
Figures 8b and 8c identify front
panel aperture dimensions.
2 x Ø 1.9 0.1
(0.075 0.004)
20.32
(0.ꢀ00)
9 x Ø 0.ꢀ 0.1
(0.032 0.004)
20.32
(0.ꢀ00)
2.54
(0.100)
TOP VIEW
DIMENSIONS ARE IN MILLIMETERS (INCHES)
Figure ꢀ. Recommended Board Layout Hole Pattern
9
42.0
24.ꢀ
9.53
(NOTE 1)
12.0
0.51
12.09
25.4
39.12
11.1
6.79
0.75
25.4
NOTE 1: MINIMUM DISTANCE FROM FRONT
OF CONNECTOR TO THE PANEL FACE.
Figure ꢀa. Recommended Common Mechanical Layout for SC and ST 1 x 9 Connectored Transceivers.
Regulatory Compliance
Electrostatic Discharge (ESD)
There are two design cases in
which immunity to ESD damage is the equipment chassis containing
important.
The second case to consider is
static discharges to the exterior of
These transceiver products are
intended to enable commercial
system designers to develop
equipment that complies with the
various international regulations
governing certification of
Information Technology
Equipment. See the Regulatory
Compliance Table for details.
Additional information is available
from your Agilent sales
the transceiver parts. To the
extent that the duplex SC
The first case is during handling of
the transceiver prior to mounting
it on the circuit board. It is
important to use normal ESD
handling precautions for ESD
sensitive devices. These
precautions include using
grounded wrist straps, work
benches, and floor mats in ESD
controlled areas.
connector is exposed to the
outside of the equipment chassis
it may be subject to whatever ESD
system level test criteria that the
equipment is intended to meet.
representative.
10
0.ꢀ
(0.032)
2X
0.ꢀ
(0.032)
2X
+0.5
10.9
-0.25
+0.02
-0.01
)
0.43
)
9.4
(0.37)
27.4 0.50
(1.0ꢀ 0.02)
6.35
(0.25)
MODULE
PROTRUSION
3.5
(0.14)
PCB BOTTOM VIEW
DIMENSIONS ARE IN MILLIMETERS (INCHES).
ALL DIMENSIONS ARE .025mm UNLESS
OTHERWISE SPECIFIED.
Figure ꢀb. Dimensions shown for mounting module with extended shield to panel.
11
THICKER PANEL WILL RECESS MODULE.
THINNER PANEL WILL PROTRUDE MODULE.
1.9ꢀ
(0.07ꢀ)
1.27
(0.05)
SEPTUM
30.2
(1.19)
KEEP OUT ZONE
0.36
(0.014)
10.ꢀ2
(0.426)
14.73
(0.5ꢀ)
1.ꢀ2
(0.072)
26.4
(1.04)
13.ꢀ2
(0.544)
BOTTOM SIDE OF PCB
12.0
(0.47)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
ALL DIMENSIONS ARE .025 mm UNLESS
OTHERWISE SPECIFIED.
Figure ꢀc. Dimension shown for mounting module with flush shield to panel.
12
Regulatory Compliance Table
Feature
Test Method
Performance
Electrostatic Discharge MIL-STD-883C
Meets Class 2 (2000 to 3999 Volts)
Withstand up to 2200 V applied between electrical pins.
(ESD) to the Electrical
Pins
Method 3015.4
Electrostatic Discharge Variation of
(ESD) to the Duplex SC IEC 801-2
Receptacle
Typically withstand at least 25 kV without damage when the
Duplex SC Connector Receptacle is contacted by a Human
Body Model probe.
Electromagnetic
Interference (EMI)
FCC Class B
Typically provide a 13 dB margin (with duplex SC package) or
a 9 dB margin (with duplex ST package) to the noted standard
limits when tested at a certified test range with the
transceiver mounted to a circuit card without a chassis
enclosure.
CENELEC CEN55022
Class B (CISPR 22B)
VCCI Class 2
Immunity
Variation of IEC 801-3
Typically show no measurable effect from a 10 V/m field swept
from 10 to 450 MHz applied to the transceiver when mounted
to a circuit card without a chassis enclosure.
Electromagnetic Interference (EMI)
Most equipment designs utilizing
these high speed transceivers
from Agilent will be required to
meet the requirements of FCC in
the United States, CENELEC
EN55022 (CISPR 22) in Europe
and VCCI in Japan.
In all well-designed chassis, two
Transceiver Reliability and
0.5" holes for ST connectors to
protrude through will provide
4.6 dB more shielding than one
Performance Qualification Data
The 1 x 9 transceivers have
passed Agilent reliability and
1.2" duplex SC rectangular cutout. performance qualification testing
Thus, in a well-designed chassis,
the duplex ST 1 x 9 transceiver
emissions will be identical to the
duplex SC 1 x 9 transceiver
emissions.
and are undergoing ongoing
quality monitoring. Details are
available from your Agilent sales
representative.
200
These transceivers are manufac-
tured at the Agilent Singapore
location which is an ISO 9002
certified facility.
3.0
Immunity
1ꢀ0
1.5
Equipment utilizing these
transceivers will be subject to
radio-frequency electromagnetic
fields in some environments.
These transceivers have a high
immunity to such fields.
160
2.0
2.5
3.5
Applications Support Materials
Contact your local Agilent
Component Field Sales Office for
information on how to obtain PCB
layouts, test boards and demo
140
120
100
3.0
3.5
tr/f - TRANSMITTER
OUTPUT OPTICAL
RISE/FALL TIMES - ns
For additional information
regarding EMI, susceptibility, ESD boards for the 1 x 9 transceivers
and conducted noise testing
procedures and results on the
1 x 9 Transceiver family, please
refer to Applications Note 1075,
Testing and Measuring Electro-
magnetic Compatibility Perform-
1200
1300
1320
1340
1360 13ꢀ0
C - TRANSMITTER OUTPUT OPTICAL
CENTER WAVELENGTH - nm
Accessory Duplex SC Connectored
Cable Assemblies
Agilent recommends for optimal
coupling the use of flexible-body
HFBR-5ꢀ03 FDDI TRANSMITTER TEST RESULTS
OF
,
AND tr/f ARE CORRELATED AND
COMCPLY WITH THE ALLOWED SPECTRAL WIDTH
AS A FUNCTION OF CENTER WAVELENGTH FOR
VARIOUS RISE AND FALL TIMES.
duplex SC connectored cable.
ance of the HFBR-510X/-520X
Fiber Optic Transceivers.
Figure 9. Transmitter Output Optical Spectral
Width (FWHM) vs. Transmitter Output Optical
Center Wavelength and Rise/Fall Times.
Accessory Duplex ST Connectored
Cable Assemblies
Agilent recommends the use of
Duplex Push-Pull connectored
cable for the most repeatable
optical power coupling
performance.
13
4.40
1.975
1.25
4.ꢀ50
1.525
0.525
10.0
5.6
1.025
1.00
0.075
0.975
0.90
100% TIME
INTERVAL
40 0.7
0.50
0.10
0.725
0.725
0% TIME
INTERVAL
0.025
0.0
0.075
-0.025
-0.05
1.525
0.525
5.6
1.975
4.40
10.0
4.ꢀ50
ꢀ0 500 ppm
TIME - ns
THE HFBR-5ꢀ03 OUTPUT OPTICAL PULSE SHAPE SHALL FIT WITHIN THE BOUNDARIES OF THE
PULSE ENVELOPE FOR RISE AND FALL TIME MEASUREMENTS.
Figure 10. Output Optical Pulse Envelope.
5
4
3
2.5 x 10-10 BER
2
1.0 x 10-12 BER
1
0
-4
-3
EYE SAMPLING TIME POSITION (ns)
CONDITIONS:
-2
-1
0
1
2
3
4
1.TA = +25°C
2. VCC = 3.3 V to 5 V dc
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
4. INPUT OPTICAL POWER IS NORMALIZED TO
CENTER OF DATA SYMBOL.
5. NOTE 19 AND 20 APPLY.
Figure 11. Relative Input Optical Power vs.
Eye Sampling Time Position.
14
-31.0 dBm
MIN (PO + 4.0 dB OR -31.0 dBm)
PA(PO + 1.5 dB < PA < -31.0 dBm)
PO = MAX (PS OR -45.0 dBm)
(PS = INPUT POWER FOR BER < 102)
INPUT OPTICAL POWER
(> 1.5 dB STEP INCREASE)
INPUT OPTICAL POWER
(> 4.0 dB STEP DECREASE)
-45.0 dBm
ANS _ MAX
AS _ MAX
SIGNAL _ DETECT (ON)
SIGNAL _ DETECT (OFF)
TIME
AS _ MAX - MAXIMUM ACQUISITION TIME (SIGNAL).
AS _ MAX IS THE MAXIMUM SIGNAL _ DETECT ASSERTION TIME FOR THE STATION.
AS _ MAX SHALL NOT EXCEED 100.0 µs. THE DEFAULT VALUE OF AS _ MAX IS 100.0 µs.
ANS _ MAX - MAXIMUM ACQUISITION TIME (NO SIGNAL).
ANS _ MAX IS THE MAXIMUM SIGNAL _ DETECT DEASSERTION TIME FOR THE STATION.
ANS _ MAX SHALL NOT EXCEED 350 µs. THE DEFAULT VALUE OF AS _ MAX IS 350 µs.
Figure 12. Signal Detect Thresholds and Timing.
15
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parameter
in isolation, all other parameters having values within the recommended operating conditions. It should not be assumed that
limiting values of more than one parameter can be applied to the product at the same time. Exposure to the absolute maximum
ratings for extended periods can adversely affect device reliability.
Parameter
Symbol
Min.
-40
Typ.
Max.
+100
+260
10
Unit
°C
°C
sec.
V
V
V
mA
Reference
Storage Temperature
Lead Soldering Temperature
Lead Soldering Time
Supply Voltage
Data Input Voltage
Differential Input Voltage
Output Current
T
S
T
SOLD
t
SOLD
V
V
V
-0.5
-0.5
7.0
CC
V
CC
I
1.4
50
Note 1
D
I
O
Recommended Operating Conditions
Parameter
Symbol
Min.
Typ.
Max.
Unit
Reference
Ambient Operating Temperature
Supply Voltage
TA
VCC
VCC
0
+70
3.5
5.25
°C
V
V
3.135
4.75
Data Input Voltage - Low
Data Input Voltage - High
Data and Signal Detect Output Load
VIL - VCC
VIH - VCC
RL
-1.810
-1.165
-1.475
-0.880
V
V
50
Note 2
Transmitter Electrical Characteristics
(T = 0°C to +70°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
A
CC
Parameter
Supply Current
Power Dissipation at VCC = 3.3 V
at VCC = 5.0 V
Data Input Current - Low
Data Input Current - High
Symbol
ICC
PDISS
PDISS
IIL
Min.
Typ.
133
0.45
0.76
-2
Max.
175
0.6
Unit
mA
W
W
µA
µ
Reference
Note 3
0.97
-350
IIH
18
350
Receiver Electrical Characteristics
(T = 0°C to +70°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
A
CC
Parameter
Supply Current
Power Dissipation at V = 3.3 V
Symbol
Min.
Typ.
87
0.15
0.3
Max.
120
0.25
0.5
-1.620
-0.880
2.2
Unit
mA
W
W
V
Reference
Note 4
Note 5
Note 5
Note 6
Note 6
Note 7
Note 7
Note 6
Note 6
Note 7
Note 7
I
CC
P
DISS
P
DISS
CC
at V = 5.0 V
CC
Data Output Voltage - Low
Data Output Voltage - High
Data Output Rise Time
V
V
- V
- V
-1.840
-1.045
0.8
OL
CC
V
OH
CC
t
t
ns
ns
V
V
ns
ns
r
f
Data Output Fall Time
0.8
2.2
Signal Detect Output Voltage - Low
Signal Detect Output Voltage - High
Signal Detect Output Rise Time
Signal Detect Output Fall Time
V
V
- V
- V
-1.840
-1.045
0.35
-1.620
-0.880
40
OL
CC
OH
CC
t
t
r
f
0.35
40
16
Transmitter Optical Characteristics
(T = 0°C to +70°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
A
CC
Parameter
Symbol
Min.
Typ.
Max.
Unit
Reference
Output Optical Power
62.5/125 µm, NA = 0.275 Fiber EOL
BOL
PO
-19
-20
-14
dBm avg. Note 11
Output Optical Power
50/125 µm, NA = 0.20 Fiber
BOL
EOL
PO
-22.5
-23.5
-14
dBm avg. Note 11
Optical Extinction Ratio
Output Optical Power at
Logic “0” State
Center Wavelength
Spectral Width - FWHM
Spectral Width - nm RMS
0.003
1308
147
63
0.08
-45
%
Note 12
PO (“0”)
dBm avg. Note 13
1270
1360
nm
nm
Note 14
Note 14
Figure 9
C
Optical Rise Time
tr
0.6
0.6
1.9
3.1
3.1
0.6
ns
Note 14, 15
Figure 9, 10
Note 14, 15
Figure 9, 10
Note 16
Note 17
Note 18
Optical Fall Time
tf
1.6
ns
Duty Cycle Distortion
Contributed by the
Transmitter
Data Dependent Jitter
Contributed by the
Transmitter
DCD
ns p-p
DDJ
RJ
0.6
ns p-p
ns p-p
Random Jitter Contributed
by the Transmitter
0.60
17
Receiver Optical and Electrical Characteristics
(T = 0°C to +70°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)
A
CC
Parameter
Symbol
Min.
Typ.
Max.
Unit
Reference
Input Optical Power
Minimum at Window Edge
PIN Min. (W)
-33.9
-31
dBm avg. Note 19
Figure 11
PIN Min. (C)
Input Optical Power
Minimum at Eye Center
-35.2
-31.8
dBm avg. Note 20
Figure 11
Input Optical Power Maximum
Operating Wavelength
Duty Cycle Distortion
Contributed by the Receiver
Data Dependent Jitter
Contributed by the Receiver
Random Jitter Contributed
by the Receiver
Signal Detect - Asserted
Signal Detect - Deasserted
Signal Detect - Hysteresis
PIN Max.
-14
1270
dBm avg. Note 19
nm
1380
0.6
DCD
DDJ
RJ
ns p-p
ns p-p
ns p-p
Note 8
Note 9
Note 10
0.4
0.5
-33
PA
PD + 1.5
dB
-45
dBm avg. Note 21, 22
Figure 12
dBm avg. Note 23, 24
Figure 12
PD
PA - PD
AS_Max
1.5
0
dB
µs
Figure 12
Note 21, 22
Figure 12
Signal Detect Assert Time
(off to on)
Signal Detect Deassert Time
(on to off)
2
8
100
350
ANS_Max
0
µs
Note 23, 24
Figure 12
Notes:
1. This is the maximum voltage that can be
applied across the Differential Transmitter
Data Inputs to prevent damage to the
input ESD protection circuit.
8. Duty Cycle Distortion contributed by the
receiver is measured at the 50%
• Over the specified operating voltage
and temperature ranges.
threshold using an IDLE Line State,
125 MBd (62.5 MHz square-wave), input
signal. The input optical power level is
-20 dBm average. See Application
Information - Transceiver Jitter Section
for further information.
• With HALT Line State, (12.5 MHz
square-wave), input signal.
2. The outputs are terminated with 50 W
• At the end of one meter of noted
optical fiber with cladding modes
removed.
The average power value can be
converted to a peak power value by
adding 3 dB. Higher output optical power
transmitters are available on special
request.
connected to V -2 V.
CC
3. The power supply current needed to
operate the transmitter is provided to
differential ECL circuitry. This circuitry
maintains a nearly constant current flow
from the power supply. Constant current
operation helps to prevent unwanted
electrical noise from being generated and
conducted or emitted to neighboring
circuitry.
9. Data Dependent Jitter contributed by
the receiver is specified with the FDDI
DDJ test pattern described in the FDDI
PMD Annex A.5. The input optical power
level is -20 dBm average. See Application
Information - Transceiver Jitter Section
for further information.
10. Random Jitter contributed by the receiver
is specified with an IDLE Line State,
125 MBd (62.5 MHz square-wave), input
signal. The input optical power level is at
12. The Extinction Ratio is a measure of the
modulation depth of the optical signal.
The data “0” output optical power is
compared to the data “1” peak output
optical power and expressed as a
percentage. With the transmitter driven
by a HALT Line State (12.5 MHz square-
wave) signal, the average optical power
is measured. The data “1” peak power is
then calculated by adding 3 dB to the
measured average optical power. The
data “0” output optical power is found by
measuring the optical power when the
transmitter is driven by a logic “0” input.
The extinction ratio is the ratio of the
optical power at the “0” level compared
to the optical power at the “1” level
expressed as a percentage or in decibels.
4. This value is measured with the outputs
terminated into 50 W connected to V - 2 V
CC
and an Input Optical Power level of
-14 dBm average.
5. The power dissipation value is the power
dissipated in the receiver itself. Power
dissipation is calculated as the sum of the
products of supply voltage and currents,
minus the sum of the products of the
output voltages and currents.
maximum “P
(W)”. See Application
IN Min.
Information - Transceiver Jitter Section
for further information.
11. These optical power values are measured
with the following conditions:
• The Beginning of Life (BOL) to the End
of Life (EOL) optical power degradation
is typically 1.5 dB per the industry
convention for long wavelength LEDs.
The actual degradation observed in
Agilent’s 1300 nm LED products is
< 1 dB, as specified in this data sheet.
6. This value is measured with respect to
V
with the output terminated into 50 W
CC
connected to V - 2 V.
CC
7. The output rise and fall times are
measured between 20% and 80% levels
with the output connected to V -2 V
CC
through 50 W.
18
13. The transmitter provides compliance with
the need for Transmit_Disable commands
from the FDDI SMT layer by providing an
Output Optical Power level of < -45 dBm
average in response to a logic “0” input.
This specification applies to either 62.5/
125 µm or 50/125 µm fiber cables.
14. This parameter complies with the FDDI
PMD requirements for the trade-offs
between center wavelength, spectral
width, and rise/fall times shown in Figure 9.
15. This parameter complies with the optical
pulse envelope from the FDDI PMD shown
in Figure 10. The optical rise and fall times
are measured from 10% to 90% when the
transmitter is driven by the FDDI HALT Line
State (12.5 MHz square-wave) input signal.
16. Duty Cycle Distortion contributed by the
transmitter is measured at a 50%
• Receiver data window time-width is
2.13 ns or greater and centered at
20. All conditions of Note 19apply except that
the measurement is made at the center of
the symbol with no window time-width.
21. This value is measured during the
transition from low to high levels of input
optical power.
22. The Signal Detect output shall be
asserted within 100 µs after a step
increase of the Input Optical Power. The
step will be from a low Input Optical
Power, - -45 dBm, into the range between
mid-symbol. This worst case window
time-width is the minimum allowed
eye-opening presented to the FDDI PHY
PM._Data indication input (PHY input)
per the example in FDDI PMD Annex E.
This minimum window time-width of
2.13 ns is based upon the worst case
FDDI PMD Active Input Interface
optical conditions for peak-to-peak
DCD (1.0 ns), DDJ (1.2 ns) and RJ
greater than P , and -14 dBm. The BER of
A
-2
(0.76 ns) presented to the receiver.
To test a receiver with the worst case
FDDI PMD Active Input jitter condition
requires exacting control over DCD, DDJ
and RJ jitter components that is difficult
to implement with production test
the receiver output will be 10 or better
during the time, LS_Max (15 µs) after
Signal Detect has been asserted. See
Figure 12 for more information.
23. This value is measured during the
transition from high to low levels of input
optical power. The maximum value will
occur when the input optical power is
either -45 dBm average or when the input
equipment. The receiver can be
threshold using an IDLE Line State,
equivalently tested to the worst case FDDI
PMD input jitter conditions and meet the
minimum output data window time-width
of 2.13 ns. This is accomplished by using a
nearly ideal input optical signal (no DCD,
insignificant DDJ and RJ) and measuring
for a wider window time-width of 4.6 ns.
This is possible due to the cumulative
effect of jitter components through their
superposition (DCD and DDJ are directly
additive and RJ components are rms
additive). Specifically, when a nearly ideal
input optical test signal is used and the
maximum receiver peak-to-peak jitter
contributions of DCD (0.4 ns), DDJ (1.0 ns),
and RJ (2.14 ns) exist, the minimum
window time-width becomes 8.0 ns -0.4 ns
- 1.0 ns - 2.14 ns = 4.46 ns, or
conservatively 4.6 ns. This wider window
time-width of 4.6 ns guarantees the FDDI
PMD Annex E minimum window time-
width of 2.13 ns under worst case input
jitter conditions to the Agilent receiver.
• Transmitter operating with an IDLE Line
State pattern, 125 MBd (62.5 MHz
square-wave), input signal to simulate
any cross-talk present between the
transmitter and receiver sections of the
transceiver.
125 MBd (62.5 MHz square-wave), input
signal. See Application Information -
Transceiver Jitter Performance Section of
this data sheet for further details.
-2
optical power yields a BER of 10 or
better, whichever power is higher.
24. Signal detect output shall be de-asserted
within 350 µs after a step decrease in the
Input Optical Power from a level which is
17. Data Dependent Jitter contributed by the
transmitter is specified with the FDDI test
pattern described in FDDI PMD Annex A.5.
See Application Information - Transceiver
Jitter Performance Section of this data
sheet for further details.
18. Random Jitter contributed by the
transmitter is specified with an IDLE Line
State, 125 MBd (62.5 MHz square-wave),
input signal. See Application Information -
Transceiver Jitter Performance Section of
this data sheet for further details.
19. This specification is intended to indicate
the performance of the receiver section of
the transceiver when Input Optical Power
signal characteristics are present per the
following definitions. The Input Optical
Power dynamic range from the minimum
level (with a window time-width) to the
maximum level is the range over which
the receiver is guaranteed to provide
the lower of; -31 dBm or P + 4 dB (P is
D
D
the power level at which signal detect
was deasserted), to a power level of
-45 dBm or less. This step decrease will
have occurred in less than 8 ns. The
-2
receiver output will have a BER of 10 or
better for a period of 12 µs or until signal
detect is deasserted. The input data
stream is the Quiet Line State. Also, signal
detect will be deasserted within a
maximum of 350 µs after the BER of the
-2
receiver output degrades above 10 for
an input optical data stream that decays
with a negative ramp function instead of a
step function. See Figure 12 for more
information.
output data with a Bit Error Ratio (BER)
-10
better than or equal to 2.5 x 10
• At the Beginning of Life (BOL)
• Over the specified operating
.
temperature and voltage ranges
• Input symbol pattern is the FDDI test
pattern defined in FDDI PMD Annex A.5
with 4B/5B NRZI encoded data that
contains a duty cycle base-line wander
effect of 50 kHz. This sequence causes
a near worst case condition for inter-
symbol interference.
19
www.semiconductor.agilent.com
Data subject to change.
Copyright © 2000 Agilent Technologies, Inc.
Obsoletes: 5980-2301E
December 12, 2000
5988-1660EN
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