HFCT-5951NLZ [AVAGO]
FIBER OPTIC TRANSCEIVER, 1270-1570nm, 622Mbps(Tx), 622Mbps(Rx), BOARD/PANEL MOUNT, LC CONNECTOR, ROHS COMPLIANT, PLASTIC, DIP-10;
| 型号： | HFCT-5951NLZ |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | FIBER OPTIC TRANSCEIVER, 1270-1570nm, 622Mbps(Tx), 622Mbps(Rx), BOARD/PANEL MOUNT, LC CONNECTOR, ROHS COMPLIANT, PLASTIC, DIP-10 通信 ATM 异步传输模式 放大器 光纤 |
| 文件： | 总18页 (文件大小：428K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HFCT-5951NLZ/NGZ and HFCT-5952NLZ/NGZ
Single Mode Laser Small Form Factor Transceivers
for ATM, SONET OC-12/SDH STM-4 (L4.1)
Part of the Avago METRAK family
Data Sheet
Description
Features
The HFCT-595xNLZ/NGZ transceivers are high perfor- • RoHS Compliant
mance, cost effective modules for serial optical data
• HFCT-595xNLZ/NGZ are compliant to the long reach
communications applications specified for a signal rate
of 622 Mb/s. They are designed to provide SONET/SDH
compliant links for 622 Mb/s long reach links.
SONET OC-12/SDH STM-4 (L4.1) specifications
• Multisourced 2 x 5 and 2 x 10 package styles with LC
receptacle
All modules are designed for single mode fiber and
operate at a nominal wavelength of 1300 nm. They in-
corporate high performance, reliable, long wavelength
optical devices and proven circuit technology to give long
life and consistent service.
• Single +3.3 V power supply
• Temperature range:
0°C to +70°C HFCT-595xNLZ/NGZ:
• Wave solder and aqueous wash process compatible
• Manufactured in an ISO9002 certified facility
The transmitter section consists of a Distributed Feedback
Laser (DFB) packaged in conjunction with an optical
isolator for excellent back reflection performance. The
transmitter has full IEC 825 and CDRH Class 1 eye safety.
• Performance HFCT-595xNLZ/NGZ:
Links of 40 km with 9/125 µm SMF
• Fully Class 1 CDRH/IEC 825 compliant
The receiver section uses a MOVPE grown planar PIN pho-
todetector for low dark current and excellent responsivity.
• Pin Outs:
HFCT-5951NLZ/NGZ 2 x 5
HFCT-5952NLZ/NGZ 2 x 10
A pseudo-ECL logic interface simplifies interface to
external circuitry.
Applications
These transceivers are supplied in the new industry
standard 2 x 5 and 2 x 10 DIP style footprint with the LC
fiber connector interface and are fully compliant with SFF
Multi Source Agreement (MSA).
• SONET/SDH equipment interconnect, STS-12/SDH
STM-4 rate
• Long reach (up to 40 km) ATM links
Functional Description
Receiver Section
Design
The receiver section contains an InGaAs/InP photo
detector and a preamplifier mounted in an optical subas-
sembly. This optical subassembly is coupled to a postamp/
decision circuit.
The device incorporates a photodetector bias circuit. This
output must be connected to V and can be monitored
CC
by connecting through a series resistor (see application
section).
The postamplifier is ac coupled to the preamplifier as
illustrated in Figure 1. The coupling capacitors are large
enough to pass the SONET/SDH test pattern at 622 MBd
without significant distortion or performance penalty. If
a lower signal rate, or a code which has significantly more
low frequency content is used, sensitivity, jitter and pulse
distortion could be degraded.
Noise Immunity
The receiver includes internal circuit components to filter
power supply noise. However under some conditions
of EMI and power supply noise, external power supply
filtering may be necessary (see application section).
The Signal Detect Circuit
Figure 1 also shows a filter function which limits the
bandwidth of the preamp output signal. The filter is
designed to bandlimit the preamp output noise and thus
improve the receiver sensitivity.
The signal detect circuit works by sensing the peak level of
the received signal and comparing this level to a reference.
The SD output is low voltage TTL.
Thesecomponentswillreducethesensitivityofthereceiver
as the signal bit rate is increased above 622 Mb/s.
PHOTODETECTOR
BIAS
DATA OUT
FILTER
TRANS-
IMPEDANCE
PRE-
PECL
OUTPUT
BUFFER
AMPLIFIER
AMPLIFIER
DATA OUT
GND
TTL
OUTPUT
BUFFER
SIGNAL
DETECT
CIRCUIT
SD
Figure 1. Receiver Block Diagram
2
Functional Description
Transmitter Section
Design
The transmitter section uses a distributed feedback (DFB)
laser as its optical source, see Figure 2. The source is
packaged in conjunction with an optical isolator to provide
excellent back reflection performance. The package has
been designed to be compliant with IEC 825 eye safety
requirements under any single fault condition. The optical
output is controlled by a custom IC that detects the laser
output via the monitor photodiode. This IC provides both
dc and ac current drive to the laser to ensure correct
modulation, eye diagram and extinction ratio over
temperature, supply voltage and operating life.
The transmitter section also includes monitor circuitry
for both the laser diode bias current and laser diode
optical power.
DFB
PHOTODIODE
LASER
(rear facet monitor)
DATA
DATA
LASER
MODULATOR
PECL
INPUT
LASER BIAS
DRIVER
BMON(+)
B
MON(-)
LASER BIAS
CONTROL
PMON(+)
PMON(-)
Figure 2. Simplified Transmitter Schematic
3
Package
The overall package concept for the Avago transceiver The optical subassemblies are each attached to their
consists of four basic elements; two optical subassemblies respective transmit or receive electrical subassemblies.
and two electrical subassemblies. They are housed as These two units are than fitted within the outer housing
illustrated in the block diagram in Figure3.
of the transceiver that is molded of filled nonconduc-
tive plastic to provide mechanical strength. The housing
is then encased with a metal EMI protective shield. Four
ground connections are provided for connecting the EMI
shield to signal ground.
The package outline drawing and pin out are shown in
Figures 4, 5 and 6. The details of this package outline and
pin out are compliant with the multisource definition
of the 2 x 5 and 2 x 10 DIP. The low profile of the Avago
transceiver design complies with the maximum height The pcb’s for the two electrical subassemblies both carry
allowed for the LC connector over the entire length of the the signal pins that exit from the bottom of the trans-
package.
ceiver. The solder posts are fastened into the molding
of the device and are designed to provide the mechani-
cal strength required to withstand the loads imposed on
the transceiver by mating with the LC connectored fiber
cables. Although they are not connected electrically to
The electrical subassemblies consist of high volume multi-
layer printed circuit boards on which the IC and various
surface-mounted passive circuit elements are attached.
The receiver electrical subassembly includes an internal the transceiver, it is recommended to connect them to
shield for the electrical and optical subassemblies to
ensure high immunity to external EMI fields.
chassis ground.
RX SUPPLY
Note 3
PHOTO DETECTOR
BIAS Note 2
DATA OUT
PIN PHOTODIODE
PREAMPLIFIER
SUBASSEMBLY
QUANTIZER IC
DATA OUT
RX GROUND
SIGNAL
DETECT
LC
TX GROUND
RECEPTACLE
Note 1
DATA IN
DATA IN
LASER BIAS
MONITORING
LASER
OPTICAL
SUBASSEMBLY
Tx DISABLE
BMON(+) Note 1
BMON(-) Note 1
PMON(+) Note 1
PMON(-) Note 1
LASER DRIVER
AND CONTROL
CIRCUIT
LASER DIODE
OUTPUT POWER
MONITORING
Note 1
TX SUPPLY
CASE
Note 1: THESE FUNCTIONS ONLY AVAILABLE ON 2 x 10 PINOUT DESIGN
Note 2: CONNECTED TO RXVCC IN 2 x 5 DESIGN
Note 3: NOSE CLIP PROVIDES CONNECTION TO CHASSIS GROUND FOR BOTH EMI AND THERMAL DISSIPATION.
Figure 3. Block Diagram.
4
+ 0
- 0.2
+0
13.59
0.535
13.59
(0.535)
MAX
15.0 0.2
(0.591 0.008)
(
)
-0.008
TOP VIEW
48.5 0.2
(1.91 0.008)
6.25
(0.246)
4.06 0.1
(0.16 0.004)
10.8 0.2
(0.425 0.008)
9.8
(0.386)
MAX
3.81 0.15
(0.15 0.006)
Ø 1.07 0.1
(0.042 0.004)
9.6 0.2
(0.378 0.008)
1
0.1
0.25 0.1
(0.01 0.004)
20 x 0.5 0.2
(0.02 0.008)
(0.039 0.004)
10.16 0.1
(0.4 0.004)
1
0.1
19.5 0.3
(0.768 0.012)
(0.039 0.004)
BACK VIEW
FRONT VIEW
SIDE VIEW
1.78 0.1
(0.07 0.004)
48.5 0.2
(1.91 0.008)
9.8
(0.386)
MAX
G MODULE - NO EMI NOSE SHIELD
3.81 0.1
(0.15 0.004)
0.25 0.1
(0.01 0.004)
20 x 0.5 0.2
(0.02 0.008)
1.78 0.1
(0.07 0.004)
Ø 1.07 0.1
(0.042 0.004)
1
0.1
19.5 0.3
(0.768 0.012)
(0.039 0.004)
SIDE VIEW
20 x 0.25 0.1 (PIN THICKNESS)
(0.01 0.004)
NOTE: END OF PINS
CHAMFERED
BOTTOM VIEW
DIMENSIONS IN MILLIMETERS (INCHES)
DIMENSIONS SHOWN ARE NOMINAL. ALL DIMENSIONS MEET THE MAXIMUM PACKAGE OUTLINE DRAWING IN THE SFF MSA.
Figure 4. HFCT-595xNLZ/NGZ Package Outline Drawing (2 x 10 Design shown)
5
Pin 10 Receiver Data Out RD+:
Connection Diagram (HFCT-5952NLZ/NGZ)
No internal terminations are provided. See recommended
circuit schematic.
RX
TX
Mounting Studs/
Solder Posts
Pin 11 Transmitter Power Supply V TX:
CC
Provide +3.3V dc via the recommended transmitter power
supply filter circuit. Locate the power supply filter circuit
Package
Grounding Tabs
as close as possible to the V TX pin.
CC
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
PHOTO DETECTOR BIAS
RECEIVER SIGNAL GROUND
RECEIVER SIGNAL GROUND
NOT CONNECTED
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
LASER DIODE OPTICAL POWER MONITOR - POSITIVE END
LASER DIODE OPTICAL POWER MONITOR - NEGATIVE END
LASER DIODE BIAS CURRENT MONITOR - POSITIVE END
LASER DIODE BIAS CURRENT MONITOR - NEGATIVE END
TRANSMITTER SIGNAL GROUND
TRANSMITTER DATA IN BAR
TRANSMITTER DATA IN
TRANSMITTER DISABLE
TRANSMITTER SIGNAL GROUND
Pins 12, 16 Transmitter Signal Ground V TX:
Top
View
EE
Directly connect these pins to the transmitter signal
ground plane.
NOT CONNECTED
RECEIVER SIGNAL GROUND
RECEIVER POWER SUPPLY
SIGNAL DETECT
Pin 13 Transmitter Disable T :
DIS
RECEIVER DATA OUTPUT BAR
RECEIVER DATA OUTPUT
10
TRANSMITTER POWER SUPPLY
Optional feature, connect this pin to +3.3 V TTL logic high
“1” to disable module. To enable module connect to TTL
logic low “0”.
Figure 5. Pin Out Diagram (Top View)
Pin 14 Transmitter Data In TD+:
No internal terminations are provided. See recommended
circuit schematic.
Pin Descriptions:
Pin 1 Photo Detector Bias, VpdR:
Pin 15 Transmitter Data In Bar TD-:
Pin 1 must be connected to VCC for the receiver to
function. This pin enables monitoring of photo detector
No internal terminations are provided. See recommended
circuit schematic.
bias current. It must be connected directly to V RX, or to
CC
Pin 17 Laser Diode Bias Current Monitor - Negative End B
–
MON
V
RX through a resistor (Max 200 R) for monitoring photo
CC
The laser diode bias current is accessible by measuring
the voltage developed across pins 17 and 18. Dividing the
voltage by 10 Ohms (internal) will yield the value of the
laser bias current.
detector bias current.
Pins 2, 3, 6 Receiver Signal Ground V RX:
Directly connect these pins to the receiver ground plane.
EE
Pins 4, 5 DO NOT CONNECT
Pin 7 Receiver Power Supply V RX:
Provide +3.3 V dc via the recommended receiver power
supply filter circuit. Locate the power supply filter circuit
as close as possible to the V RX pin. Note: the filter
Pin 18 Laser Diode Bias Current Monitor - Positive End B
See pin 17 description.
+
MON
CC
Pin 19 Laser Diode Optical Power Monitor - Negative End P
–
MON
The back facet diode monitor current is accessible by
measuring the voltage developed across pins 19 and 20.
The voltage across a 200 Ohm internal resistor between
pins 19 and 20 will be proportional to the photo current.
CC
circuit should not cause V to drop below minimu speci-
fication.
CC
Pin 8 Signal Detect SD:
Normal optical input levels to the receiver result in a logic
“1”output.
Pin 20 Laser Diode Optical Power Monitor - Positive End P
See pin 19 description.
+
MON
Low optical input levels to the receiver result in a logic “0”
output.
Mounting Studs/Solder Posts
The two mounting studs are provided for transceiver
mechanical attachment to the circuit board. It is recom-
mended that the holes in the circuit board be connected
to chassis ground.
This Signal Detect output can be used to drive a TTL input
on an upstream circuit, such as Signal Detect input or Loss
of Signal-bar.
Pin 9 Receiver Data Out Bar RD-:
No internal terminations are provided. See recommended
circuit schematic.
Package Grounding Tabs
Connect four package grounding tabs to signal ground.
6
Pin 4 Receiver Data Out Bar RD-:
Connection Diagram (HFCT-5951NLZ/NGZ)
No internal terminations are provided. See recommended
circuit schematic.
RX
TX
Pin 5 Receiver Data Out RD+:
No internal terminations are provided. See recommended
circuit schematic.
Mounting Studs/
Solder Posts
Pin 6 Transmitter Power Supply V TX:
CC
Provide +3.3V dc via the recommended transmitter power
supply filter circuit. Locate the power supply filter circuit
Package
Grounding Tabs
Top
View
as close as possible to the V TX pin.
CC
Pin 7 Transmitter Signal Ground V TX:
Directly connect this pin to the transmitter signal ground
plane.
EE
o
o
o
o
o
o
o
o
o
o
RECEIVER SIGNAL GROUND
RECEIVER POWER SUPPLY
SIGNAL DETECT
RECEIVER DATA OUT BAR
RECEIVER DATA OUT
1
2
3
4
5
10
9
8
7
6
TRANSMITTER DATA IN BAR
TRANSMITTER DATA IN
TRANSMITTER DISABLE
TRANSMITTER SIGNAL GROUND
TRANSMITTER POWER SUPPLY
Pin 8 Transmitter Disable T :
DIS
Optional feature, connect this pin to +3.3 V TTL logic high
“1” to disable module. To enable module connect to TTL
logic low “0”.
Figure 6 - Pin Out Diagram (Top View)
Pin 9 Transmitter Data In TD+:
No internal terminations are provided. See recommended
circuit schematic.
Pin Descriptions:
Pin 1 Receiver Signal Ground V RX:
Pin 10 Transmitter Data In Bar TD-:
EE
Directly connect this pin to the receiver ground plane.
No internal terminations are provided. See recommended
circuit schematic.
Pin 2 Receiver Power Supply V RX:
CC
Provide +3.3 V dc via the recommended receiver power
supply filter circuit. Locate the power supply filter circuit
Mounting Studs/Solder Posts
The two mounting studs are provided for transceiver
mechanical attachment to the circuit board. It is recom-
mended that the holes in the circuit board be connected
to chassis ground.
as close as possible to the V RX pin. Note: the filter
CC
circuit should not cause V to drop below minimum
CC
specification.
Pin 3 Signal Detect SD:
Normal optical input levels to the receiver result in a logic
“1”output.
Package Grounding Tabs
Connect four package grounding tabs to signal ground.
Low optical input levels to the receiver result in a logic “0”
output.
This Signal Detect output can be used to drive a low
voltage TTL input on an upstream circuit, such as Signal
Detect input or Loss of Signal-bar.
7
Application Information
The Applications Engineering Group at Avago is available
to assist you with technical understanding and design
trade-offs associated with these transceivers. You can
contact them through your Avago sales representative.
provides the necessary optical signal range to establish a
working fiber-optic link. The OPB is allocated for the fiber-
optic cable length and the corresponding link penalties.
For proper link performance, all penalties that affect the
link performance must be accounted for within the link
optical power budget.
The following information is provided to answer some of
the most common questions about the use of the parts.
Electrical and Mechanical Interface
Recommended Circuit
Optical Power Budget and Link Penalties
The worst-case Optical Power Budget (OPB) in dB for a
fiber-optic link is determined by the difference between
the minimum transmitter output optical power (dBm avg)
and the lowest receiver sensitivity (dBm avg). This OPB
Figures 7 and 8 show the recommended interface for
deploying the Avago transceiver in a +3.3 V system.
See Figure 7a
V
(+3.3 V)
CC
82
Z = 50
V
(+3.3 V)
CC
100 nF
100 nF
T
(LVTTL)
-
DIS
V
(+3.3 V)
CC
130
B
B
130
MON
82
TD-
Z = 50
+
MON
NOTE A
130
130
P
P
-
MON
TD+
+
MON
20 19 18 17 16 15 14 13 12 11
V
(+3.3 V)
CC
1 µH
10 µF
T
X
C2
C1
C3
V
(+3.3 V)
CC
R
X
1 µH
RD+
RD-
10 µF
1
2
3
4
5
6
7
8
9
10
Z = 50
V
RX (+3.3 V)
NOTE B
100
CC
100 nF
100 nF
200
Z = 50
NOTE C
10 nF
3 k
130
130
SD
LVTTL
Note: C1 = C2 = C3 = 10 nF or 100 nF
Note A: CIRCUIT ASSUMES OPEN EMITTER OUTPUT
Note B: CIRCUIT ASSUMES HIGH IMPENDANCE INTERNAL BIAS @ V - 1.3 V.
CC
Note C: THE BIAS RESISTOR FOR VpdR SHOULD NOT EXCEED 200 OHM.
Figure 7. Recommended Interface Circuit (HFCT-5952NLZ/NGZ)
8
V
(+3.3 V)
Data Line Interconnections
CC
Avago’s HFCT-595xNLZ/NGZ fiber-optic transceivers are
designed to couple to +3.3 V PECL signals. The transmit-
ter driver circuit regulates the output optical power. The
regulated light output will maintain a constant output
optical power provided the data pattern is reasonably
balanced in duty cycle. If the data duty cycle has long,
continuous state times (low or high data duty cycle), then
the output optical power will gradually change its average
output optical power level to its preset value.
82
100 nF
100 nF
TD-
V
(+3.3 V)
CC
130
82
TD+
130
Figure 7a. LVPECL termination and biasing scheme
The transmitter electrical termination schemes shown
in Figure 7 and 8 maybe replaced by an alternative low-
current scheme as per the evaluation board (see Figures
7a and 7b).
V
(+3.3 V)
CC
RI
3K3
The termination scheme in Figure 7a provides a minimum
component count to ensure LVPECL termination and
biasing requirements are met. Figure 7b shows an alter-
native scheme for low current dc biasing where a 100 ohm
differential (50 ohm single ended) termination of the data
lines is required.
100 nF
100 nF
PIN 15
PIN 14
TD-
V
(+3.3 V)
R2
CC
100
R5
5KI
R3
3K3
TD+
R4
5K1
Figure 7b. Low current dc biasing scheme
9
See Figure 7a
VCC (+3.3 V)
100 nF
100 nF
82
Z = 50
Z = 50
VCC (+3.3 V)
TDIS (LVTTL)
130
130
82
130
6
TD-
100 nF
NOTE A
130
TD+
10
9
8
7
VCC (+3.3 V)
VCC (+3.3 V)
1 µH
TX
10 µF
1 µH
C2
C1
C3
100 nF
V
CC (+3.3 V)
82
82
RX
RD+
C4 *
10 µF
1
2
3
4
5
Z = 50
130
NOTE B
100 nF
100 nF
RD-
Z = 50
130
130
130
SD
LVTTL
Note: C1 = C2 = C3 = 10 nF or 100 nF
Note A: CIRCUIT ASSUMES OPEN EMITTER OUTPUT
Note B: WHEN INTERNAL BIAS IS PROVIDED REPLACE SPLIT RESISTORS WITH 100 TERMINATION
* C4 IS AN OPTIONAL BYPASS CAPACITOR FOR ADDITIONAL LOW FREQUENCY NOISE FILTERING.
Figure 8. Recommended Interface Circuit (HFCT-5951NLZ/NGZ)
The HFCT-595xNLZ/NGZ have a transmit disable function
which is a single-ended +3.3 V TTL input which is should be terminated with identical load circuits to avoid
dc-coupled to pin 13 on the HFCT-5952NLZ/NGZ and unnecessarily large ac currents in V . If the outputs are
HFCT-5952NLZ/NGZ). The two data outputs of the receiver
CC
pin 8 on the HFCT-5951NLZ/NGZ. In addition the HFCT-
5952NLZ/NGZ offers the designer the option of monitor-
ing the laser diode bias current and the laser diode optical
power. The voltage measured between pins 17 and 18 is
proportional to the bias current through an internal 10
Ω resistor. Similarly the optical power rear facet monitor
circuit provides a photo current which is proportional
to the voltage measured between pins 19 and 20, this
voltage is measured across an internal 200 Ω resistor.
loaded identically the ac current is largely nulled.
Signal Detect is a single-ended, +3.3 V TTL compatible
output signal that is dc-coupled to pin 3 on the HFCT-
5951NLZ/NGZ and pin 8 on the HFCT-5952NLZ/NGZ
modules. Signal Detect should not be ac-coupled exter-
nally to the follow-on circuits because of its infrequent
state changes.
The HFCT-5952NLZ/NGZ offers the designer the option of
monitoring the PIN photo detector bias current. Figures 7
and 8 show a resistor network, which could be used to do
this. Note that the photo detector bias current pin must
As for the receiver section, it is internally ac-coupled
between the preamplifier and the postamplifier stages.
The actual Data and Data-bar outputs of the postamplifier
are dc-coupled to their respective output pins (pins 9 and
10 on the HFCT-5951NLZ/NGZ and pins 14 and 15 on the
be connected to V . Avago also recommends that a de-
CC
coupling capacitor is used on this pin.
10
Power Supply Filtering and Ground Planes
Eye Safety Circuit
It is important to exercise care in circuit board layout to For an optical transmitter device to be eye-safe in the
achieve optimum performance from these transceivers. event of a single fault failure, the transmitter must either
Figures 7 and 8 show the power supply circuit which maintain eye-safe operation or be disabled.
complieswiththesmallformfactormultisourceagreement.
The HFCT-595xNLZ/NGZ is intrinsically eye safe and does
It is further recommended that a continuous ground
not require shut down circuitry.
plane be provided in the circuit board directly under the
transceiver to provide a low inductance ground for signal
return current. This recommendation is in keeping with
Signal Detect
The Signal Detect circuit provides a de-asserted output
signal when the optical link is broken (or when the
remote transmitter is OFF). The Signal Detect threshold
is set to transition from a high to low state between the
minimum receiver input optional power and -45 dBm
avg. input optical power indicating a definite optical fault
(e.g. unplugged connector for the receiver or transmitter,
broken fiber, or failed far-end transmitter or data source).
The Signal Detect does not detect receiver data error or
error-rate. Data errors can be determined by signal pro-
cessing offered by upstream PHY ICs.
good high frequency board layout practices.
Package footprint and front panel considerations
The Avago transceiver complies with the circuit board
“Common Transceiver Footprint” hole pattern defined in
the current multisource agreement which defined the 2
x 5 and 2 x 10 package styles. This drawing is reproduced
in Figure 9 with the addition of ANSI Y14.5M compliant di-
mensioning to be used as a guide in the mechanical layout
of your circuit board. Figure 10 shows the front panel di-
mensions associated with such a layout.
8.89
(0.35)
3.56
(0.14)
2 x Ø 2.29 MAX. 2 x Ø 1.4 0.1
2 x Ø 1.4 0.1
(0.055 0.004)
7.11
(0.28)
(0.09)
(0.055 0.004)
4 x Ø 1.4 0.1
(0.055 0.004)
10.16
13.34
(0.4)
(0.525)
7.59
(0.299)
9.59
(0.378)
2
(0.079)
9 x 1.78
(0.07)
2
3
3
2 x Ø 2.29
(0.09)
(0.079)
(0.118)
(0.118)
4.57
(0.18)
20 x Ø 0.81 0.1
(0.032 0.004)
6
16
3.08
(0.236)
(0.63)
(0.121)
DIMENSIONS IN MILLIMETERS (INCHES)
NOTES:
1. THIS FIGURE DESCRIBES THE RECOMMENDED CIRCUIT BOARD LAYOUT FOR THE SFF TRANSCEIVER.
2. THE HATCHED AREAS ARE KEEP-OUT AREAS RESERVED FOR HOUSING STANDOFFS. NO METAL TRACES OR
GROUND CONNECTION IN KEEP-OUT AREAS.
3. 2 x 10 TRANSCEIVER MODULE REQUIRES 26 PCB HOLES (20 I/O PINS, 2 SOLDER POSTS AND 4 PACKAGE
GROUNDING TABS).
PACKAGE GROUNDING TABS SHOULD BE CONNECTED TO SIGNAL GROUND.
4. 2 x 5 TRANSCEIVER MODULE REQUIRES 16 PCB HOLES (10 I/O PINS, 2 SOLDER POSTS AND 4 PACKAGE
GROUNDING TABS).
PACKAGE GROUNDING TABS SHOULD BE CONNECTED TO SIGNAL GROUND.
5. THE MOUNTING STUDS SHOULD BE SOLDERED TO CHASSIS GROUND FOR MECHANICAL INTEGRITY AND TO
ENSURE FOOTPRINT COMPATIBILITY WITH OTHER SFF TRANSCEIVERS.
6. HOLES FOR HOUSING LEADS MUST BE TIED TO SIGNAL GROUND.
Figure 9. Recommended Board Layout Hole Pattern
11
Electromagnetic Interference (EMI)
Package and Handling Instructions
Flammability
One of a circuit board designer’s foremost concerns is
the control of electromagnetic emissions from electronic
equipment. Success in controlling generated Electromag-
netic Interference (EMI) enables the designer to pass a
governmental agency’s EMI regulatory standard and more
importantly, it reduces the possibility of interference to
neighboring equipment. Avago has designed the HFCT-
595xNLZ/NGZ to provide excellent EMI performance. The
EMI performance of a chassis is dependent on physical
design and features which help improve EMI suppres-
sion. Avago encourages using standard RF suppression
practices and avoiding poorly EMI-sealed enclosures.
The HFCT-595xNLZ/NGZ transceivers housing consists of
high strength, heat resistant and UL 94 V-0 flame retardant
plastic and metal packaging.
Recommended Solder and Wash Process
The HFCT-595xNLZ/NGZ are compatible with industry-
standard wave solder processes.
Process plug
The transceivers are supplied with a process plug for pro-
tection of the optical port within the LC connector recep-
tacle. This process plug prevents contamination during
wave solder and aqueous rinse as well as during handling,
shipping and storage. It is made of a high-temperature,
molded sealing material.
Avago’s HFCT-5951NLZ and HFCT-5952NLZ OC-12/STM-4
LC transceivers have nose shields which provide a conve-
nient chassis connection to the nose of the transceiver.
This nose shield improves system EMI performance by
closing off the LC aperture. Localized shielding is also
improved by tying the four metal housing package
grounding tabs to signal ground on the PCB. Though not
obvious by inspection, the nose shield and metal housing
are electrically separated for customers who do not wish
to directly tie chassis and signal grounds together. Figure
10 shows the recommended positioning of the transceiv-
ers with respect to the PCB and faceplate.
Recommended Solder fluxes
Solder fluxes used with the HFCT-595xNLZ/NGZ should be
water-soluble, organic fluxes. Recommended solder fluxes
include Lonco 3355-11 from London Chemical West, Inc.
of Burbank, CA, and 100 Flux from Alpha-Metals of Jersey
City, NJ.
15.24
(0.6)
10.16 0.1
(0.4 0.004)
TOP OF PCB
B
B
DETAIL A
1
(0.039)
15.24
(0.6)
A
SOLDER POSTS
14.22 0.1
(0.56 0.004)
15.75 MAX. 15.0 MIN.
(0.62 MAX. 0.59 MIN.)
SECTION B - B
DIMENSIONS IN MILLIMETERS (INCHES)
1. FIGURE DESCRIBES THE RECOMMENDED FRONT PANEL OPENING FOR A LC OR SG SFF TRANSCEIVER.
2. SFF TRANSCEIVER PLACED AT 15.24 mm (0.6) MIN. SPACING.
Figure 10. Recommended Panel Mounting
12
Recommended Cleaning/ Degreasing Chemicals
Alcohols: methyl, isopropyl, isobutyl.
Aliphatics: hexane, heptane
Other: naphtha.
The second case to consider is static discharges to the
exterior of the equipment chassis containing the trans-
ceiver parts. To the extent that the LC connector recep-
tacle is exposed to the outside of the equipment chassis it
may be subject to whatever system-level ESD test criteria
that the equipment is intended to meet.
Do not use partially halogenated hydrocarbons such as
1,1.1 trichloroethane, ketones such as MEK, acetone,
chloroform, ethyl acetate, methylene dichloride, phenol,
methylene chloride, or N-methylpyrolldone. Also, Avago
does not recommend the use of cleaners that use
halogenated hydrocarbons because of their potential
environmental harm.
Electromagnetic Interference (EMI)
Most equipment designs utilizing these high-speed trans-
ceivers from Avago will be required to meet FCC regula-
tions in the United States, CENELEC EN55022 (CISPR 22)
in Europe and VCCI in Japan. Refer to EMI section (page 9)
for more details.
LC SFF Cleaning Recommendations
In the event of contamination of the optical ports, the rec-
ommended cleaning process is the use of forced nitrogen.
If contamination is thought to have remained, the optical
ports can be cleaned using a NTT international Cletop
stick type (diam. 1.25 mm) and HFE7100 cleaning fluid.
Immunity
Transceivers will be subject to radio-frequency electro-
magnetic fields following the IEC 61000-4-3 test method.
Eye Safety
Regulatory Compliance
These laser-based transceivers are classified as AEL Class
I (U.S. 21 CFR(J) and AEL Class 1 per EN 60825-1 (+A11).
They are eye safe when used within the data sheet limits
per CDRH. They are also eye safe under normal operating
conditions and under all reasonably foreseeable single
fault conditions per EN60825-1. Avago has tested the
transceiver design for compliance with the requirements
listed below under normal operating conditions and under
single fault conditions where applicable. TUV Rheinland
has granted certification to these transceivers for laser eye
safety and use in EN 60950 and EN 60825-2 applications.
Their performance enables the transceivers to be used
The Regulatory Compliance for transceiver performance
is shown in Table 1. The overall equipment design will
determine the certification level. The transceiver perfor-
mance is offered as a figure of merit to assist the designer
in considering their use in equipment designs.
Electrostatic Discharge (ESD)
There are two design cases in which immunity to ESD
damage is important.
The first case is during handling of the transceiver prior
to mounting it on the circuit board. It is important to use
normal ESD handling precautions for ESD sensitive devices.
These precautions include using grounded wrist straps,
work benches, and floor mats in ESD controlled areas.
without concern for eye safety up to 3.6 V transmitter V
.
CC
13
Table 1: Regulatory Compliance - Targeted Specification
Feature
Test Method
Performance
Electrostatic Discharge
(ESD) to the Electrical Pins
MIL-STD-883
Method 3015
Class 2 (>2 kV).
Electrostatic Discharge
Variation of IEC 61000-4-2
Tested to 8 kV contact discharge.
(ESD) to the LC Receptacle
Electromagnetic
Interference (EMI)
FCC Class B
CENELEC EN55022 Class B
(CISPR 22A)
Margins are dependent on customer board and chassis designs.
VCCI Class I
Immunity
Variation of IEC 61000-4-3
Typically show no measurable effect from a
10 V/m field swept from 27 to 1000 MHz applied to the
transceiver without a chassis enclosure.
Laser Eye Safety and
Equipment Type Testing
FDA CDRH 21-CFR 1040
Class 1
Accession Number: ⇒ 9521220
IEC 60825-1
Amendment 2 2001-01
License Number: ⇒ 933/510216
Component
Recognition
Underwriters Laboratories
and Canadian Standards
Association Joint Component
Recognition for
UL File. E173874
Information Technology
Equipment Including
Electrical Business
Equipment.
CAUTION:
There are no user serviceable parts nor any mainte- Connection of the HFCT-595xNLZ/NGZ to a non-approved
nance required for the HFCT-595xNLZ/NGZ. All adjust- optical source, operating above the recommended
ments are made at the factory before shipment to our
absolute maximum conditions or operating the HFCT-
customers. Tampering with or modifying the performance 595xNLZ/NGZ in a manner inconsistent with its design
of the HFCT-595xNLZ/NGZ will result in voided product and function may result in hazardous radiation exposure
warranty. It may also result in improper operation of the and may be considered an act of modifying or manufactur-
HFCT-595xNLZ/NGZ circuitry, and possible overstress of
the laser source. Device degradation or product failure required by law to recertify and reidentify the laser product
may result. under the provisions of U.S. 21 CFR (Subchapter J).
ing a laser product. The person(s) performing such an act is
14
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each
parameter in isolation, all other parameters having values within the recommended operating conditions. It should not
be assumed that limiting values of more than one parameter can be applied to the product at the same time. Exposure
to the absolute maximum ratings for extended periods can adversely affect device reliability.
Parameter
Symbol
TS
Min.
-40
Typ.
Max.
+85
3.6
Unit
°C
V
Reference
Storage Temperature
Supply Voltage
VCC
VI
-0.5
-0.5
1
Data Input Voltage
Data Output Current
Relative Humidity
VCC
50
V
ID
mA
%
RH
85
Recommended Operating Conditions
Parameter
Symbol
Min.
Typ.
Max.
Unit
Reference
Ambient Operating Temperature
HFCT-595*NLZ/NGZ
TA
0
+70
°C
2
Supply Voltage
VCC
3.14
0.3
3.47
1.6
V
Power Supply Rejection
PSR
100
50
mVPk-Pk
3
Transmitter Differential Input Voltage
Data Output Load
VD
V
RDL
Ω
TTL Signal Detect Output Current - Low
TTL Signal Detect Output Current - High
Transmit Disable Input Voltage - Low
Transmit Disable Input Voltage - High
Transmit Disable Assert Time
Transmit Disable Deassert Time
IOL
1.0
mA
µA
V
IOH
-400
2.2
TDIS
0.6
TDIS
V
TASSERT
TDEASSERT
10
µs
ms
4
5
1.0
Process Compatibility
Parameter
Symbol
Min.
Typ.
Max.
Unit
Reference
Wave Soldering and Aqueous Wash
TSOLD/tSOLD
+260/10
°C/sec.
6
Notes:
1. The transceiver is class 1 eye safe up to V = 3.6 V.
2. Ambient operating temperature utilizes air flow of 2 ms over the device.
CC
-1
3. Tested with a sinusoidal signal in the frequency range from 10 Hz to 1 MHz on the V supply with the recommended power supply filter in place.
CC
Typically less than a 1 dB change in sensitivity is experienced.
4. Time delay from Transmit Disable Assertion to laser shutdown.
5. Time delay from Transmit Disable Deassertion to laser start-up.
6. Aqueous wash pressure <110 psi.
15
Transmitter Electrical Characteristics
HFCT-595*NLZ/NGZ: T = 0 °C to +70 °C, V = 3.14 V to 3.47 V
A
CC
Parameter
Symbol
ICCT
Min.
Typ.
30
Max.
120
0.42
930
Unit
mA
W
Reference
Supply Current
Power Dissipation
1
PDIST
0.10
800
-2
Data Input Voltage Swing (single-ended)
VIH - VIL
250
mV
µA
Transmitter DifferentialData Input Current - Low IIL
Transmitter DifferentialData Input Current - High IIH
Laser Diode Bias Monitor Voltage
-350
18
350
700
200
µA
mV
mV
2, 3
2, 3
Power Monitor Voltage
10
Receiver Electrical Characteristics
HFCT-595*NLZ/NGZ: T = 0 °C to +70 °C, V = 3.14 V to 3.47 V
A
CC
Parameter
Symbol
ICCR
Min.
Typ.
70
Max.
110
0.38
930
0.5
Unit
mA
W
Reference
Supply Current
Power Dissipation
1
4
5
6
6
7
7
PDISR
VOH - VOL
tr
0.23
800
Data Output Voltage Swing (single-ended)
Data Output Rise Time
575
mV
ns
ns
V
Data Output Fall Time
tf
0.5
Signal Detect Output Voltage - Low
Signal Detect Output Voltage - High
Signal Detect Assert Time (OFF to ON)
Signal Detect Deassert Time (ON to OFF)
VOL
0.8
VOH
2.0
2.3
V
ASMAX
ANSMAX
100
100
µs
µs
Notes:
1. Excluding data output termination currents.
2. The laser bias monitor current and laser diode optical power are calculated as ratios of the corresponding voltages to their current sensing resistors,
10 Ω and 200 Ω (see Figure 7). On the 2 x 10 version only.
3. On the 2 x 10 version only.
4. Power dissipation value is the power dissipated in the receiver itself. It is calculated as the sum of the products of V and I minus the sum of the
CC
CC
products of the output voltages and currents.
5. These outputs are compatible with 10 k, 10 kH, and 100 k ECL and PECL inputs.
6. These are 20-80% values.
7. SD is LVTTL compatible.
16
Transmitter Optical Characteristics
HFCT-595*NLZ/NGZ: T = 0 °C to +70 °C, V = 3.14 V to 3.47 V
A
CC
Parameter
Symbol
Min.
-3
Typ.
Max.
2
Unit
dBm
nm
Reference
Output Optical Power 9 µm SMF
Center Wavelength
Spectral Width - rms
Optical Rise Time
POUT
lC
s
1
1280
1335
1
nm rms
ps
2
3
3
tr
250
250
Optical Fall Time
tf
ps
Extinction Ratio
ER
10
dB
Output Optical Eye
Back Reflection Sensitivity
Jitter Generation
Compliant with eye mask Telcordia GR-253-CORE and ITU-T G.957
-8.5
70
7
dB
4
5
5
pk to pk
RMS
25
2
mUI
mUI
dB
Side Mode Suppression Ratio
SMSR
30
Receiver Optical Characteristics
HFCT-595*NLZ/NGZ: T = 0 °C to +70 °C, V = 3.14 V to 3.47 V
A
CC
Parameter
Symbol
PIN MIN
PIN MAX
l
Min.
Typ.
Max.
Unit
Reference
Receiver Sensitivity
Receiver Overload
-32
-28
dBm avg. 6, 7
-8
dBm avg.
nm
6
Input Operating Wavelength
Signal Detect - Asserted
Signal Detect - Deasserted
Signal Detect - Hysteresis
1270
1570
-28
PA
-34
dBm avg.
dBm avg.
dB
PD
-45
0.5
-34.3
1.7
PA - PD
4
Optical Return Loss, ORL
Notes:
-35
-14
dB
1. The output power is coupled into a 1 m single-mode fiber. Minimum output optical level is at end of life.
2. The relationship between FWHM and RMS values for spectral width can be derived from the assumption of a Gaussian shaped spectrum which
results in RMS = FWHM/2.35.
3. These are unfiltered 20-80% values.
4. This meets the “desired” requirement in SONET specification (GR253). The figure given is the allowable mismatch for 1 dB degradation in receiver
sensitivity.
23
5. For the jitter measurements, the device was driven with SONET OC-12C data pattern filled with a 2 -1 PRBS payload.
23
6. Minimum sensitivity and saturation levels for a 2 -1 PRBS with 72 ones and 72 zeros inserted. Over the range the receiver is guaranteed to provide
-10
output data with a Bit Error Rate better than or equal to 1 x 10
7. Beginning of life sensitivity at +25 °C is -29 dBm.
.
17
Design Support Materials
Avago has created a number of reference designs with
major PHY IC vendors in order to demonstrate full func-
tionality and interoperability. Such design information
and results can be made available to the designer as a
technical aid. Please contact your Avago representative
for further information if required.
Ordering Information
Temperature range 0°C to +70°C
HFCT-5951NLZ 2 x 5 footprint - with EMI nose shield
HFCT-5952NLZ 2 x 10 footprint - with EMI nose shield
HFCT-5951NGZ 2 x 5 footprint - without EMI nose shield
HFCT-5952NGZ 2 x 10 footprint - without EMI nose shield
Class 1 Laser Product: This product conforms to the
applicable requirements of 21 CFR 1040 at the date of
manufacture
Date of Manufacture:
Avago Technologies Inc., No 1 Yishun Ave 7, Singapore
Handling Precautions
1. The HFCT-595xNLZ/NGZ can be damaged by current
surges or overvoltage. Power supply transient precau-
tions should be taken.
2. Normal handling precautions for electrostatic sensitive
devices should be taken.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved.
5989-4774EN - July 10, 2013
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